1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include <dt-bindings/input/linux-event-codes.h>
5#include <dt-bindings/input/gpio-keys.h>
6#include "tegra234-p3701-0008.dtsi"
7#include "tegra234-p3740-0002.dtsi"
8
9/ {
10	model = "NVIDIA IGX Orin Development Kit";
11	compatible = "nvidia,p3740-0002+p3701-0008", "nvidia,p3701-0008", "nvidia,tegra234";
12
13	aliases {
14		serial0 = &tcu;
15		serial1 = &uarta;
16	};
17
18	chosen {
19		stdout-path = "serial0:115200n8";
20	};
21
22	bus@0 {
23		serial@3100000 {
24			compatible = "nvidia,tegra194-hsuart";
25			reset-names = "serial";
26			status = "okay";
27		};
28
29		i2c@3160000 {
30			status = "okay";
31		};
32
33		i2c@3180000 {
34			status = "okay";
35		};
36
37		i2c@3190000 {
38			status = "okay";
39		};
40
41		i2c@31b0000 {
42			status = "okay";
43		};
44
45		i2c@31c0000 {
46			status = "okay";
47
48		};
49
50		i2c@31e0000 {
51			status = "okay";
52		};
53
54		spi@3270000 {
55			status = "okay";
56		};
57
58		hda@3510000 {
59			nvidia,model = "NVIDIA IGX Orin HDA";
60			status = "okay";
61		};
62
63		fuse@3810000 {
64			status = "okay";
65		};
66
67		i2c@c240000 {
68			status = "okay";
69		};
70
71		i2c@c250000 {
72			status = "okay";
73		};
74
75		host1x@13e00000 {
76			nvdec@15480000 {
77				status = "okay";
78			};
79		};
80
81		pcie@140e0000 {
82			status = "okay";
83			vddio-pex-ctl-supply = <&vdd_1v8_ls>;
84			phys = <&p2u_gbe_4>, <&p2u_gbe_5>;
85			phy-names = "p2u-0", "p2u-1";
86		};
87
88		pcie@14100000 {
89			status = "okay";
90			vddio-pex-ctl-supply = <&vdd_1v8_ao>;
91			vpcie3v3-supply = <&vdd_3v3_wifi>;
92			phys = <&p2u_hsio_3>;
93			phy-names = "p2u-0";
94		};
95
96		pcie@14160000 {
97			status = "okay";
98			vddio-pex-ctl-supply = <&vdd_1v8_ao>;
99			phys = <&p2u_hsio_7>, <&p2u_hsio_6>, <&p2u_hsio_5>,
100			       <&p2u_hsio_4>;
101			phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";
102		};
103
104		pcie@141a0000 {
105			status = "okay";
106			vddio-pex-ctl-supply = <&vdd_1v8_ls>;
107			phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
108				<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
109				<&p2u_nvhs_6>, <&p2u_nvhs_7>;
110			phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
111				    "p2u-5", "p2u-6", "p2u-7";
112		};
113
114		pcie@141e0000 {
115			status = "okay";
116			vddio-pex-ctl-supply = <&vdd_1v8_ls>;
117			phys = <&p2u_gbe_0>, <&p2u_gbe_1>;
118			phy-names = "p2u-0", "p2u-1";
119		};
120	};
121
122	gpio-keys {
123		compatible = "gpio-keys";
124		status = "okay";
125
126		key-force-recovery {
127			label = "Force Recovery";
128			gpios = <&gpio TEGRA234_MAIN_GPIO(G, 0) GPIO_ACTIVE_LOW>;
129			linux,input-type = <EV_KEY>;
130			linux,code = <BTN_1>;
131		};
132
133		key-power {
134			label = "Power";
135			gpios = <&gpio_aon TEGRA234_AON_GPIO(EE, 4) GPIO_ACTIVE_LOW>;
136			linux,input-type = <EV_KEY>;
137			linux,code = <KEY_POWER>;
138			wakeup-event-action = <EV_ACT_ASSERTED>;
139			wakeup-source;
140		};
141
142		key-suspend {
143			label = "Suspend";
144			gpios = <&gpio TEGRA234_MAIN_GPIO(G, 2) GPIO_ACTIVE_LOW>;
145			linux,input-type = <EV_KEY>;
146			linux,code = <KEY_SLEEP>;
147		};
148	};
149
150	serial {
151		status = "okay";
152	};
153
154	sound {
155		status = "okay";
156
157		compatible = "nvidia,tegra186-audio-graph-card";
158
159		dais = /* ADMAIF (FE) Ports */
160		       <&admaif0_port>, <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
161		       <&admaif4_port>, <&admaif5_port>, <&admaif6_port>, <&admaif7_port>,
162		       <&admaif8_port>, <&admaif9_port>, <&admaif10_port>, <&admaif11_port>,
163		       <&admaif12_port>, <&admaif13_port>, <&admaif14_port>, <&admaif15_port>,
164		       <&admaif16_port>, <&admaif17_port>, <&admaif18_port>, <&admaif19_port>,
165		       /* XBAR Ports */
166		       <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s4_port>,
167		       <&xbar_i2s6_port>, <&xbar_dmic3_port>,
168		       <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>,
169		       <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>,
170		       <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>,
171		       <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>,
172		       <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>,
173		       <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>,
174		       <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>,
175		       <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>,
176		       <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>,
177		       <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>,
178		       <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>,
179		       <&xbar_adx1_in_port>, <&xbar_adx2_in_port>,
180		       <&xbar_adx3_in_port>, <&xbar_adx4_in_port>,
181		       <&xbar_mix_in1_port>, <&xbar_mix_in2_port>,
182		       <&xbar_mix_in3_port>, <&xbar_mix_in4_port>,
183		       <&xbar_mix_in5_port>, <&xbar_mix_in6_port>,
184		       <&xbar_mix_in7_port>, <&xbar_mix_in8_port>,
185		       <&xbar_mix_in9_port>, <&xbar_mix_in10_port>,
186		       <&xbar_asrc_in1_port>, <&xbar_asrc_in2_port>,
187		       <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>,
188		       <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>,
189		       <&xbar_asrc_in7_port>,
190		       <&xbar_ope1_in_port>,
191		       /* HW accelerators */
192		       <&sfc1_out_port>, <&sfc2_out_port>,
193		       <&sfc3_out_port>, <&sfc4_out_port>,
194		       <&mvc1_out_port>, <&mvc2_out_port>,
195		       <&amx1_out_port>, <&amx2_out_port>,
196		       <&amx3_out_port>, <&amx4_out_port>,
197		       <&adx1_out1_port>, <&adx1_out2_port>,
198		       <&adx1_out3_port>, <&adx1_out4_port>,
199		       <&adx2_out1_port>, <&adx2_out2_port>,
200		       <&adx2_out3_port>, <&adx2_out4_port>,
201		       <&adx3_out1_port>, <&adx3_out2_port>,
202		       <&adx3_out3_port>, <&adx3_out4_port>,
203		       <&adx4_out1_port>, <&adx4_out2_port>,
204		       <&adx4_out3_port>, <&adx4_out4_port>,
205		       <&mix_out1_port>, <&mix_out2_port>, <&mix_out3_port>,
206		       <&mix_out4_port>, <&mix_out5_port>,
207		       <&asrc_out1_port>, <&asrc_out2_port>, <&asrc_out3_port>,
208		       <&asrc_out4_port>, <&asrc_out5_port>, <&asrc_out6_port>,
209		       <&ope1_out_port>,
210		       /* BE I/O Ports */
211		       <&i2s1_port>, <&i2s2_port>, <&i2s4_port>, <&i2s6_port>,
212		       <&dmic3_port>;
213
214		label = "NVIDIA IGX Orin APE";
215
216		widgets = "Microphone",	"CVB-RT MIC Jack",
217			  "Microphone",	"CVB-RT MIC",
218			  "Headphone",	"CVB-RT HP Jack",
219			  "Speaker",	"CVB-RT SPK";
220
221		routing = /* I2S4 <-> RT5640 */
222			  "CVB-RT AIF1 Playback",	"I2S4 DAP-Playback",
223			  "I2S4 DAP-Capture",		"CVB-RT AIF1 Capture",
224			  /* RT5640 codec controls */
225			  "CVB-RT HP Jack",		"CVB-RT HPOL",
226			  "CVB-RT HP Jack",		"CVB-RT HPOR",
227			  "CVB-RT IN1P",		"CVB-RT MIC Jack",
228			  "CVB-RT IN2P",		"CVB-RT MIC Jack",
229			  "CVB-RT IN2N",		"CVB-RT MIC Jack",
230			  "CVB-RT IN3P",		"CVB-RT MIC Jack",
231			  "CVB-RT SPK",			"CVB-RT SPOLP",
232			  "CVB-RT SPK",			"CVB-RT SPORP",
233			  "CVB-RT SPK",			"CVB-RT LOUTL",
234			  "CVB-RT SPK",			"CVB-RT LOUTR",
235			  "CVB-RT DMIC1",		"CVB-RT MIC",
236			  "CVB-RT DMIC2",		"CVB-RT MIC";
237	};
238};
239