1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 */
4
5#include "imx27-phytec-phycore-som.dtsi"
6
7/ {
8	model = "Phytec pcm970";
9	compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27";
10
11	chosen {
12		stdout-path = &uart1;
13	};
14
15	display0: LQ035Q7 {
16		model = "Sharp-LQ035Q7";
17		bits-per-pixel = <16>;
18		fsl,pcr = <0xf00080c0>;
19
20		display-timings {
21			native-mode = <&timing0>;
22			timing0: timing0 {
23				clock-frequency = <5500000>;
24				hactive = <240>;
25				vactive = <320>;
26				hback-porch = <5>;
27				hsync-len = <7>;
28				hfront-porch = <16>;
29				vback-porch = <7>;
30				vsync-len = <1>;
31				vfront-porch = <9>;
32				pixelclk-active = <1>;
33				hsync-active = <1>;
34				vsync-active = <1>;
35				de-active = <0>;
36			};
37		};
38	};
39
40	regulator-2 {
41		compatible = "regulator-fixed";
42		pinctrl-names = "default";
43		pinctrl-0 = <&pinctrl_csien>;
44		regulator-name = "CSI_EN";
45		regulator-min-microvolt = <3300000>;
46		regulator-max-microvolt = <3300000>;
47		gpio = <&gpio2 24 GPIO_ACTIVE_LOW>;
48		regulator-always-on;
49	};
50
51	usbphy {
52		usbphy2: usbphy@2 {
53			compatible = "usb-nop-xceiv";
54			reg = <2>;
55			vcc-supply = <&reg_5v0>;
56			clocks = <&clks IMX27_CLK_DUMMY>;
57			clock-names = "main_clk";
58			#phy-cells = <0>;
59		};
60	};
61};
62
63&cspi1 {
64	pinctrl-0 = <&pinctrl_cspi1>, <&pinctrl_cspi1cs1>;
65	cs-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>,
66		   <&gpio4 27 GPIO_ACTIVE_LOW>;
67};
68
69&fb {
70	pinctrl-names = "default";
71	pinctrl-0 = <&pinctrl_imxfb1>;
72	display = <&display0>;
73	lcd-supply = <&reg_5v0>;
74	fsl,dmacr = <0x00020010>;
75	fsl,lscr1 = <0x00120300>;
76	fsl,lpccr = <0x00a903ff>;
77	status = "okay";
78};
79
80&i2c1 {
81	clock-frequency = <400000>;
82	pinctrl-names = "default";
83	pinctrl-0 = <&pinctrl_i2c1>;
84	status = "okay";
85
86	camgpio: pca9536@41 {
87		compatible = "nxp,pca9536";
88		reg = <0x41>;
89		gpio-controller;
90		#gpio-cells = <2>;
91	};
92};
93
94&iomuxc {
95	imx27_phycore_rdk {
96		pinctrl_csien: csiengrp {
97			fsl,pins = <
98				MX27_PAD_USB_OC_B__GPIO2_24 0x0
99			>;
100		};
101
102		pinctrl_cspi1cs1: cspi1cs1grp {
103			fsl,pins = <
104				MX27_PAD_CSPI1_SS1__GPIO4_27 0x0
105			>;
106		};
107
108		pinctrl_imxfb1: imxfbgrp {
109			fsl,pins = <
110				MX27_PAD_LD0__LD0 0x0
111				MX27_PAD_LD1__LD1 0x0
112				MX27_PAD_LD2__LD2 0x0
113				MX27_PAD_LD3__LD3 0x0
114				MX27_PAD_LD4__LD4 0x0
115				MX27_PAD_LD5__LD5 0x0
116				MX27_PAD_LD6__LD6 0x0
117				MX27_PAD_LD7__LD7 0x0
118				MX27_PAD_LD8__LD8 0x0
119				MX27_PAD_LD9__LD9 0x0
120				MX27_PAD_LD10__LD10 0x0
121				MX27_PAD_LD11__LD11 0x0
122				MX27_PAD_LD12__LD12 0x0
123				MX27_PAD_LD13__LD13 0x0
124				MX27_PAD_LD14__LD14 0x0
125				MX27_PAD_LD15__LD15 0x0
126				MX27_PAD_LD16__LD16 0x0
127				MX27_PAD_LD17__LD17 0x0
128				MX27_PAD_CLS__CLS 0x0
129				MX27_PAD_CONTRAST__CONTRAST 0x0
130				MX27_PAD_LSCLK__LSCLK 0x0
131				MX27_PAD_OE_ACD__OE_ACD 0x0
132				MX27_PAD_PS__PS 0x0
133				MX27_PAD_REV__REV 0x0
134				MX27_PAD_SPL_SPR__SPL_SPR 0x0
135				MX27_PAD_HSYNC__HSYNC 0x0
136				MX27_PAD_VSYNC__VSYNC 0x0
137			>;
138		};
139
140		pinctrl_i2c1: i2c1grp {
141			/* Add pullup to DATA line */
142			fsl,pins = <
143				MX27_PAD_I2C_DATA__I2C_DATA	0x1
144				MX27_PAD_I2C_CLK__I2C_CLK	0x0
145			>;
146		};
147
148		pinctrl_owire1: owire1grp {
149			fsl,pins = <
150				MX27_PAD_RTCK__OWIRE 0x0
151			>;
152		};
153
154		pinctrl_sdhc2: sdhc2grp {
155			fsl,pins = <
156				MX27_PAD_SD2_CLK__SD2_CLK 0x0
157				MX27_PAD_SD2_CMD__SD2_CMD 0x0
158				MX27_PAD_SD2_D0__SD2_D0 0x0
159				MX27_PAD_SD2_D1__SD2_D1 0x0
160				MX27_PAD_SD2_D2__SD2_D2 0x0
161				MX27_PAD_SD2_D3__SD2_D3 0x0
162				MX27_PAD_SSI3_FS__GPIO3_28	0x0 /* WP */
163				MX27_PAD_SSI3_RXDAT__GPIO3_29	0x0 /* CD */
164			>;
165		};
166
167		pinctrl_uart1: uart1grp {
168			fsl,pins = <
169				MX27_PAD_UART1_TXD__UART1_TXD 0x0
170				MX27_PAD_UART1_RXD__UART1_RXD 0x0
171				MX27_PAD_UART1_CTS__UART1_CTS 0x0
172				MX27_PAD_UART1_RTS__UART1_RTS 0x0
173			>;
174		};
175
176		pinctrl_uart2: uart2grp {
177			fsl,pins = <
178				MX27_PAD_UART2_TXD__UART2_TXD 0x0
179				MX27_PAD_UART2_RXD__UART2_RXD 0x0
180				MX27_PAD_UART2_CTS__UART2_CTS 0x0
181				MX27_PAD_UART2_RTS__UART2_RTS 0x0
182			>;
183		};
184
185		pinctrl_usbh2: usbh2grp {
186			fsl,pins = <
187				MX27_PAD_USBH2_CLK__USBH2_CLK 0x0
188				MX27_PAD_USBH2_DIR__USBH2_DIR 0x0
189				MX27_PAD_USBH2_NXT__USBH2_NXT 0x0
190				MX27_PAD_USBH2_STP__USBH2_STP 0x0
191				MX27_PAD_CSPI2_SCLK__USBH2_DATA0 0x0
192				MX27_PAD_CSPI2_MOSI__USBH2_DATA1 0x0
193				MX27_PAD_CSPI2_MISO__USBH2_DATA2 0x0
194				MX27_PAD_CSPI2_SS1__USBH2_DATA3 0x0
195				MX27_PAD_CSPI2_SS2__USBH2_DATA4 0x0
196				MX27_PAD_CSPI1_SS2__USBH2_DATA5 0x0
197				MX27_PAD_CSPI2_SS0__USBH2_DATA6 0x0
198				MX27_PAD_USBH2_DATA7__USBH2_DATA7 0x0
199			>;
200		};
201
202		pinctrl_weim: weimgrp {
203			fsl,pins = <
204				MX27_PAD_CS4_B__CS4_B		0x0 /* CS4 */
205				MX27_PAD_SD1_D1__GPIO5_19	0x0 /* CAN IRQ */
206			>;
207		};
208	};
209};
210
211&owire {
212	pinctrl-names = "default";
213	pinctrl-0 = <&pinctrl_owire1>;
214	status = "okay";
215};
216
217&pmicleds {
218	ledr1: led@3 {
219		reg = <3>;
220		label = "system:red1:user";
221	};
222
223	ledg1: led@4 {
224		reg = <4>;
225		label = "system:green1:user";
226	};
227
228	ledb1: led@5 {
229		reg = <5>;
230		label = "system:blue1:user";
231	};
232
233	ledr2: led@6 {
234		reg = <6>;
235		label = "system:red2:user";
236	};
237
238	ledg2: led@7 {
239		reg = <7>;
240		label = "system:green2:user";
241	};
242
243	ledb2: led@8 {
244		reg = <8>;
245		label = "system:blue2:user";
246	};
247
248	ledr3: led@9 {
249		reg = <9>;
250		label = "system:red3:nand";
251		linux,default-trigger = "nand-disk";
252	};
253
254	ledg3: led@10 {
255		reg = <10>;
256		label = "system:green3:live";
257		linux,default-trigger = "heartbeat";
258	};
259
260	ledb3: led@11 {
261		reg = <11>;
262		label = "system:blue3:cpu";
263		linux,default-trigger = "cpu0";
264	};
265};
266
267&sdhci2 {
268	pinctrl-names = "default";
269	pinctrl-0 = <&pinctrl_sdhc2>;
270	bus-width = <4>;
271	cd-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
272	wp-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
273	vmmc-supply = <&vmmc1_reg>;
274	status = "okay";
275};
276
277&uart1 {
278	uart-has-rtscts;
279	pinctrl-names = "default";
280	pinctrl-0 = <&pinctrl_uart1>;
281	status = "okay";
282};
283
284&uart2 {
285	uart-has-rtscts;
286	pinctrl-names = "default";
287	pinctrl-0 = <&pinctrl_uart2>;
288	status = "okay";
289};
290
291&usbh2 {
292	pinctrl-names = "default";
293	pinctrl-0 = <&pinctrl_usbh2>;
294	dr_mode = "host";
295	phy_type = "ulpi";
296	vbus-supply = <&reg_5v0>;
297	fsl,usbphy = <&usbphy2>;
298	disable-over-current;
299	status = "okay";
300};
301
302&weim {
303	pinctrl-names = "default";
304	pinctrl-0 = <&pinctrl_weim>;
305
306	can@4,0 {
307		compatible = "nxp,sja1000";
308		reg = <4 0x00000000 0x00000100>;
309		interrupt-parent = <&gpio5>;
310		interrupts = <19 IRQ_TYPE_EDGE_FALLING>;
311		nxp,external-clock-frequency = <16000000>;
312		nxp,tx-output-config = <0x16>;
313		nxp,no-comparator-bypass;
314		fsl,weim-cs-timing = <0x0000dcf6 0x444a0301 0x44443302>;
315	};
316};
317