1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/renesas,etheravb.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Renesas Ethernet AVB 8 9maintainers: 10 - Sergei Shtylyov <sergei.shtylyov@gmail.com> 11 12properties: 13 compatible: 14 oneOf: 15 - items: 16 - enum: 17 - renesas,etheravb-r8a7742 # RZ/G1H 18 - renesas,etheravb-r8a7743 # RZ/G1M 19 - renesas,etheravb-r8a7744 # RZ/G1N 20 - renesas,etheravb-r8a7745 # RZ/G1E 21 - renesas,etheravb-r8a77470 # RZ/G1C 22 - renesas,etheravb-r8a7790 # R-Car H2 23 - renesas,etheravb-r8a7791 # R-Car M2-W 24 - renesas,etheravb-r8a7792 # R-Car V2H 25 - renesas,etheravb-r8a7793 # R-Car M2-N 26 - renesas,etheravb-r8a7794 # R-Car E2 27 - const: renesas,etheravb-rcar-gen2 # R-Car Gen2 and RZ/G1 28 29 - items: 30 - enum: 31 - renesas,etheravb-r8a774a1 # RZ/G2M 32 - renesas,etheravb-r8a774b1 # RZ/G2N 33 - renesas,etheravb-r8a774c0 # RZ/G2E 34 - renesas,etheravb-r8a774e1 # RZ/G2H 35 - renesas,etheravb-r8a7795 # R-Car H3 36 - renesas,etheravb-r8a7796 # R-Car M3-W 37 - renesas,etheravb-r8a77961 # R-Car M3-W+ 38 - renesas,etheravb-r8a77965 # R-Car M3-N 39 - renesas,etheravb-r8a77970 # R-Car V3M 40 - renesas,etheravb-r8a77980 # R-Car V3H 41 - renesas,etheravb-r8a77990 # R-Car E3 42 - renesas,etheravb-r8a77995 # R-Car D3 43 - const: renesas,etheravb-rcar-gen3 # R-Car Gen3 and RZ/G2 44 45 - items: 46 - enum: 47 - renesas,etheravb-r8a779a0 # R-Car V3U 48 - renesas,etheravb-r8a779g0 # R-Car V4H 49 - const: renesas,etheravb-rcar-gen4 # R-Car Gen4 50 51 - items: 52 - enum: 53 - renesas,etheravb-r9a09g011 # RZ/V2M 54 - const: renesas,etheravb-rzv2m # RZ/V2M compatible 55 56 - items: 57 - enum: 58 - renesas,r9a07g043-gbeth # RZ/G2UL 59 - renesas,r9a07g044-gbeth # RZ/G2{L,LC} 60 - renesas,r9a07g054-gbeth # RZ/V2L 61 - const: renesas,rzg2l-gbeth # RZ/{G2L,G2UL,V2L} family 62 63 reg: true 64 65 interrupts: true 66 67 interrupt-names: true 68 69 clocks: true 70 71 clock-names: true 72 73 iommus: 74 maxItems: 1 75 76 power-domains: 77 maxItems: 1 78 79 resets: 80 maxItems: 1 81 82 phy-mode: true 83 84 phy-handle: true 85 86 '#address-cells': 87 description: Number of address cells for the MDIO bus. 88 const: 1 89 90 '#size-cells': 91 description: Number of size cells on the MDIO bus. 92 const: 0 93 94 renesas,no-ether-link: 95 type: boolean 96 description: 97 Specify when a board does not provide a proper AVB_LINK signal. 98 99 renesas,ether-link-active-low: 100 type: boolean 101 description: 102 Specify when the AVB_LINK signal is active-low instead of normal 103 active-high. 104 105 rx-internal-delay-ps: 106 enum: [0, 1800] 107 108 tx-internal-delay-ps: 109 enum: [0, 2000] 110 111patternProperties: 112 "^ethernet-phy@[0-9a-f]$": 113 type: object 114 $ref: ethernet-phy.yaml# 115 116required: 117 - compatible 118 - reg 119 - interrupts 120 - clocks 121 - power-domains 122 - resets 123 - phy-mode 124 - phy-handle 125 - '#address-cells' 126 - '#size-cells' 127 128allOf: 129 - $ref: ethernet-controller.yaml# 130 131 - if: 132 properties: 133 compatible: 134 contains: 135 enum: 136 - renesas,etheravb-rcar-gen2 137 - renesas,etheravb-r8a7795 138 - renesas,etheravb-r8a7796 139 - renesas,etheravb-r8a77961 140 - renesas,etheravb-r8a77965 141 then: 142 properties: 143 reg: 144 items: 145 - description: MAC register block 146 - description: Stream buffer 147 else: 148 properties: 149 reg: 150 items: 151 - description: MAC register block 152 153 - if: 154 properties: 155 compatible: 156 contains: 157 enum: 158 - renesas,etheravb-rcar-gen2 159 - renesas,rzg2l-gbeth 160 then: 161 properties: 162 interrupts: 163 minItems: 1 164 maxItems: 3 165 interrupt-names: 166 minItems: 1 167 items: 168 - const: mux 169 - const: fil 170 - const: arp_ns 171 rx-internal-delay-ps: false 172 else: 173 if: 174 properties: 175 compatible: 176 contains: 177 const: renesas,etheravb-rzv2m 178 then: 179 properties: 180 interrupts: 181 minItems: 29 182 maxItems: 29 183 interrupt-names: 184 items: 185 pattern: '^(ch(1?)[0-9])|ch20|ch21|dia|dib|err_a|err_b|mgmt_a|mgmt_b|line3$' 186 rx-internal-delay-ps: false 187 required: 188 - interrupt-names 189 else: 190 properties: 191 interrupts: 192 minItems: 25 193 maxItems: 25 194 interrupt-names: 195 items: 196 pattern: '^ch[0-9]+$' 197 required: 198 - interrupt-names 199 - rx-internal-delay-ps 200 201 - if: 202 properties: 203 compatible: 204 contains: 205 enum: 206 - renesas,etheravb-r8a774a1 207 - renesas,etheravb-r8a774b1 208 - renesas,etheravb-r8a774e1 209 - renesas,etheravb-r8a7795 210 - renesas,etheravb-r8a7796 211 - renesas,etheravb-r8a77961 212 - renesas,etheravb-r8a77965 213 - renesas,etheravb-r8a77970 214 - renesas,etheravb-r8a77980 215 - renesas,etheravb-rcar-gen4 216 then: 217 required: 218 - tx-internal-delay-ps 219 else: 220 properties: 221 tx-internal-delay-ps: false 222 223 - if: 224 properties: 225 compatible: 226 contains: 227 const: renesas,etheravb-r8a77995 228 then: 229 properties: 230 rx-internal-delay-ps: 231 const: 1800 232 233 - if: 234 properties: 235 compatible: 236 contains: 237 const: renesas,etheravb-r8a77980 238 then: 239 properties: 240 tx-internal-delay-ps: 241 const: 2000 242 243 - if: 244 properties: 245 compatible: 246 contains: 247 const: renesas,rzg2l-gbeth 248 then: 249 properties: 250 clocks: 251 items: 252 - description: Main clock 253 - description: Register access clock 254 - description: Reference clock for RGMII 255 clock-names: 256 items: 257 - const: axi 258 - const: chi 259 - const: refclk 260 else: 261 if: 262 properties: 263 compatible: 264 contains: 265 const: renesas,etheravb-rzv2m 266 then: 267 properties: 268 clocks: 269 items: 270 - description: Main clock 271 - description: Coherent Hub Interface clock 272 - description: gPTP reference clock 273 clock-names: 274 items: 275 - const: axi 276 - const: chi 277 - const: gptp 278 else: 279 properties: 280 clocks: 281 minItems: 1 282 items: 283 - description: AVB functional clock 284 - description: Optional TXC reference clock 285 clock-names: 286 minItems: 1 287 items: 288 - const: fck 289 - const: refclk 290 291additionalProperties: false 292 293examples: 294 - | 295 #include <dt-bindings/clock/r8a7795-cpg-mssr.h> 296 #include <dt-bindings/interrupt-controller/arm-gic.h> 297 #include <dt-bindings/power/r8a7795-sysc.h> 298 #include <dt-bindings/gpio/gpio.h> 299 aliases { 300 ethernet0 = &avb; 301 }; 302 303 avb: ethernet@e6800000 { 304 compatible = "renesas,etheravb-r8a7795", 305 "renesas,etheravb-rcar-gen3"; 306 reg = <0xe6800000 0x800>, <0xe6a00000 0x10000>; 307 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 308 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 309 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 310 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 311 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 312 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 313 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 314 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 315 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 316 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 317 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 318 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 319 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 320 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 321 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 322 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 323 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 324 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 325 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 326 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 327 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 328 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 329 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 330 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 331 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 332 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", 333 "ch7", "ch8", "ch9", "ch10", "ch11", "ch12", 334 "ch13", "ch14", "ch15", "ch16", "ch17", "ch18", 335 "ch19", "ch20", "ch21", "ch22", "ch23", "ch24"; 336 clocks = <&cpg CPG_MOD 812>; 337 clock-names = "fck"; 338 iommus = <&ipmmu_ds0 16>; 339 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 340 resets = <&cpg 812>; 341 phy-mode = "rgmii"; 342 phy-handle = <&phy0>; 343 rx-internal-delay-ps = <0>; 344 tx-internal-delay-ps = <2000>; 345 #address-cells = <1>; 346 #size-cells = <0>; 347 348 phy0: ethernet-phy@0 { 349 compatible = "ethernet-phy-id0022.1622", 350 "ethernet-phy-ieee802.3-c22"; 351 rxc-skew-ps = <1500>; 352 reg = <0>; 353 interrupt-parent = <&gpio2>; 354 interrupts = <11 IRQ_TYPE_LEVEL_LOW>; 355 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; 356 }; 357 }; 358