1 // SPDX-License-Identifier: GPL-2.0-only
2 /******************************************************************************
3 *
4 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
5 *
6 * Portions of this file are derived from the ipw3945 project, as well
7 * as portions of the ieee80211 subsystem header files.
8 *
9 * Contact Information:
10 * Intel Linux Wireless <ilw@linux.intel.com>
11 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
12 *
13 *****************************************************************************/
14
15 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/pci.h>
21 #include <linux/slab.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/delay.h>
24 #include <linux/sched.h>
25 #include <linux/skbuff.h>
26 #include <linux/netdevice.h>
27 #include <linux/firmware.h>
28 #include <linux/etherdevice.h>
29 #include <linux/if_arp.h>
30
31 #include <net/ieee80211_radiotap.h>
32 #include <net/mac80211.h>
33
34 #include <asm/div64.h>
35
36 #define DRV_NAME "iwl3945"
37
38 #include "commands.h"
39 #include "common.h"
40 #include "3945.h"
41 #include "iwl-spectrum.h"
42
43 /*
44 * module name, copyright, version, etc.
45 */
46
47 #define DRV_DESCRIPTION \
48 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
49
50 #ifdef CONFIG_IWLEGACY_DEBUG
51 #define VD "d"
52 #else
53 #define VD
54 #endif
55
56 /*
57 * add "s" to indicate spectrum measurement included.
58 * we add it here to be consistent with previous releases in which
59 * this was configurable.
60 */
61 #define DRV_VERSION IWLWIFI_VERSION VD "s"
62 #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation"
63 #define DRV_AUTHOR "<ilw@linux.intel.com>"
64
65 MODULE_DESCRIPTION(DRV_DESCRIPTION);
66 MODULE_VERSION(DRV_VERSION);
67 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
68 MODULE_LICENSE("GPL");
69
70 /* module parameters */
71 struct il_mod_params il3945_mod_params = {
72 .sw_crypto = 1,
73 .restart_fw = 1,
74 .disable_hw_scan = 1,
75 /* the rest are 0 by default */
76 };
77
78 /**
79 * il3945_get_antenna_flags - Get antenna flags for RXON command
80 * @il: eeprom and antenna fields are used to determine antenna flags
81 *
82 * il->eeprom39 is used to determine if antenna AUX/MAIN are reversed
83 * il3945_mod_params.antenna specifies the antenna diversity mode:
84 *
85 * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
86 * IL_ANTENNA_MAIN - Force MAIN antenna
87 * IL_ANTENNA_AUX - Force AUX antenna
88 */
89 __le32
il3945_get_antenna_flags(const struct il_priv * il)90 il3945_get_antenna_flags(const struct il_priv *il)
91 {
92 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
93
94 switch (il3945_mod_params.antenna) {
95 case IL_ANTENNA_DIVERSITY:
96 return 0;
97
98 case IL_ANTENNA_MAIN:
99 if (eeprom->antenna_switch_type)
100 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
101 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
102
103 case IL_ANTENNA_AUX:
104 if (eeprom->antenna_switch_type)
105 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
106 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
107 }
108
109 /* bad antenna selector value */
110 IL_ERR("Bad antenna selector value (0x%x)\n",
111 il3945_mod_params.antenna);
112
113 return 0; /* "diversity" is default if error */
114 }
115
116 static int
il3945_set_ccmp_dynamic_key_info(struct il_priv * il,struct ieee80211_key_conf * keyconf,u8 sta_id)117 il3945_set_ccmp_dynamic_key_info(struct il_priv *il,
118 struct ieee80211_key_conf *keyconf, u8 sta_id)
119 {
120 unsigned long flags;
121 __le16 key_flags = 0;
122 int ret;
123
124 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
125 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
126
127 if (sta_id == il->hw_params.bcast_id)
128 key_flags |= STA_KEY_MULTICAST_MSK;
129
130 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
131 keyconf->hw_key_idx = keyconf->keyidx;
132 key_flags &= ~STA_KEY_FLG_INVALID;
133
134 spin_lock_irqsave(&il->sta_lock, flags);
135 il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
136 il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
137 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen);
138
139 memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen);
140
141 if ((il->stations[sta_id].sta.key.
142 key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
143 il->stations[sta_id].sta.key.key_offset =
144 il_get_free_ucode_key_idx(il);
145 /* else, we are overriding an existing key => no need to allocated room
146 * in uCode. */
147
148 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
149 "no space for a new key");
150
151 il->stations[sta_id].sta.key.key_flags = key_flags;
152 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
153 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
154
155 D_INFO("hwcrypto: modify ucode station key info\n");
156
157 ret = il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC);
158
159 spin_unlock_irqrestore(&il->sta_lock, flags);
160
161 return ret;
162 }
163
164 static int
il3945_set_tkip_dynamic_key_info(struct il_priv * il,struct ieee80211_key_conf * keyconf,u8 sta_id)165 il3945_set_tkip_dynamic_key_info(struct il_priv *il,
166 struct ieee80211_key_conf *keyconf, u8 sta_id)
167 {
168 return -EOPNOTSUPP;
169 }
170
171 static int
il3945_set_wep_dynamic_key_info(struct il_priv * il,struct ieee80211_key_conf * keyconf,u8 sta_id)172 il3945_set_wep_dynamic_key_info(struct il_priv *il,
173 struct ieee80211_key_conf *keyconf, u8 sta_id)
174 {
175 return -EOPNOTSUPP;
176 }
177
178 static int
il3945_clear_sta_key_info(struct il_priv * il,u8 sta_id)179 il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id)
180 {
181 unsigned long flags;
182 struct il_addsta_cmd sta_cmd;
183
184 spin_lock_irqsave(&il->sta_lock, flags);
185 memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key));
186 memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo));
187 il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
188 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
189 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
190 memcpy(&sta_cmd, &il->stations[sta_id].sta,
191 sizeof(struct il_addsta_cmd));
192 spin_unlock_irqrestore(&il->sta_lock, flags);
193
194 D_INFO("hwcrypto: clear ucode station key info\n");
195 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
196 }
197
198 static int
il3945_set_dynamic_key(struct il_priv * il,struct ieee80211_key_conf * keyconf,u8 sta_id)199 il3945_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf,
200 u8 sta_id)
201 {
202 int ret = 0;
203
204 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
205
206 switch (keyconf->cipher) {
207 case WLAN_CIPHER_SUITE_CCMP:
208 ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id);
209 break;
210 case WLAN_CIPHER_SUITE_TKIP:
211 ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id);
212 break;
213 case WLAN_CIPHER_SUITE_WEP40:
214 case WLAN_CIPHER_SUITE_WEP104:
215 ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id);
216 break;
217 default:
218 IL_ERR("Unknown alg: %s alg=%x\n", __func__, keyconf->cipher);
219 ret = -EINVAL;
220 }
221
222 D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
223 keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret);
224
225 return ret;
226 }
227
228 static int
il3945_remove_static_key(struct il_priv * il)229 il3945_remove_static_key(struct il_priv *il)
230 {
231 return -EOPNOTSUPP;
232 }
233
234 static int
il3945_set_static_key(struct il_priv * il,struct ieee80211_key_conf * key)235 il3945_set_static_key(struct il_priv *il, struct ieee80211_key_conf *key)
236 {
237 if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
238 key->cipher == WLAN_CIPHER_SUITE_WEP104)
239 return -EOPNOTSUPP;
240
241 IL_ERR("Static key invalid: cipher %x\n", key->cipher);
242 return -EINVAL;
243 }
244
245 static void
il3945_clear_free_frames(struct il_priv * il)246 il3945_clear_free_frames(struct il_priv *il)
247 {
248 struct list_head *element;
249
250 D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count);
251
252 while (!list_empty(&il->free_frames)) {
253 element = il->free_frames.next;
254 list_del(element);
255 kfree(list_entry(element, struct il3945_frame, list));
256 il->frames_count--;
257 }
258
259 if (il->frames_count) {
260 IL_WARN("%d frames still in use. Did we lose one?\n",
261 il->frames_count);
262 il->frames_count = 0;
263 }
264 }
265
266 static struct il3945_frame *
il3945_get_free_frame(struct il_priv * il)267 il3945_get_free_frame(struct il_priv *il)
268 {
269 struct il3945_frame *frame;
270 struct list_head *element;
271 if (list_empty(&il->free_frames)) {
272 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
273 if (!frame) {
274 IL_ERR("Could not allocate frame!\n");
275 return NULL;
276 }
277
278 il->frames_count++;
279 return frame;
280 }
281
282 element = il->free_frames.next;
283 list_del(element);
284 return list_entry(element, struct il3945_frame, list);
285 }
286
287 static void
il3945_free_frame(struct il_priv * il,struct il3945_frame * frame)288 il3945_free_frame(struct il_priv *il, struct il3945_frame *frame)
289 {
290 memset(frame, 0, sizeof(*frame));
291 list_add(&frame->list, &il->free_frames);
292 }
293
294 unsigned int
il3945_fill_beacon_frame(struct il_priv * il,struct ieee80211_hdr * hdr,int left)295 il3945_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr,
296 int left)
297 {
298
299 if (!il_is_associated(il) || !il->beacon_skb)
300 return 0;
301
302 if (il->beacon_skb->len > left)
303 return 0;
304
305 memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len);
306
307 return il->beacon_skb->len;
308 }
309
310 static int
il3945_send_beacon_cmd(struct il_priv * il)311 il3945_send_beacon_cmd(struct il_priv *il)
312 {
313 struct il3945_frame *frame;
314 unsigned int frame_size;
315 int rc;
316 u8 rate;
317
318 frame = il3945_get_free_frame(il);
319
320 if (!frame) {
321 IL_ERR("Could not obtain free frame buffer for beacon "
322 "command.\n");
323 return -ENOMEM;
324 }
325
326 rate = il_get_lowest_plcp(il);
327
328 frame_size = il3945_hw_get_beacon_cmd(il, frame, rate);
329
330 rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]);
331
332 il3945_free_frame(il, frame);
333
334 return rc;
335 }
336
337 static void
il3945_unset_hw_params(struct il_priv * il)338 il3945_unset_hw_params(struct il_priv *il)
339 {
340 if (il->_3945.shared_virt)
341 dma_free_coherent(&il->pci_dev->dev,
342 sizeof(struct il3945_shared),
343 il->_3945.shared_virt, il->_3945.shared_phys);
344 }
345
346 static void
il3945_build_tx_cmd_hwcrypto(struct il_priv * il,struct ieee80211_tx_info * info,struct il_device_cmd * cmd,struct sk_buff * skb_frag,int sta_id)347 il3945_build_tx_cmd_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info,
348 struct il_device_cmd *cmd,
349 struct sk_buff *skb_frag, int sta_id)
350 {
351 struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
352 struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo;
353
354 tx_cmd->sec_ctl = 0;
355
356 switch (keyinfo->cipher) {
357 case WLAN_CIPHER_SUITE_CCMP:
358 tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
359 memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
360 D_TX("tx_cmd with AES hwcrypto\n");
361 break;
362
363 case WLAN_CIPHER_SUITE_TKIP:
364 break;
365
366 case WLAN_CIPHER_SUITE_WEP104:
367 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
368 fallthrough;
369 case WLAN_CIPHER_SUITE_WEP40:
370 tx_cmd->sec_ctl |=
371 TX_CMD_SEC_WEP | (info->control.hw_key->
372 hw_key_idx & TX_CMD_SEC_MSK) <<
373 TX_CMD_SEC_SHIFT;
374
375 memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
376
377 D_TX("Configuring packet for WEP encryption " "with key %d\n",
378 info->control.hw_key->hw_key_idx);
379 break;
380
381 default:
382 IL_ERR("Unknown encode cipher %x\n", keyinfo->cipher);
383 break;
384 }
385 }
386
387 /*
388 * handle build C_TX command notification.
389 */
390 static void
il3945_build_tx_cmd_basic(struct il_priv * il,struct il_device_cmd * cmd,struct ieee80211_tx_info * info,struct ieee80211_hdr * hdr,u8 std_id)391 il3945_build_tx_cmd_basic(struct il_priv *il, struct il_device_cmd *cmd,
392 struct ieee80211_tx_info *info,
393 struct ieee80211_hdr *hdr, u8 std_id)
394 {
395 struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
396 __le32 tx_flags = tx_cmd->tx_flags;
397 __le16 fc = hdr->frame_control;
398
399 tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
400 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
401 tx_flags |= TX_CMD_FLG_ACK_MSK;
402 if (ieee80211_is_mgmt(fc))
403 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
404 if (ieee80211_is_probe_resp(fc) &&
405 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
406 tx_flags |= TX_CMD_FLG_TSF_MSK;
407 } else {
408 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
409 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
410 }
411
412 tx_cmd->sta_id = std_id;
413 if (ieee80211_has_morefrags(fc))
414 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
415
416 if (ieee80211_is_data_qos(fc)) {
417 u8 *qc = ieee80211_get_qos_ctl(hdr);
418 tx_cmd->tid_tspec = qc[0] & 0xf;
419 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
420 } else {
421 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
422 }
423
424 il_tx_cmd_protection(il, info, fc, &tx_flags);
425
426 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
427 if (ieee80211_is_mgmt(fc)) {
428 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
429 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
430 else
431 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
432 } else {
433 tx_cmd->timeout.pm_frame_timeout = 0;
434 }
435
436 tx_cmd->driver_txop = 0;
437 tx_cmd->tx_flags = tx_flags;
438 tx_cmd->next_frame_len = 0;
439 }
440
441 /*
442 * start C_TX command process
443 */
444 static int
il3945_tx_skb(struct il_priv * il,struct ieee80211_sta * sta,struct sk_buff * skb)445 il3945_tx_skb(struct il_priv *il,
446 struct ieee80211_sta *sta,
447 struct sk_buff *skb)
448 {
449 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
450 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
451 struct il3945_tx_cmd *tx_cmd;
452 struct il_tx_queue *txq = NULL;
453 struct il_queue *q = NULL;
454 struct il_device_cmd *out_cmd;
455 struct il_cmd_meta *out_meta;
456 dma_addr_t phys_addr;
457 dma_addr_t txcmd_phys;
458 int txq_id = skb_get_queue_mapping(skb);
459 u16 len, idx, hdr_len;
460 u16 firstlen, secondlen;
461 u8 sta_id;
462 u8 tid = 0;
463 __le16 fc;
464 u8 wait_write_ptr = 0;
465 unsigned long flags;
466
467 spin_lock_irqsave(&il->lock, flags);
468 if (il_is_rfkill(il)) {
469 D_DROP("Dropping - RF KILL\n");
470 goto drop_unlock;
471 }
472
473 if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) ==
474 IL_INVALID_RATE) {
475 IL_ERR("ERROR: No TX rate available.\n");
476 goto drop_unlock;
477 }
478
479 fc = hdr->frame_control;
480
481 #ifdef CONFIG_IWLEGACY_DEBUG
482 if (ieee80211_is_auth(fc))
483 D_TX("Sending AUTH frame\n");
484 else if (ieee80211_is_assoc_req(fc))
485 D_TX("Sending ASSOC frame\n");
486 else if (ieee80211_is_reassoc_req(fc))
487 D_TX("Sending REASSOC frame\n");
488 #endif
489
490 spin_unlock_irqrestore(&il->lock, flags);
491
492 hdr_len = ieee80211_hdrlen(fc);
493
494 /* Find idx into station table for destination station */
495 sta_id = il_sta_id_or_broadcast(il, sta);
496 if (sta_id == IL_INVALID_STATION) {
497 D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1);
498 goto drop;
499 }
500
501 D_RATE("station Id %d\n", sta_id);
502
503 if (ieee80211_is_data_qos(fc)) {
504 u8 *qc = ieee80211_get_qos_ctl(hdr);
505 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
506 if (unlikely(tid >= MAX_TID_COUNT))
507 goto drop;
508 }
509
510 /* Descriptor for chosen Tx queue */
511 txq = &il->txq[txq_id];
512 q = &txq->q;
513
514 if ((il_queue_space(q) < q->high_mark))
515 goto drop;
516
517 spin_lock_irqsave(&il->lock, flags);
518
519 idx = il_get_cmd_idx(q, q->write_ptr, 0);
520
521 txq->skbs[q->write_ptr] = skb;
522
523 /* Init first empty entry in queue's array of Tx/cmd buffers */
524 out_cmd = txq->cmd[idx];
525 out_meta = &txq->meta[idx];
526 tx_cmd = (struct il3945_tx_cmd *)out_cmd->cmd.payload;
527 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
528 memset(tx_cmd, 0, sizeof(*tx_cmd));
529
530 /*
531 * Set up the Tx-command (not MAC!) header.
532 * Store the chosen Tx queue and TFD idx within the sequence field;
533 * after Tx, uCode's Tx response will return this value so driver can
534 * locate the frame within the tx queue and do post-tx processing.
535 */
536 out_cmd->hdr.cmd = C_TX;
537 out_cmd->hdr.sequence =
538 cpu_to_le16((u16)
539 (QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr)));
540
541 /* Copy MAC header from skb into command buffer */
542 memcpy(tx_cmd->hdr, hdr, hdr_len);
543
544 if (info->control.hw_key)
545 il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id);
546
547 /* TODO need this for burst mode later on */
548 il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id);
549
550 il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id);
551
552 /* Total # bytes to be transmitted */
553 tx_cmd->len = cpu_to_le16((u16) skb->len);
554
555 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
556 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
557
558 /*
559 * Use the first empty entry in this queue's command buffer array
560 * to contain the Tx command and MAC header concatenated together
561 * (payload data will be in another buffer).
562 * Size of this varies, due to varying MAC header length.
563 * If end is not dword aligned, we'll have 2 extra bytes at the end
564 * of the MAC header (device reads on dword boundaries).
565 * We'll tell device about this padding later.
566 */
567 len =
568 sizeof(struct il3945_tx_cmd) + sizeof(struct il_cmd_header) +
569 hdr_len;
570 firstlen = (len + 3) & ~3;
571
572 /* Physical address of this Tx command's header (not MAC header!),
573 * within command buffer array. */
574 txcmd_phys = dma_map_single(&il->pci_dev->dev, &out_cmd->hdr, firstlen,
575 DMA_TO_DEVICE);
576 if (unlikely(dma_mapping_error(&il->pci_dev->dev, txcmd_phys)))
577 goto drop_unlock;
578
579 /* Set up TFD's 2nd entry to point directly to remainder of skb,
580 * if any (802.11 null frames have no payload). */
581 secondlen = skb->len - hdr_len;
582 if (secondlen > 0) {
583 phys_addr = dma_map_single(&il->pci_dev->dev, skb->data + hdr_len,
584 secondlen, DMA_TO_DEVICE);
585 if (unlikely(dma_mapping_error(&il->pci_dev->dev, phys_addr)))
586 goto drop_unlock;
587 }
588
589 /* Add buffer containing Tx command and MAC(!) header to TFD's
590 * first entry */
591 il->ops->txq_attach_buf_to_tfd(il, txq, txcmd_phys, firstlen, 1, 0);
592 dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
593 dma_unmap_len_set(out_meta, len, firstlen);
594 if (secondlen > 0)
595 il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, secondlen, 0,
596 U32_PAD(secondlen));
597
598 if (!ieee80211_has_morefrags(hdr->frame_control)) {
599 txq->need_update = 1;
600 } else {
601 wait_write_ptr = 1;
602 txq->need_update = 0;
603 }
604
605 il_update_stats(il, true, fc, skb->len);
606
607 D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence));
608 D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
609 il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd));
610 il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr,
611 ieee80211_hdrlen(fc));
612
613 /* Tell device the write idx *just past* this latest filled TFD */
614 q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
615 il_txq_update_write_ptr(il, txq);
616 spin_unlock_irqrestore(&il->lock, flags);
617
618 if (il_queue_space(q) < q->high_mark && il->mac80211_registered) {
619 if (wait_write_ptr) {
620 spin_lock_irqsave(&il->lock, flags);
621 txq->need_update = 1;
622 il_txq_update_write_ptr(il, txq);
623 spin_unlock_irqrestore(&il->lock, flags);
624 }
625
626 il_stop_queue(il, txq);
627 }
628
629 return 0;
630
631 drop_unlock:
632 spin_unlock_irqrestore(&il->lock, flags);
633 drop:
634 return -1;
635 }
636
637 static int
il3945_get_measurement(struct il_priv * il,struct ieee80211_measurement_params * params,u8 type)638 il3945_get_measurement(struct il_priv *il,
639 struct ieee80211_measurement_params *params, u8 type)
640 {
641 struct il_spectrum_cmd spectrum;
642 struct il_rx_pkt *pkt;
643 struct il_host_cmd cmd = {
644 .id = C_SPECTRUM_MEASUREMENT,
645 .data = (void *)&spectrum,
646 .flags = CMD_WANT_SKB,
647 };
648 u32 add_time = le64_to_cpu(params->start_time);
649 int rc;
650 int spectrum_resp_status;
651 int duration = le16_to_cpu(params->duration);
652
653 if (il_is_associated(il))
654 add_time =
655 il_usecs_to_beacons(il,
656 le64_to_cpu(params->start_time) -
657 il->_3945.last_tsf,
658 le16_to_cpu(il->timing.beacon_interval));
659
660 memset(&spectrum, 0, sizeof(spectrum));
661
662 spectrum.channel_count = cpu_to_le16(1);
663 spectrum.flags =
664 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
665 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
666 cmd.len = sizeof(spectrum);
667 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
668
669 if (il_is_associated(il))
670 spectrum.start_time =
671 il_add_beacon_time(il, il->_3945.last_beacon_time, add_time,
672 le16_to_cpu(il->timing.beacon_interval));
673 else
674 spectrum.start_time = 0;
675
676 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
677 spectrum.channels[0].channel = params->channel;
678 spectrum.channels[0].type = type;
679 if (il->active.flags & RXON_FLG_BAND_24G_MSK)
680 spectrum.flags |=
681 RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
682 RXON_FLG_TGG_PROTECT_MSK;
683
684 rc = il_send_cmd_sync(il, &cmd);
685 if (rc)
686 return rc;
687
688 pkt = (struct il_rx_pkt *)cmd.reply_page;
689 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
690 IL_ERR("Bad return from N_RX_ON_ASSOC command\n");
691 rc = -EIO;
692 }
693
694 spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
695 switch (spectrum_resp_status) {
696 case 0: /* Command will be handled */
697 if (pkt->u.spectrum.id != 0xff) {
698 D_INFO("Replaced existing measurement: %d\n",
699 pkt->u.spectrum.id);
700 il->measurement_status &= ~MEASUREMENT_READY;
701 }
702 il->measurement_status |= MEASUREMENT_ACTIVE;
703 rc = 0;
704 break;
705
706 case 1: /* Command will not be handled */
707 rc = -EAGAIN;
708 break;
709 }
710
711 il_free_pages(il, cmd.reply_page);
712
713 return rc;
714 }
715
716 static void
il3945_hdl_alive(struct il_priv * il,struct il_rx_buf * rxb)717 il3945_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb)
718 {
719 struct il_rx_pkt *pkt = rxb_addr(rxb);
720 struct il_alive_resp *palive;
721 struct delayed_work *pwork;
722
723 palive = &pkt->u.alive_frame;
724
725 D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n",
726 palive->is_valid, palive->ver_type, palive->ver_subtype);
727
728 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
729 D_INFO("Initialization Alive received.\n");
730 memcpy(&il->card_alive_init, &pkt->u.alive_frame,
731 sizeof(struct il_alive_resp));
732 pwork = &il->init_alive_start;
733 } else {
734 D_INFO("Runtime Alive received.\n");
735 memcpy(&il->card_alive, &pkt->u.alive_frame,
736 sizeof(struct il_alive_resp));
737 pwork = &il->alive_start;
738 il3945_disable_events(il);
739 }
740
741 /* We delay the ALIVE response by 5ms to
742 * give the HW RF Kill time to activate... */
743 if (palive->is_valid == UCODE_VALID_OK)
744 queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5));
745 else
746 IL_WARN("uCode did not respond OK.\n");
747 }
748
749 static void
il3945_hdl_add_sta(struct il_priv * il,struct il_rx_buf * rxb)750 il3945_hdl_add_sta(struct il_priv *il, struct il_rx_buf *rxb)
751 {
752 struct il_rx_pkt *pkt = rxb_addr(rxb);
753
754 D_RX("Received C_ADD_STA: 0x%02X\n", pkt->u.status);
755 }
756
757 static void
il3945_hdl_beacon(struct il_priv * il,struct il_rx_buf * rxb)758 il3945_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb)
759 {
760 struct il_rx_pkt *pkt = rxb_addr(rxb);
761 struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status);
762 #ifdef CONFIG_IWLEGACY_DEBUG
763 u8 rate = beacon->beacon_notify_hdr.rate;
764
765 D_RX("beacon status %x retries %d iss %d " "tsf %d %d rate %d\n",
766 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
767 beacon->beacon_notify_hdr.failure_frame,
768 le32_to_cpu(beacon->ibss_mgr_status),
769 le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate);
770 #endif
771
772 il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
773
774 }
775
776 /* Handle notification from uCode that card's power state is changing
777 * due to software, hardware, or critical temperature RFKILL */
778 static void
il3945_hdl_card_state(struct il_priv * il,struct il_rx_buf * rxb)779 il3945_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb)
780 {
781 struct il_rx_pkt *pkt = rxb_addr(rxb);
782 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
783 unsigned long status = il->status;
784
785 IL_WARN("Card state received: HW:%s SW:%s\n",
786 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
787 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
788
789 _il_wr(il, CSR_UCODE_DRV_GP1_SET, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
790
791 if (flags & HW_CARD_DISABLED)
792 set_bit(S_RFKILL, &il->status);
793 else
794 clear_bit(S_RFKILL, &il->status);
795
796 il_scan_cancel(il);
797
798 if ((test_bit(S_RFKILL, &status) !=
799 test_bit(S_RFKILL, &il->status)))
800 wiphy_rfkill_set_hw_state(il->hw->wiphy,
801 test_bit(S_RFKILL, &il->status));
802 else
803 wake_up(&il->wait_command_queue);
804 }
805
806 /*
807 * il3945_setup_handlers - Initialize Rx handler callbacks
808 *
809 * Setup the RX handlers for each of the reply types sent from the uCode
810 * to the host.
811 *
812 * This function chains into the hardware specific files for them to setup
813 * any hardware specific handlers as well.
814 */
815 static void
il3945_setup_handlers(struct il_priv * il)816 il3945_setup_handlers(struct il_priv *il)
817 {
818 il->handlers[N_ALIVE] = il3945_hdl_alive;
819 il->handlers[C_ADD_STA] = il3945_hdl_add_sta;
820 il->handlers[N_ERROR] = il_hdl_error;
821 il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa;
822 il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement;
823 il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep;
824 il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats;
825 il->handlers[N_BEACON] = il3945_hdl_beacon;
826
827 /*
828 * The same handler is used for both the REPLY to a discrete
829 * stats request from the host as well as for the periodic
830 * stats notifications (after received beacons) from the uCode.
831 */
832 il->handlers[C_STATS] = il3945_hdl_c_stats;
833 il->handlers[N_STATS] = il3945_hdl_stats;
834
835 il_setup_rx_scan_handlers(il);
836 il->handlers[N_CARD_STATE] = il3945_hdl_card_state;
837
838 /* Set up hardware specific Rx handlers */
839 il3945_hw_handler_setup(il);
840 }
841
842 /************************** RX-FUNCTIONS ****************************/
843 /*
844 * Rx theory of operation
845 *
846 * The host allocates 32 DMA target addresses and passes the host address
847 * to the firmware at register IL_RFDS_TBL_LOWER + N * RFD_SIZE where N is
848 * 0 to 31
849 *
850 * Rx Queue Indexes
851 * The host/firmware share two idx registers for managing the Rx buffers.
852 *
853 * The READ idx maps to the first position that the firmware may be writing
854 * to -- the driver can read up to (but not including) this position and get
855 * good data.
856 * The READ idx is managed by the firmware once the card is enabled.
857 *
858 * The WRITE idx maps to the last position the driver has read from -- the
859 * position preceding WRITE is the last slot the firmware can place a packet.
860 *
861 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
862 * WRITE = READ.
863 *
864 * During initialization, the host sets up the READ queue position to the first
865 * IDX position, and WRITE to the last (READ - 1 wrapped)
866 *
867 * When the firmware places a packet in a buffer, it will advance the READ idx
868 * and fire the RX interrupt. The driver can then query the READ idx and
869 * process as many packets as possible, moving the WRITE idx forward as it
870 * resets the Rx queue buffers with new memory.
871 *
872 * The management in the driver is as follows:
873 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
874 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
875 * to replenish the iwl->rxq->rx_free.
876 * + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the
877 * iwl->rxq is replenished and the READ IDX is updated (updating the
878 * 'processed' and 'read' driver idxes as well)
879 * + A received packet is processed and handed to the kernel network stack,
880 * detached from the iwl->rxq. The driver 'processed' idx is updated.
881 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
882 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
883 * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
884 * were enough free buffers and RX_STALLED is set it is cleared.
885 *
886 *
887 * Driver sequence:
888 *
889 * il3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
890 * il3945_rx_queue_restock
891 * il3945_rx_queue_restock() Moves available buffers from rx_free into Rx
892 * queue, updates firmware pointers, and updates
893 * the WRITE idx. If insufficient rx_free buffers
894 * are available, schedules il3945_rx_replenish
895 *
896 * -- enable interrupts --
897 * ISR - il3945_rx() Detach il_rx_bufs from pool up to the
898 * READ IDX, detaching the SKB from the pool.
899 * Moves the packet buffer from queue to rx_used.
900 * Calls il3945_rx_queue_restock to refill any empty
901 * slots.
902 * ...
903 *
904 */
905
906 /*
907 * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
908 */
909 static inline __le32
il3945_dma_addr2rbd_ptr(struct il_priv * il,dma_addr_t dma_addr)910 il3945_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr)
911 {
912 return cpu_to_le32((u32) dma_addr);
913 }
914
915 /*
916 * il3945_rx_queue_restock - refill RX queue from pre-allocated pool
917 *
918 * If there are slots in the RX queue that need to be restocked,
919 * and we have free pre-allocated buffers, fill the ranks as much
920 * as we can, pulling from rx_free.
921 *
922 * This moves the 'write' idx forward to catch up with 'processed', and
923 * also updates the memory address in the firmware to reference the new
924 * target buffer.
925 */
926 static void
il3945_rx_queue_restock(struct il_priv * il)927 il3945_rx_queue_restock(struct il_priv *il)
928 {
929 struct il_rx_queue *rxq = &il->rxq;
930 struct list_head *element;
931 struct il_rx_buf *rxb;
932 unsigned long flags;
933
934 spin_lock_irqsave(&rxq->lock, flags);
935 while (il_rx_queue_space(rxq) > 0 && rxq->free_count) {
936 /* Get next free Rx buffer, remove from free list */
937 element = rxq->rx_free.next;
938 rxb = list_entry(element, struct il_rx_buf, list);
939 list_del(element);
940
941 /* Point to Rx buffer via next RBD in circular buffer */
942 rxq->bd[rxq->write] =
943 il3945_dma_addr2rbd_ptr(il, rxb->page_dma);
944 rxq->queue[rxq->write] = rxb;
945 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
946 rxq->free_count--;
947 }
948 spin_unlock_irqrestore(&rxq->lock, flags);
949 /* If the pre-allocated buffer pool is dropping low, schedule to
950 * refill it */
951 if (rxq->free_count <= RX_LOW_WATERMARK)
952 queue_work(il->workqueue, &il->rx_replenish);
953
954 /* If we've added more space for the firmware to place data, tell it.
955 * Increment device's write pointer in multiples of 8. */
956 if (rxq->write_actual != (rxq->write & ~0x7) ||
957 abs(rxq->write - rxq->read) > 7) {
958 spin_lock_irqsave(&rxq->lock, flags);
959 rxq->need_update = 1;
960 spin_unlock_irqrestore(&rxq->lock, flags);
961 il_rx_queue_update_write_ptr(il, rxq);
962 }
963 }
964
965 /*
966 * il3945_rx_replenish - Move all used packet from rx_used to rx_free
967 *
968 * When moving to rx_free an SKB is allocated for the slot.
969 *
970 * Also restock the Rx queue via il3945_rx_queue_restock.
971 * This is called as a scheduled work item (except for during initialization)
972 */
973 static void
il3945_rx_allocate(struct il_priv * il,gfp_t priority)974 il3945_rx_allocate(struct il_priv *il, gfp_t priority)
975 {
976 struct il_rx_queue *rxq = &il->rxq;
977 struct list_head *element;
978 struct il_rx_buf *rxb;
979 struct page *page;
980 dma_addr_t page_dma;
981 unsigned long flags;
982 gfp_t gfp_mask = priority;
983
984 while (1) {
985 spin_lock_irqsave(&rxq->lock, flags);
986 if (list_empty(&rxq->rx_used)) {
987 spin_unlock_irqrestore(&rxq->lock, flags);
988 return;
989 }
990 spin_unlock_irqrestore(&rxq->lock, flags);
991
992 if (rxq->free_count > RX_LOW_WATERMARK)
993 gfp_mask |= __GFP_NOWARN;
994
995 if (il->hw_params.rx_page_order > 0)
996 gfp_mask |= __GFP_COMP;
997
998 /* Alloc a new receive buffer */
999 page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
1000 if (!page) {
1001 if (net_ratelimit())
1002 D_INFO("Failed to allocate SKB buffer.\n");
1003 if (rxq->free_count <= RX_LOW_WATERMARK &&
1004 net_ratelimit())
1005 IL_ERR("Failed to allocate SKB buffer with %0x."
1006 "Only %u free buffers remaining.\n",
1007 priority, rxq->free_count);
1008 /* We don't reschedule replenish work here -- we will
1009 * call the restock method and if it still needs
1010 * more buffers it will schedule replenish */
1011 break;
1012 }
1013
1014 /* Get physical address of RB/SKB */
1015 page_dma =
1016 dma_map_page(&il->pci_dev->dev, page, 0,
1017 PAGE_SIZE << il->hw_params.rx_page_order,
1018 DMA_FROM_DEVICE);
1019
1020 if (unlikely(dma_mapping_error(&il->pci_dev->dev, page_dma))) {
1021 __free_pages(page, il->hw_params.rx_page_order);
1022 break;
1023 }
1024
1025 spin_lock_irqsave(&rxq->lock, flags);
1026
1027 if (list_empty(&rxq->rx_used)) {
1028 spin_unlock_irqrestore(&rxq->lock, flags);
1029 dma_unmap_page(&il->pci_dev->dev, page_dma,
1030 PAGE_SIZE << il->hw_params.rx_page_order,
1031 DMA_FROM_DEVICE);
1032 __free_pages(page, il->hw_params.rx_page_order);
1033 return;
1034 }
1035
1036 element = rxq->rx_used.next;
1037 rxb = list_entry(element, struct il_rx_buf, list);
1038 list_del(element);
1039
1040 rxb->page = page;
1041 rxb->page_dma = page_dma;
1042 list_add_tail(&rxb->list, &rxq->rx_free);
1043 rxq->free_count++;
1044 il->alloc_rxb_page++;
1045
1046 spin_unlock_irqrestore(&rxq->lock, flags);
1047 }
1048 }
1049
1050 void
il3945_rx_queue_reset(struct il_priv * il,struct il_rx_queue * rxq)1051 il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
1052 {
1053 unsigned long flags;
1054 int i;
1055 spin_lock_irqsave(&rxq->lock, flags);
1056 INIT_LIST_HEAD(&rxq->rx_free);
1057 INIT_LIST_HEAD(&rxq->rx_used);
1058 /* Fill the rx_used queue with _all_ of the Rx buffers */
1059 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1060 /* In the reset function, these buffers may have been allocated
1061 * to an SKB, so we need to unmap and free potential storage */
1062 if (rxq->pool[i].page != NULL) {
1063 dma_unmap_page(&il->pci_dev->dev,
1064 rxq->pool[i].page_dma,
1065 PAGE_SIZE << il->hw_params.rx_page_order,
1066 DMA_FROM_DEVICE);
1067 __il_free_pages(il, rxq->pool[i].page);
1068 rxq->pool[i].page = NULL;
1069 }
1070 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1071 }
1072
1073 /* Set us so that we have processed and used all buffers, but have
1074 * not restocked the Rx queue with fresh buffers */
1075 rxq->read = rxq->write = 0;
1076 rxq->write_actual = 0;
1077 rxq->free_count = 0;
1078 spin_unlock_irqrestore(&rxq->lock, flags);
1079 }
1080
1081 void
il3945_rx_replenish(void * data)1082 il3945_rx_replenish(void *data)
1083 {
1084 struct il_priv *il = data;
1085 unsigned long flags;
1086
1087 il3945_rx_allocate(il, GFP_KERNEL);
1088
1089 spin_lock_irqsave(&il->lock, flags);
1090 il3945_rx_queue_restock(il);
1091 spin_unlock_irqrestore(&il->lock, flags);
1092 }
1093
1094 static void
il3945_rx_replenish_now(struct il_priv * il)1095 il3945_rx_replenish_now(struct il_priv *il)
1096 {
1097 il3945_rx_allocate(il, GFP_ATOMIC);
1098
1099 il3945_rx_queue_restock(il);
1100 }
1101
1102 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1103 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1104 * This free routine walks the list of POOL entries and if SKB is set to
1105 * non NULL it is unmapped and freed
1106 */
1107 static void
il3945_rx_queue_free(struct il_priv * il,struct il_rx_queue * rxq)1108 il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
1109 {
1110 int i;
1111 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1112 if (rxq->pool[i].page != NULL) {
1113 dma_unmap_page(&il->pci_dev->dev,
1114 rxq->pool[i].page_dma,
1115 PAGE_SIZE << il->hw_params.rx_page_order,
1116 DMA_FROM_DEVICE);
1117 __il_free_pages(il, rxq->pool[i].page);
1118 rxq->pool[i].page = NULL;
1119 }
1120 }
1121
1122 dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1123 rxq->bd_dma);
1124 dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
1125 rxq->rb_stts, rxq->rb_stts_dma);
1126 rxq->bd = NULL;
1127 rxq->rb_stts = NULL;
1128 }
1129
1130 /* Convert linear signal-to-noise ratio into dB */
1131 static u8 ratio2dB[100] = {
1132 /* 0 1 2 3 4 5 6 7 8 9 */
1133 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1134 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1135 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1136 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1137 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1138 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1139 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1140 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1141 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1142 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
1143 };
1144
1145 /* Calculates a relative dB value from a ratio of linear
1146 * (i.e. not dB) signal levels.
1147 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
1148 int
il3945_calc_db_from_ratio(int sig_ratio)1149 il3945_calc_db_from_ratio(int sig_ratio)
1150 {
1151 /* 1000:1 or higher just report as 60 dB */
1152 if (sig_ratio >= 1000)
1153 return 60;
1154
1155 /* 100:1 or higher, divide by 10 and use table,
1156 * add 20 dB to make up for divide by 10 */
1157 if (sig_ratio >= 100)
1158 return 20 + (int)ratio2dB[sig_ratio / 10];
1159
1160 /* We shouldn't see this */
1161 if (sig_ratio < 1)
1162 return 0;
1163
1164 /* Use table for ratios 1:1 - 99:1 */
1165 return (int)ratio2dB[sig_ratio];
1166 }
1167
1168 /*
1169 * il3945_rx_handle - Main entry function for receiving responses from uCode
1170 *
1171 * Uses the il->handlers callback function array to invoke
1172 * the appropriate handlers, including command responses,
1173 * frame-received notifications, and other notifications.
1174 */
1175 static void
il3945_rx_handle(struct il_priv * il)1176 il3945_rx_handle(struct il_priv *il)
1177 {
1178 struct il_rx_buf *rxb;
1179 struct il_rx_pkt *pkt;
1180 struct il_rx_queue *rxq = &il->rxq;
1181 u32 r, i;
1182 int reclaim;
1183 unsigned long flags;
1184 u8 fill_rx = 0;
1185 u32 count = 8;
1186 int total_empty = 0;
1187
1188 /* uCode's read idx (stored in shared DRAM) indicates the last Rx
1189 * buffer that the driver may process (last buffer filled by ucode). */
1190 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
1191 i = rxq->read;
1192
1193 /* calculate total frames need to be restock after handling RX */
1194 total_empty = r - rxq->write_actual;
1195 if (total_empty < 0)
1196 total_empty += RX_QUEUE_SIZE;
1197
1198 if (total_empty > (RX_QUEUE_SIZE / 2))
1199 fill_rx = 1;
1200 /* Rx interrupt, but nothing sent from uCode */
1201 if (i == r)
1202 D_RX("r = %d, i = %d\n", r, i);
1203
1204 while (i != r) {
1205 int len;
1206
1207 rxb = rxq->queue[i];
1208
1209 /* If an RXB doesn't have a Rx queue slot associated with it,
1210 * then a bug has been introduced in the queue refilling
1211 * routines -- catch it here */
1212 BUG_ON(rxb == NULL);
1213
1214 rxq->queue[i] = NULL;
1215
1216 dma_unmap_page(&il->pci_dev->dev, rxb->page_dma,
1217 PAGE_SIZE << il->hw_params.rx_page_order,
1218 DMA_FROM_DEVICE);
1219 pkt = rxb_addr(rxb);
1220
1221 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
1222 len += sizeof(u32); /* account for status word */
1223
1224 reclaim = il_need_reclaim(il, pkt);
1225
1226 /* Based on type of command response or notification,
1227 * handle those that need handling via function in
1228 * handlers table. See il3945_setup_handlers() */
1229 if (il->handlers[pkt->hdr.cmd]) {
1230 D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i,
1231 il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1232 il->isr_stats.handlers[pkt->hdr.cmd]++;
1233 il->handlers[pkt->hdr.cmd] (il, rxb);
1234 } else {
1235 /* No handling needed */
1236 D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r,
1237 i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1238 }
1239
1240 /*
1241 * XXX: After here, we should always check rxb->page
1242 * against NULL before touching it or its virtual
1243 * memory (pkt). Because some handler might have
1244 * already taken or freed the pages.
1245 */
1246
1247 if (reclaim) {
1248 /* Invoke any callbacks, transfer the buffer to caller,
1249 * and fire off the (possibly) blocking il_send_cmd()
1250 * as we reclaim the driver command queue */
1251 if (rxb->page)
1252 il_tx_cmd_complete(il, rxb);
1253 else
1254 IL_WARN("Claim null rxb?\n");
1255 }
1256
1257 /* Reuse the page if possible. For notification packets and
1258 * SKBs that fail to Rx correctly, add them back into the
1259 * rx_free list for reuse later. */
1260 spin_lock_irqsave(&rxq->lock, flags);
1261 if (rxb->page != NULL) {
1262 rxb->page_dma =
1263 dma_map_page(&il->pci_dev->dev, rxb->page, 0,
1264 PAGE_SIZE << il->hw_params.rx_page_order,
1265 DMA_FROM_DEVICE);
1266 if (unlikely(dma_mapping_error(&il->pci_dev->dev,
1267 rxb->page_dma))) {
1268 __il_free_pages(il, rxb->page);
1269 rxb->page = NULL;
1270 list_add_tail(&rxb->list, &rxq->rx_used);
1271 } else {
1272 list_add_tail(&rxb->list, &rxq->rx_free);
1273 rxq->free_count++;
1274 }
1275 } else
1276 list_add_tail(&rxb->list, &rxq->rx_used);
1277
1278 spin_unlock_irqrestore(&rxq->lock, flags);
1279
1280 i = (i + 1) & RX_QUEUE_MASK;
1281 /* If there are a lot of unused frames,
1282 * restock the Rx queue so ucode won't assert. */
1283 if (fill_rx) {
1284 count++;
1285 if (count >= 8) {
1286 rxq->read = i;
1287 il3945_rx_replenish_now(il);
1288 count = 0;
1289 }
1290 }
1291 }
1292
1293 /* Backtrack one entry */
1294 rxq->read = i;
1295 if (fill_rx)
1296 il3945_rx_replenish_now(il);
1297 else
1298 il3945_rx_queue_restock(il);
1299 }
1300
1301 /* call this function to flush any scheduled tasklet */
1302 static inline void
il3945_synchronize_irq(struct il_priv * il)1303 il3945_synchronize_irq(struct il_priv *il)
1304 {
1305 /* wait to make sure we flush pending tasklet */
1306 synchronize_irq(il->pci_dev->irq);
1307 tasklet_kill(&il->irq_tasklet);
1308 }
1309
1310 static const char *
il3945_desc_lookup(int i)1311 il3945_desc_lookup(int i)
1312 {
1313 switch (i) {
1314 case 1:
1315 return "FAIL";
1316 case 2:
1317 return "BAD_PARAM";
1318 case 3:
1319 return "BAD_CHECKSUM";
1320 case 4:
1321 return "NMI_INTERRUPT";
1322 case 5:
1323 return "SYSASSERT";
1324 case 6:
1325 return "FATAL_ERROR";
1326 }
1327
1328 return "UNKNOWN";
1329 }
1330
1331 #define ERROR_START_OFFSET (1 * sizeof(u32))
1332 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1333
1334 void
il3945_dump_nic_error_log(struct il_priv * il)1335 il3945_dump_nic_error_log(struct il_priv *il)
1336 {
1337 u32 i;
1338 u32 desc, time, count, base, data1;
1339 u32 blink1, blink2, ilink1, ilink2;
1340
1341 base = le32_to_cpu(il->card_alive.error_event_table_ptr);
1342
1343 if (!il3945_hw_valid_rtc_data_addr(base)) {
1344 IL_ERR("Not valid error log pointer 0x%08X\n", base);
1345 return;
1346 }
1347
1348 count = il_read_targ_mem(il, base);
1349
1350 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1351 IL_ERR("Start IWL Error Log Dump:\n");
1352 IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count);
1353 }
1354
1355 IL_ERR("Desc Time asrtPC blink2 "
1356 "ilink1 nmiPC Line\n");
1357 for (i = ERROR_START_OFFSET;
1358 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1359 i += ERROR_ELEM_SIZE) {
1360 desc = il_read_targ_mem(il, base + i);
1361 time = il_read_targ_mem(il, base + i + 1 * sizeof(u32));
1362 blink1 = il_read_targ_mem(il, base + i + 2 * sizeof(u32));
1363 blink2 = il_read_targ_mem(il, base + i + 3 * sizeof(u32));
1364 ilink1 = il_read_targ_mem(il, base + i + 4 * sizeof(u32));
1365 ilink2 = il_read_targ_mem(il, base + i + 5 * sizeof(u32));
1366 data1 = il_read_targ_mem(il, base + i + 6 * sizeof(u32));
1367
1368 IL_ERR("%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1369 il3945_desc_lookup(desc), desc, time, blink1, blink2,
1370 ilink1, ilink2, data1);
1371 }
1372 }
1373
1374 static void
il3945_irq_tasklet(struct tasklet_struct * t)1375 il3945_irq_tasklet(struct tasklet_struct *t)
1376 {
1377 struct il_priv *il = from_tasklet(il, t, irq_tasklet);
1378 u32 inta, handled = 0;
1379 u32 inta_fh;
1380 unsigned long flags;
1381 #ifdef CONFIG_IWLEGACY_DEBUG
1382 u32 inta_mask;
1383 #endif
1384
1385 spin_lock_irqsave(&il->lock, flags);
1386
1387 /* Ack/clear/reset pending uCode interrupts.
1388 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1389 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1390 inta = _il_rd(il, CSR_INT);
1391 _il_wr(il, CSR_INT, inta);
1392
1393 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1394 * Any new interrupts that happen after this, either while we're
1395 * in this tasklet, or later, will show up in next ISR/tasklet. */
1396 inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
1397 _il_wr(il, CSR_FH_INT_STATUS, inta_fh);
1398
1399 #ifdef CONFIG_IWLEGACY_DEBUG
1400 if (il_get_debug_level(il) & IL_DL_ISR) {
1401 /* just for debug */
1402 inta_mask = _il_rd(il, CSR_INT_MASK);
1403 D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta,
1404 inta_mask, inta_fh);
1405 }
1406 #endif
1407
1408 spin_unlock_irqrestore(&il->lock, flags);
1409
1410 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1411 * atomic, make sure that inta covers all the interrupts that
1412 * we've discovered, even if FH interrupt came in just after
1413 * reading CSR_INT. */
1414 if (inta_fh & CSR39_FH_INT_RX_MASK)
1415 inta |= CSR_INT_BIT_FH_RX;
1416 if (inta_fh & CSR39_FH_INT_TX_MASK)
1417 inta |= CSR_INT_BIT_FH_TX;
1418
1419 /* Now service all interrupt bits discovered above. */
1420 if (inta & CSR_INT_BIT_HW_ERR) {
1421 IL_ERR("Hardware error detected. Restarting.\n");
1422
1423 /* Tell the device to stop sending interrupts */
1424 il_disable_interrupts(il);
1425
1426 il->isr_stats.hw++;
1427 il_irq_handle_error(il);
1428
1429 handled |= CSR_INT_BIT_HW_ERR;
1430
1431 return;
1432 }
1433 #ifdef CONFIG_IWLEGACY_DEBUG
1434 if (il_get_debug_level(il) & (IL_DL_ISR)) {
1435 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1436 if (inta & CSR_INT_BIT_SCD) {
1437 D_ISR("Scheduler finished to transmit "
1438 "the frame/frames.\n");
1439 il->isr_stats.sch++;
1440 }
1441
1442 /* Alive notification via Rx interrupt will do the real work */
1443 if (inta & CSR_INT_BIT_ALIVE) {
1444 D_ISR("Alive interrupt\n");
1445 il->isr_stats.alive++;
1446 }
1447 }
1448 #endif
1449 /* Safely ignore these bits for debug checks below */
1450 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1451
1452 /* Error detected by uCode */
1453 if (inta & CSR_INT_BIT_SW_ERR) {
1454 IL_ERR("Microcode SW error detected. " "Restarting 0x%X.\n",
1455 inta);
1456 il->isr_stats.sw++;
1457 il_irq_handle_error(il);
1458 handled |= CSR_INT_BIT_SW_ERR;
1459 }
1460
1461 /* uCode wakes up after power-down sleep */
1462 if (inta & CSR_INT_BIT_WAKEUP) {
1463 D_ISR("Wakeup interrupt\n");
1464 il_rx_queue_update_write_ptr(il, &il->rxq);
1465
1466 spin_lock_irqsave(&il->lock, flags);
1467 il_txq_update_write_ptr(il, &il->txq[0]);
1468 il_txq_update_write_ptr(il, &il->txq[1]);
1469 il_txq_update_write_ptr(il, &il->txq[2]);
1470 il_txq_update_write_ptr(il, &il->txq[3]);
1471 il_txq_update_write_ptr(il, &il->txq[4]);
1472 spin_unlock_irqrestore(&il->lock, flags);
1473
1474 il->isr_stats.wakeup++;
1475 handled |= CSR_INT_BIT_WAKEUP;
1476 }
1477
1478 /* All uCode command responses, including Tx command responses,
1479 * Rx "responses" (frame-received notification), and other
1480 * notifications from uCode come through here*/
1481 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1482 il3945_rx_handle(il);
1483 il->isr_stats.rx++;
1484 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1485 }
1486
1487 if (inta & CSR_INT_BIT_FH_TX) {
1488 D_ISR("Tx interrupt\n");
1489 il->isr_stats.tx++;
1490
1491 _il_wr(il, CSR_FH_INT_STATUS, (1 << 6));
1492 il_wr(il, FH39_TCSR_CREDIT(FH39_SRVC_CHNL), 0x0);
1493 handled |= CSR_INT_BIT_FH_TX;
1494 }
1495
1496 if (inta & ~handled) {
1497 IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
1498 il->isr_stats.unhandled++;
1499 }
1500
1501 if (inta & ~il->inta_mask) {
1502 IL_WARN("Disabled INTA bits 0x%08x were pending\n",
1503 inta & ~il->inta_mask);
1504 IL_WARN(" with inta_fh = 0x%08x\n", inta_fh);
1505 }
1506
1507 /* Re-enable all interrupts */
1508 /* only Re-enable if disabled by irq */
1509 if (test_bit(S_INT_ENABLED, &il->status))
1510 il_enable_interrupts(il);
1511
1512 #ifdef CONFIG_IWLEGACY_DEBUG
1513 if (il_get_debug_level(il) & (IL_DL_ISR)) {
1514 inta = _il_rd(il, CSR_INT);
1515 inta_mask = _il_rd(il, CSR_INT_MASK);
1516 inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
1517 D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1518 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1519 }
1520 #endif
1521 }
1522
1523 static int
il3945_get_channels_for_scan(struct il_priv * il,enum nl80211_band band,u8 is_active,u8 n_probes,struct il3945_scan_channel * scan_ch,struct ieee80211_vif * vif)1524 il3945_get_channels_for_scan(struct il_priv *il, enum nl80211_band band,
1525 u8 is_active, u8 n_probes,
1526 struct il3945_scan_channel *scan_ch,
1527 struct ieee80211_vif *vif)
1528 {
1529 struct ieee80211_channel *chan;
1530 const struct ieee80211_supported_band *sband;
1531 const struct il_channel_info *ch_info;
1532 u16 passive_dwell = 0;
1533 u16 active_dwell = 0;
1534 int added, i;
1535
1536 sband = il_get_hw_mode(il, band);
1537 if (!sband)
1538 return 0;
1539
1540 active_dwell = il_get_active_dwell_time(il, band, n_probes);
1541 passive_dwell = il_get_passive_dwell_time(il, band, vif);
1542
1543 if (passive_dwell <= active_dwell)
1544 passive_dwell = active_dwell + 1;
1545
1546 for (i = 0, added = 0; i < il->scan_request->n_channels; i++) {
1547 chan = il->scan_request->channels[i];
1548
1549 if (chan->band != band)
1550 continue;
1551
1552 scan_ch->channel = chan->hw_value;
1553
1554 ch_info = il_get_channel_info(il, band, scan_ch->channel);
1555 if (!il_is_channel_valid(ch_info)) {
1556 D_SCAN("Channel %d is INVALID for this band.\n",
1557 scan_ch->channel);
1558 continue;
1559 }
1560
1561 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1562 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1563 /* If passive , set up for auto-switch
1564 * and use long active_dwell time.
1565 */
1566 if (!is_active || il_is_channel_passive(ch_info) ||
1567 (chan->flags & IEEE80211_CHAN_NO_IR)) {
1568 scan_ch->type = 0; /* passive */
1569 if (IL_UCODE_API(il->ucode_ver) == 1)
1570 scan_ch->active_dwell =
1571 cpu_to_le16(passive_dwell - 1);
1572 } else {
1573 scan_ch->type = 1; /* active */
1574 }
1575
1576 /* Set direct probe bits. These may be used both for active
1577 * scan channels (probes gets sent right away),
1578 * or for passive channels (probes get se sent only after
1579 * hearing clear Rx packet).*/
1580 if (IL_UCODE_API(il->ucode_ver) >= 2) {
1581 if (n_probes)
1582 scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
1583 } else {
1584 /* uCode v1 does not allow setting direct probe bits on
1585 * passive channel. */
1586 if ((scan_ch->type & 1) && n_probes)
1587 scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
1588 }
1589
1590 /* Set txpower levels to defaults */
1591 scan_ch->tpc.dsp_atten = 110;
1592 /* scan_pwr_info->tpc.dsp_atten; */
1593
1594 /*scan_pwr_info->tpc.tx_gain; */
1595 if (band == NL80211_BAND_5GHZ)
1596 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1597 else {
1598 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1599 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
1600 * power level:
1601 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
1602 */
1603 }
1604
1605 D_SCAN("Scanning %d [%s %d]\n", scan_ch->channel,
1606 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1607 (scan_ch->type & 1) ? active_dwell : passive_dwell);
1608
1609 scan_ch++;
1610 added++;
1611 }
1612
1613 D_SCAN("total channels to scan %d\n", added);
1614 return added;
1615 }
1616
1617 static void
il3945_init_hw_rates(struct il_priv * il,struct ieee80211_rate * rates)1618 il3945_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates)
1619 {
1620 int i;
1621
1622 for (i = 0; i < RATE_COUNT_LEGACY; i++) {
1623 rates[i].bitrate = il3945_rates[i].ieee * 5;
1624 rates[i].hw_value = i; /* Rate scaling will work on idxes */
1625 rates[i].hw_value_short = i;
1626 rates[i].flags = 0;
1627 if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) {
1628 /*
1629 * If CCK != 1M then set short preamble rate flag.
1630 */
1631 rates[i].flags |=
1632 (il3945_rates[i].plcp ==
1633 10) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE;
1634 }
1635 }
1636 }
1637
1638 /******************************************************************************
1639 *
1640 * uCode download functions
1641 *
1642 ******************************************************************************/
1643
1644 static void
il3945_dealloc_ucode_pci(struct il_priv * il)1645 il3945_dealloc_ucode_pci(struct il_priv *il)
1646 {
1647 il_free_fw_desc(il->pci_dev, &il->ucode_code);
1648 il_free_fw_desc(il->pci_dev, &il->ucode_data);
1649 il_free_fw_desc(il->pci_dev, &il->ucode_data_backup);
1650 il_free_fw_desc(il->pci_dev, &il->ucode_init);
1651 il_free_fw_desc(il->pci_dev, &il->ucode_init_data);
1652 il_free_fw_desc(il->pci_dev, &il->ucode_boot);
1653 }
1654
1655 /*
1656 * il3945_verify_inst_full - verify runtime uCode image in card vs. host,
1657 * looking at all data.
1658 */
1659 static int
il3945_verify_inst_full(struct il_priv * il,__le32 * image,u32 len)1660 il3945_verify_inst_full(struct il_priv *il, __le32 * image, u32 len)
1661 {
1662 u32 val;
1663 u32 save_len = len;
1664 int rc = 0;
1665 u32 errcnt;
1666
1667 D_INFO("ucode inst image size is %u\n", len);
1668
1669 il_wr(il, HBUS_TARG_MEM_RADDR, IL39_RTC_INST_LOWER_BOUND);
1670
1671 errcnt = 0;
1672 for (; len > 0; len -= sizeof(u32), image++) {
1673 /* read data comes through single port, auto-incr addr */
1674 /* NOTE: Use the debugless read so we don't flood kernel log
1675 * if IL_DL_IO is set */
1676 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
1677 if (val != le32_to_cpu(*image)) {
1678 IL_ERR("uCode INST section is invalid at "
1679 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1680 save_len - len, val, le32_to_cpu(*image));
1681 rc = -EIO;
1682 errcnt++;
1683 if (errcnt >= 20)
1684 break;
1685 }
1686 }
1687
1688 if (!errcnt)
1689 D_INFO("ucode image in INSTRUCTION memory is good\n");
1690
1691 return rc;
1692 }
1693
1694 /*
1695 * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
1696 * using sample data 100 bytes apart. If these sample points are good,
1697 * it's a pretty good bet that everything between them is good, too.
1698 */
1699 static int
il3945_verify_inst_sparse(struct il_priv * il,__le32 * image,u32 len)1700 il3945_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len)
1701 {
1702 u32 val;
1703 int rc = 0;
1704 u32 errcnt = 0;
1705 u32 i;
1706
1707 D_INFO("ucode inst image size is %u\n", len);
1708
1709 for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) {
1710 /* read data comes through single port, auto-incr addr */
1711 /* NOTE: Use the debugless read so we don't flood kernel log
1712 * if IL_DL_IO is set */
1713 il_wr(il, HBUS_TARG_MEM_RADDR, i + IL39_RTC_INST_LOWER_BOUND);
1714 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
1715 if (val != le32_to_cpu(*image)) {
1716 #if 0 /* Enable this if you want to see details */
1717 IL_ERR("uCode INST section is invalid at "
1718 "offset 0x%x, is 0x%x, s/b 0x%x\n", i, val,
1719 *image);
1720 #endif
1721 rc = -EIO;
1722 errcnt++;
1723 if (errcnt >= 3)
1724 break;
1725 }
1726 }
1727
1728 return rc;
1729 }
1730
1731 /*
1732 * il3945_verify_ucode - determine which instruction image is in SRAM,
1733 * and verify its contents
1734 */
1735 static int
il3945_verify_ucode(struct il_priv * il)1736 il3945_verify_ucode(struct il_priv *il)
1737 {
1738 __le32 *image;
1739 u32 len;
1740 int rc = 0;
1741
1742 /* Try bootstrap */
1743 image = (__le32 *) il->ucode_boot.v_addr;
1744 len = il->ucode_boot.len;
1745 rc = il3945_verify_inst_sparse(il, image, len);
1746 if (rc == 0) {
1747 D_INFO("Bootstrap uCode is good in inst SRAM\n");
1748 return 0;
1749 }
1750
1751 /* Try initialize */
1752 image = (__le32 *) il->ucode_init.v_addr;
1753 len = il->ucode_init.len;
1754 rc = il3945_verify_inst_sparse(il, image, len);
1755 if (rc == 0) {
1756 D_INFO("Initialize uCode is good in inst SRAM\n");
1757 return 0;
1758 }
1759
1760 /* Try runtime/protocol */
1761 image = (__le32 *) il->ucode_code.v_addr;
1762 len = il->ucode_code.len;
1763 rc = il3945_verify_inst_sparse(il, image, len);
1764 if (rc == 0) {
1765 D_INFO("Runtime uCode is good in inst SRAM\n");
1766 return 0;
1767 }
1768
1769 IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
1770
1771 /* Since nothing seems to match, show first several data entries in
1772 * instruction SRAM, so maybe visual inspection will give a clue.
1773 * Selection of bootstrap image (vs. other images) is arbitrary. */
1774 image = (__le32 *) il->ucode_boot.v_addr;
1775 len = il->ucode_boot.len;
1776 rc = il3945_verify_inst_full(il, image, len);
1777
1778 return rc;
1779 }
1780
1781 static void
il3945_nic_start(struct il_priv * il)1782 il3945_nic_start(struct il_priv *il)
1783 {
1784 /* Remove all resets to allow NIC to operate */
1785 _il_wr(il, CSR_RESET, 0);
1786 }
1787
1788 #define IL3945_UCODE_GET(item) \
1789 static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\
1790 { \
1791 return le32_to_cpu(ucode->v1.item); \
1792 }
1793
1794 static u32
il3945_ucode_get_header_size(u32 api_ver)1795 il3945_ucode_get_header_size(u32 api_ver)
1796 {
1797 return 24;
1798 }
1799
1800 static u8 *
il3945_ucode_get_data(const struct il_ucode_header * ucode)1801 il3945_ucode_get_data(const struct il_ucode_header *ucode)
1802 {
1803 return (u8 *) ucode->v1.data;
1804 }
1805
1806 IL3945_UCODE_GET(inst_size);
1807 IL3945_UCODE_GET(data_size);
1808 IL3945_UCODE_GET(init_size);
1809 IL3945_UCODE_GET(init_data_size);
1810 IL3945_UCODE_GET(boot_size);
1811
1812 /*
1813 * il3945_read_ucode - Read uCode images from disk file.
1814 *
1815 * Copy into buffers for card to fetch via bus-mastering
1816 */
1817 static int
il3945_read_ucode(struct il_priv * il)1818 il3945_read_ucode(struct il_priv *il)
1819 {
1820 const struct il_ucode_header *ucode;
1821 int ret = -EINVAL, idx;
1822 const struct firmware *ucode_raw;
1823 /* firmware file name contains uCode/driver compatibility version */
1824 const char *name_pre = il->cfg->fw_name_pre;
1825 const unsigned int api_max = il->cfg->ucode_api_max;
1826 const unsigned int api_min = il->cfg->ucode_api_min;
1827 char buf[25];
1828 u8 *src;
1829 size_t len;
1830 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
1831
1832 /* Ask kernel firmware_class module to get the boot firmware off disk.
1833 * request_firmware() is synchronous, file is in memory on return. */
1834 for (idx = api_max; idx >= api_min; idx--) {
1835 sprintf(buf, "%s%u%s", name_pre, idx, ".ucode");
1836 ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev);
1837 if (ret < 0) {
1838 IL_ERR("%s firmware file req failed: %d\n", buf, ret);
1839 if (ret == -ENOENT)
1840 continue;
1841 else
1842 goto error;
1843 } else {
1844 if (idx < api_max)
1845 IL_ERR("Loaded firmware %s, "
1846 "which is deprecated. "
1847 " Please use API v%u instead.\n", buf,
1848 api_max);
1849 D_INFO("Got firmware '%s' file "
1850 "(%zd bytes) from disk\n", buf, ucode_raw->size);
1851 break;
1852 }
1853 }
1854
1855 if (ret < 0)
1856 goto error;
1857
1858 /* Make sure that we got at least our header! */
1859 if (ucode_raw->size < il3945_ucode_get_header_size(1)) {
1860 IL_ERR("File size way too small!\n");
1861 ret = -EINVAL;
1862 goto err_release;
1863 }
1864
1865 /* Data from ucode file: header followed by uCode images */
1866 ucode = (struct il_ucode_header *)ucode_raw->data;
1867
1868 il->ucode_ver = le32_to_cpu(ucode->ver);
1869 api_ver = IL_UCODE_API(il->ucode_ver);
1870 inst_size = il3945_ucode_get_inst_size(ucode);
1871 data_size = il3945_ucode_get_data_size(ucode);
1872 init_size = il3945_ucode_get_init_size(ucode);
1873 init_data_size = il3945_ucode_get_init_data_size(ucode);
1874 boot_size = il3945_ucode_get_boot_size(ucode);
1875 src = il3945_ucode_get_data(ucode);
1876
1877 /* api_ver should match the api version forming part of the
1878 * firmware filename ... but we don't check for that and only rely
1879 * on the API version read from firmware header from here on forward */
1880
1881 if (api_ver < api_min || api_ver > api_max) {
1882 IL_ERR("Driver unable to support your firmware API. "
1883 "Driver supports v%u, firmware is v%u.\n", api_max,
1884 api_ver);
1885 il->ucode_ver = 0;
1886 ret = -EINVAL;
1887 goto err_release;
1888 }
1889 if (api_ver != api_max)
1890 IL_ERR("Firmware has old API version. Expected %u, "
1891 "got %u. New firmware can be obtained "
1892 "from http://www.intellinuxwireless.org.\n", api_max,
1893 api_ver);
1894
1895 IL_INFO("loaded firmware version %u.%u.%u.%u\n",
1896 IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver),
1897 IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver));
1898
1899 snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version),
1900 "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver),
1901 IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver),
1902 IL_UCODE_SERIAL(il->ucode_ver));
1903
1904 D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver);
1905 D_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
1906 D_INFO("f/w package hdr runtime data size = %u\n", data_size);
1907 D_INFO("f/w package hdr init inst size = %u\n", init_size);
1908 D_INFO("f/w package hdr init data size = %u\n", init_data_size);
1909 D_INFO("f/w package hdr boot inst size = %u\n", boot_size);
1910
1911 /* Verify size of file vs. image size info in file's header */
1912 if (ucode_raw->size !=
1913 il3945_ucode_get_header_size(api_ver) + inst_size + data_size +
1914 init_size + init_data_size + boot_size) {
1915
1916 D_INFO("uCode file size %zd does not match expected size\n",
1917 ucode_raw->size);
1918 ret = -EINVAL;
1919 goto err_release;
1920 }
1921
1922 /* Verify that uCode images will fit in card's SRAM */
1923 if (inst_size > IL39_MAX_INST_SIZE) {
1924 D_INFO("uCode instr len %d too large to fit in\n", inst_size);
1925 ret = -EINVAL;
1926 goto err_release;
1927 }
1928
1929 if (data_size > IL39_MAX_DATA_SIZE) {
1930 D_INFO("uCode data len %d too large to fit in\n", data_size);
1931 ret = -EINVAL;
1932 goto err_release;
1933 }
1934 if (init_size > IL39_MAX_INST_SIZE) {
1935 D_INFO("uCode init instr len %d too large to fit in\n",
1936 init_size);
1937 ret = -EINVAL;
1938 goto err_release;
1939 }
1940 if (init_data_size > IL39_MAX_DATA_SIZE) {
1941 D_INFO("uCode init data len %d too large to fit in\n",
1942 init_data_size);
1943 ret = -EINVAL;
1944 goto err_release;
1945 }
1946 if (boot_size > IL39_MAX_BSM_SIZE) {
1947 D_INFO("uCode boot instr len %d too large to fit in\n",
1948 boot_size);
1949 ret = -EINVAL;
1950 goto err_release;
1951 }
1952
1953 /* Allocate ucode buffers for card's bus-master loading ... */
1954
1955 /* Runtime instructions and 2 copies of data:
1956 * 1) unmodified from disk
1957 * 2) backup cache for save/restore during power-downs */
1958 il->ucode_code.len = inst_size;
1959 il_alloc_fw_desc(il->pci_dev, &il->ucode_code);
1960
1961 il->ucode_data.len = data_size;
1962 il_alloc_fw_desc(il->pci_dev, &il->ucode_data);
1963
1964 il->ucode_data_backup.len = data_size;
1965 il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup);
1966
1967 if (!il->ucode_code.v_addr || !il->ucode_data.v_addr ||
1968 !il->ucode_data_backup.v_addr)
1969 goto err_pci_alloc;
1970
1971 /* Initialization instructions and data */
1972 if (init_size && init_data_size) {
1973 il->ucode_init.len = init_size;
1974 il_alloc_fw_desc(il->pci_dev, &il->ucode_init);
1975
1976 il->ucode_init_data.len = init_data_size;
1977 il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data);
1978
1979 if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr)
1980 goto err_pci_alloc;
1981 }
1982
1983 /* Bootstrap (instructions only, no data) */
1984 if (boot_size) {
1985 il->ucode_boot.len = boot_size;
1986 il_alloc_fw_desc(il->pci_dev, &il->ucode_boot);
1987
1988 if (!il->ucode_boot.v_addr)
1989 goto err_pci_alloc;
1990 }
1991
1992 /* Copy images into buffers for card's bus-master reads ... */
1993
1994 /* Runtime instructions (first block of data in file) */
1995 len = inst_size;
1996 D_INFO("Copying (but not loading) uCode instr len %zd\n", len);
1997 memcpy(il->ucode_code.v_addr, src, len);
1998 src += len;
1999
2000 D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2001 il->ucode_code.v_addr, (u32) il->ucode_code.p_addr);
2002
2003 /* Runtime data (2nd block)
2004 * NOTE: Copy into backup buffer will be done in il3945_up() */
2005 len = data_size;
2006 D_INFO("Copying (but not loading) uCode data len %zd\n", len);
2007 memcpy(il->ucode_data.v_addr, src, len);
2008 memcpy(il->ucode_data_backup.v_addr, src, len);
2009 src += len;
2010
2011 /* Initialization instructions (3rd block) */
2012 if (init_size) {
2013 len = init_size;
2014 D_INFO("Copying (but not loading) init instr len %zd\n", len);
2015 memcpy(il->ucode_init.v_addr, src, len);
2016 src += len;
2017 }
2018
2019 /* Initialization data (4th block) */
2020 if (init_data_size) {
2021 len = init_data_size;
2022 D_INFO("Copying (but not loading) init data len %zd\n", len);
2023 memcpy(il->ucode_init_data.v_addr, src, len);
2024 src += len;
2025 }
2026
2027 /* Bootstrap instructions (5th block) */
2028 len = boot_size;
2029 D_INFO("Copying (but not loading) boot instr len %zd\n", len);
2030 memcpy(il->ucode_boot.v_addr, src, len);
2031
2032 /* We have our copies now, allow OS release its copies */
2033 release_firmware(ucode_raw);
2034 return 0;
2035
2036 err_pci_alloc:
2037 IL_ERR("failed to allocate pci memory\n");
2038 ret = -ENOMEM;
2039 il3945_dealloc_ucode_pci(il);
2040
2041 err_release:
2042 release_firmware(ucode_raw);
2043
2044 error:
2045 return ret;
2046 }
2047
2048 /*
2049 * il3945_set_ucode_ptrs - Set uCode address location
2050 *
2051 * Tell initialization uCode where to find runtime uCode.
2052 *
2053 * BSM registers initially contain pointers to initialization uCode.
2054 * We need to replace them to load runtime uCode inst and data,
2055 * and to save runtime data when powering down.
2056 */
2057 static int
il3945_set_ucode_ptrs(struct il_priv * il)2058 il3945_set_ucode_ptrs(struct il_priv *il)
2059 {
2060 dma_addr_t pinst;
2061 dma_addr_t pdata;
2062
2063 /* bits 31:0 for 3945 */
2064 pinst = il->ucode_code.p_addr;
2065 pdata = il->ucode_data_backup.p_addr;
2066
2067 /* Tell bootstrap uCode where to find image to load */
2068 il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
2069 il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
2070 il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len);
2071
2072 /* Inst byte count must be last to set up, bit 31 signals uCode
2073 * that all new ptr/size info is in place */
2074 il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
2075 il->ucode_code.len | BSM_DRAM_INST_LOAD);
2076
2077 D_INFO("Runtime uCode pointers are set.\n");
2078
2079 return 0;
2080 }
2081
2082 /*
2083 * il3945_init_alive_start - Called after N_ALIVE notification received
2084 *
2085 * Called after N_ALIVE notification received from "initialize" uCode.
2086 *
2087 * Tell "initialize" uCode to go ahead and load the runtime uCode.
2088 */
2089 static void
il3945_init_alive_start(struct il_priv * il)2090 il3945_init_alive_start(struct il_priv *il)
2091 {
2092 /* Check alive response for "valid" sign from uCode */
2093 if (il->card_alive_init.is_valid != UCODE_VALID_OK) {
2094 /* We had an error bringing up the hardware, so take it
2095 * all the way back down so we can try again */
2096 D_INFO("Initialize Alive failed.\n");
2097 goto restart;
2098 }
2099
2100 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2101 * This is a paranoid check, because we would not have gotten the
2102 * "initialize" alive if code weren't properly loaded. */
2103 if (il3945_verify_ucode(il)) {
2104 /* Runtime instruction load was bad;
2105 * take it all the way back down so we can try again */
2106 D_INFO("Bad \"initialize\" uCode load.\n");
2107 goto restart;
2108 }
2109
2110 /* Send pointers to protocol/runtime uCode image ... init code will
2111 * load and launch runtime uCode, which will send us another "Alive"
2112 * notification. */
2113 D_INFO("Initialization Alive received.\n");
2114 if (il3945_set_ucode_ptrs(il)) {
2115 /* Runtime instruction load won't happen;
2116 * take it all the way back down so we can try again */
2117 D_INFO("Couldn't set up uCode pointers.\n");
2118 goto restart;
2119 }
2120 return;
2121
2122 restart:
2123 queue_work(il->workqueue, &il->restart);
2124 }
2125
2126 /*
2127 * il3945_alive_start - called after N_ALIVE notification received
2128 * from protocol/runtime uCode (initialization uCode's
2129 * Alive gets handled by il3945_init_alive_start()).
2130 */
2131 static void
il3945_alive_start(struct il_priv * il)2132 il3945_alive_start(struct il_priv *il)
2133 {
2134 int thermal_spin = 0;
2135 u32 rfkill;
2136
2137 D_INFO("Runtime Alive received.\n");
2138
2139 if (il->card_alive.is_valid != UCODE_VALID_OK) {
2140 /* We had an error bringing up the hardware, so take it
2141 * all the way back down so we can try again */
2142 D_INFO("Alive failed.\n");
2143 goto restart;
2144 }
2145
2146 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2147 * This is a paranoid check, because we would not have gotten the
2148 * "runtime" alive if code weren't properly loaded. */
2149 if (il3945_verify_ucode(il)) {
2150 /* Runtime instruction load was bad;
2151 * take it all the way back down so we can try again */
2152 D_INFO("Bad runtime uCode load.\n");
2153 goto restart;
2154 }
2155
2156 rfkill = il_rd_prph(il, APMG_RFKILL_REG);
2157 D_INFO("RFKILL status: 0x%x\n", rfkill);
2158
2159 if (rfkill & 0x1) {
2160 clear_bit(S_RFKILL, &il->status);
2161 /* if RFKILL is not on, then wait for thermal
2162 * sensor in adapter to kick in */
2163 while (il3945_hw_get_temperature(il) == 0) {
2164 thermal_spin++;
2165 udelay(10);
2166 }
2167
2168 if (thermal_spin)
2169 D_INFO("Thermal calibration took %dus\n",
2170 thermal_spin * 10);
2171 } else
2172 set_bit(S_RFKILL, &il->status);
2173
2174 /* After the ALIVE response, we can send commands to 3945 uCode */
2175 set_bit(S_ALIVE, &il->status);
2176
2177 /* Enable watchdog to monitor the driver tx queues */
2178 il_setup_watchdog(il);
2179
2180 if (il_is_rfkill(il))
2181 return;
2182
2183 ieee80211_wake_queues(il->hw);
2184
2185 il->active_rate = RATES_MASK_3945;
2186
2187 il_power_update_mode(il, true);
2188
2189 if (il_is_associated(il)) {
2190 struct il3945_rxon_cmd *active_rxon =
2191 (struct il3945_rxon_cmd *)(&il->active);
2192
2193 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2194 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2195 } else {
2196 /* Initialize our rx_config data */
2197 il_connection_init_rx_config(il);
2198 }
2199
2200 /* Configure Bluetooth device coexistence support */
2201 il_send_bt_config(il);
2202
2203 set_bit(S_READY, &il->status);
2204
2205 /* Configure the adapter for unassociated operation */
2206 il3945_commit_rxon(il);
2207
2208 il3945_reg_txpower_periodic(il);
2209
2210 D_INFO("ALIVE processing complete.\n");
2211 wake_up(&il->wait_command_queue);
2212
2213 return;
2214
2215 restart:
2216 queue_work(il->workqueue, &il->restart);
2217 }
2218
2219 static void il3945_cancel_deferred_work(struct il_priv *il);
2220
2221 static void
__il3945_down(struct il_priv * il)2222 __il3945_down(struct il_priv *il)
2223 {
2224 unsigned long flags;
2225 int exit_pending;
2226
2227 D_INFO(DRV_NAME " is going down\n");
2228
2229 il_scan_cancel_timeout(il, 200);
2230
2231 exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status);
2232
2233 /* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set
2234 * to prevent rearm timer */
2235 del_timer_sync(&il->watchdog);
2236
2237 /* Station information will now be cleared in device */
2238 il_clear_ucode_stations(il);
2239 il_dealloc_bcast_stations(il);
2240 il_clear_driver_stations(il);
2241
2242 /* Unblock any waiting calls */
2243 wake_up_all(&il->wait_command_queue);
2244
2245 /* Wipe out the EXIT_PENDING status bit if we are not actually
2246 * exiting the module */
2247 if (!exit_pending)
2248 clear_bit(S_EXIT_PENDING, &il->status);
2249
2250 /* stop and reset the on-board processor */
2251 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2252
2253 /* tell the device to stop sending interrupts */
2254 spin_lock_irqsave(&il->lock, flags);
2255 il_disable_interrupts(il);
2256 spin_unlock_irqrestore(&il->lock, flags);
2257 il3945_synchronize_irq(il);
2258
2259 if (il->mac80211_registered)
2260 ieee80211_stop_queues(il->hw);
2261
2262 /* If we have not previously called il3945_init() then
2263 * clear all bits but the RF Kill bits and return */
2264 if (!il_is_init(il)) {
2265 il->status =
2266 test_bit(S_RFKILL, &il->status) << S_RFKILL |
2267 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
2268 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
2269 goto exit;
2270 }
2271
2272 /* ...otherwise clear out all the status bits but the RF Kill
2273 * bit and continue taking the NIC down. */
2274 il->status &=
2275 test_bit(S_RFKILL, &il->status) << S_RFKILL |
2276 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
2277 test_bit(S_FW_ERROR, &il->status) << S_FW_ERROR |
2278 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
2279
2280 /*
2281 * We disabled and synchronized interrupt, and priv->mutex is taken, so
2282 * here is the only thread which will program device registers, but
2283 * still have lockdep assertions, so we are taking reg_lock.
2284 */
2285 spin_lock_irq(&il->reg_lock);
2286 /* FIXME: il_grab_nic_access if rfkill is off ? */
2287
2288 il3945_hw_txq_ctx_stop(il);
2289 il3945_hw_rxq_stop(il);
2290 /* Power-down device's busmaster DMA clocks */
2291 _il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2292 udelay(5);
2293 /* Stop the device, and put it in low power state */
2294 _il_apm_stop(il);
2295
2296 spin_unlock_irq(&il->reg_lock);
2297
2298 il3945_hw_txq_ctx_free(il);
2299 exit:
2300 memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
2301 dev_kfree_skb(il->beacon_skb);
2302 il->beacon_skb = NULL;
2303
2304 /* clear out any free frames */
2305 il3945_clear_free_frames(il);
2306 }
2307
2308 static void
il3945_down(struct il_priv * il)2309 il3945_down(struct il_priv *il)
2310 {
2311 mutex_lock(&il->mutex);
2312 __il3945_down(il);
2313 mutex_unlock(&il->mutex);
2314
2315 il3945_cancel_deferred_work(il);
2316 }
2317
2318 #define MAX_HW_RESTARTS 5
2319
2320 static int
il3945_alloc_bcast_station(struct il_priv * il)2321 il3945_alloc_bcast_station(struct il_priv *il)
2322 {
2323 unsigned long flags;
2324 u8 sta_id;
2325
2326 spin_lock_irqsave(&il->sta_lock, flags);
2327 sta_id = il_prep_station(il, il_bcast_addr, false, NULL);
2328 if (sta_id == IL_INVALID_STATION) {
2329 IL_ERR("Unable to prepare broadcast station\n");
2330 spin_unlock_irqrestore(&il->sta_lock, flags);
2331
2332 return -EINVAL;
2333 }
2334
2335 il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE;
2336 il->stations[sta_id].used |= IL_STA_BCAST;
2337 spin_unlock_irqrestore(&il->sta_lock, flags);
2338
2339 return 0;
2340 }
2341
2342 static int
__il3945_up(struct il_priv * il)2343 __il3945_up(struct il_priv *il)
2344 {
2345 int rc, i;
2346
2347 rc = il3945_alloc_bcast_station(il);
2348 if (rc)
2349 return rc;
2350
2351 if (test_bit(S_EXIT_PENDING, &il->status)) {
2352 IL_WARN("Exit pending; will not bring the NIC up\n");
2353 return -EIO;
2354 }
2355
2356 if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) {
2357 IL_ERR("ucode not available for device bring up\n");
2358 return -EIO;
2359 }
2360
2361 /* If platform's RF_KILL switch is NOT set to KILL */
2362 if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2363 clear_bit(S_RFKILL, &il->status);
2364 else {
2365 set_bit(S_RFKILL, &il->status);
2366 return -ERFKILL;
2367 }
2368
2369 _il_wr(il, CSR_INT, 0xFFFFFFFF);
2370
2371 rc = il3945_hw_nic_init(il);
2372 if (rc) {
2373 IL_ERR("Unable to int nic\n");
2374 return rc;
2375 }
2376
2377 /* make sure rfkill handshake bits are cleared */
2378 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2379 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2380
2381 /* clear (again), then enable host interrupts */
2382 _il_wr(il, CSR_INT, 0xFFFFFFFF);
2383 il_enable_interrupts(il);
2384
2385 /* really make sure rfkill handshake bits are cleared */
2386 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2387 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2388
2389 /* Copy original ucode data image from disk into backup cache.
2390 * This will be used to initialize the on-board processor's
2391 * data SRAM for a clean start when the runtime program first loads. */
2392 memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr,
2393 il->ucode_data.len);
2394
2395 /* We return success when we resume from suspend and rf_kill is on. */
2396 if (test_bit(S_RFKILL, &il->status))
2397 return 0;
2398
2399 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2400
2401 /* load bootstrap state machine,
2402 * load bootstrap program into processor's memory,
2403 * prepare to load the "initialize" uCode */
2404 rc = il->ops->load_ucode(il);
2405
2406 if (rc) {
2407 IL_ERR("Unable to set up bootstrap uCode: %d\n", rc);
2408 continue;
2409 }
2410
2411 /* start card; "initialize" will load runtime ucode */
2412 il3945_nic_start(il);
2413
2414 D_INFO(DRV_NAME " is coming up\n");
2415
2416 return 0;
2417 }
2418
2419 set_bit(S_EXIT_PENDING, &il->status);
2420 __il3945_down(il);
2421 clear_bit(S_EXIT_PENDING, &il->status);
2422
2423 /* tried to restart and config the device for as long as our
2424 * patience could withstand */
2425 IL_ERR("Unable to initialize device after %d attempts.\n", i);
2426 return -EIO;
2427 }
2428
2429 /*****************************************************************************
2430 *
2431 * Workqueue callbacks
2432 *
2433 *****************************************************************************/
2434
2435 static void
il3945_bg_init_alive_start(struct work_struct * data)2436 il3945_bg_init_alive_start(struct work_struct *data)
2437 {
2438 struct il_priv *il =
2439 container_of(data, struct il_priv, init_alive_start.work);
2440
2441 mutex_lock(&il->mutex);
2442 if (test_bit(S_EXIT_PENDING, &il->status))
2443 goto out;
2444
2445 il3945_init_alive_start(il);
2446 out:
2447 mutex_unlock(&il->mutex);
2448 }
2449
2450 static void
il3945_bg_alive_start(struct work_struct * data)2451 il3945_bg_alive_start(struct work_struct *data)
2452 {
2453 struct il_priv *il =
2454 container_of(data, struct il_priv, alive_start.work);
2455
2456 mutex_lock(&il->mutex);
2457 if (test_bit(S_EXIT_PENDING, &il->status) || il->txq == NULL)
2458 goto out;
2459
2460 il3945_alive_start(il);
2461 out:
2462 mutex_unlock(&il->mutex);
2463 }
2464
2465 /*
2466 * 3945 cannot interrupt driver when hardware rf kill switch toggles;
2467 * driver must poll CSR_GP_CNTRL_REG register for change. This register
2468 * *is* readable even when device has been SW_RESET into low power mode
2469 * (e.g. during RF KILL).
2470 */
2471 static void
il3945_rfkill_poll(struct work_struct * data)2472 il3945_rfkill_poll(struct work_struct *data)
2473 {
2474 struct il_priv *il =
2475 container_of(data, struct il_priv, _3945.rfkill_poll.work);
2476 bool old_rfkill = test_bit(S_RFKILL, &il->status);
2477 bool new_rfkill =
2478 !(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
2479
2480 if (new_rfkill != old_rfkill) {
2481 if (new_rfkill)
2482 set_bit(S_RFKILL, &il->status);
2483 else
2484 clear_bit(S_RFKILL, &il->status);
2485
2486 wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill);
2487
2488 D_RF_KILL("RF_KILL bit toggled to %s.\n",
2489 new_rfkill ? "disable radio" : "enable radio");
2490 }
2491
2492 /* Keep this running, even if radio now enabled. This will be
2493 * cancelled in mac_start() if system decides to start again */
2494 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
2495 round_jiffies_relative(2 * HZ));
2496
2497 }
2498
2499 int
il3945_request_scan(struct il_priv * il,struct ieee80211_vif * vif)2500 il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
2501 {
2502 struct il_host_cmd cmd = {
2503 .id = C_SCAN,
2504 .len = sizeof(struct il3945_scan_cmd),
2505 .flags = CMD_SIZE_HUGE,
2506 };
2507 struct il3945_scan_cmd *scan;
2508 u8 n_probes = 0;
2509 enum nl80211_band band;
2510 bool is_active = false;
2511 int ret;
2512 u16 len;
2513
2514 lockdep_assert_held(&il->mutex);
2515
2516 if (!il->scan_cmd) {
2517 il->scan_cmd =
2518 kmalloc(sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE,
2519 GFP_KERNEL);
2520 if (!il->scan_cmd) {
2521 D_SCAN("Fail to allocate scan memory\n");
2522 return -ENOMEM;
2523 }
2524 }
2525 scan = il->scan_cmd;
2526 memset(scan, 0, sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE);
2527
2528 scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH;
2529 scan->quiet_time = IL_ACTIVE_QUIET_TIME;
2530
2531 if (il_is_associated(il)) {
2532 u16 interval;
2533 u32 extra;
2534 u32 suspend_time = 100;
2535 u32 scan_suspend_time = 100;
2536
2537 D_INFO("Scanning while associated...\n");
2538
2539 interval = vif->bss_conf.beacon_int;
2540
2541 scan->suspend_time = 0;
2542 scan->max_out_time = cpu_to_le32(200 * 1024);
2543 if (!interval)
2544 interval = suspend_time;
2545 /*
2546 * suspend time format:
2547 * 0-19: beacon interval in usec (time before exec.)
2548 * 20-23: 0
2549 * 24-31: number of beacons (suspend between channels)
2550 */
2551
2552 extra = (suspend_time / interval) << 24;
2553 scan_suspend_time =
2554 0xFF0FFFFF & (extra | ((suspend_time % interval) * 1024));
2555
2556 scan->suspend_time = cpu_to_le32(scan_suspend_time);
2557 D_SCAN("suspend_time 0x%X beacon interval %d\n",
2558 scan_suspend_time, interval);
2559 }
2560
2561 if (il->scan_request->n_ssids) {
2562 int i, p = 0;
2563 D_SCAN("Kicking off active scan\n");
2564 for (i = 0; i < il->scan_request->n_ssids; i++) {
2565 /* always does wildcard anyway */
2566 if (!il->scan_request->ssids[i].ssid_len)
2567 continue;
2568 scan->direct_scan[p].id = WLAN_EID_SSID;
2569 scan->direct_scan[p].len =
2570 il->scan_request->ssids[i].ssid_len;
2571 memcpy(scan->direct_scan[p].ssid,
2572 il->scan_request->ssids[i].ssid,
2573 il->scan_request->ssids[i].ssid_len);
2574 n_probes++;
2575 p++;
2576 }
2577 is_active = true;
2578 } else
2579 D_SCAN("Kicking off passive scan.\n");
2580
2581 /* We don't build a direct scan probe request; the uCode will do
2582 * that based on the direct_mask added to each channel entry */
2583 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
2584 scan->tx_cmd.sta_id = il->hw_params.bcast_id;
2585 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2586
2587 /* flags + rate selection */
2588
2589 switch (il->scan_band) {
2590 case NL80211_BAND_2GHZ:
2591 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
2592 scan->tx_cmd.rate = RATE_1M_PLCP;
2593 band = NL80211_BAND_2GHZ;
2594 break;
2595 case NL80211_BAND_5GHZ:
2596 scan->tx_cmd.rate = RATE_6M_PLCP;
2597 band = NL80211_BAND_5GHZ;
2598 break;
2599 default:
2600 IL_WARN("Invalid scan band\n");
2601 return -EIO;
2602 }
2603
2604 /*
2605 * If active scaning is requested but a certain channel is marked
2606 * passive, we can do active scanning if we detect transmissions. For
2607 * passive only scanning disable switching to active on any channel.
2608 */
2609 scan->good_CRC_th =
2610 is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_NEVER;
2611
2612 len =
2613 il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data,
2614 vif->addr, il->scan_request->ie,
2615 il->scan_request->ie_len,
2616 IL_MAX_SCAN_SIZE - sizeof(*scan));
2617 scan->tx_cmd.len = cpu_to_le16(len);
2618
2619 /* select Rx antennas */
2620 scan->flags |= il3945_get_antenna_flags(il);
2621
2622 scan->channel_count =
2623 il3945_get_channels_for_scan(il, band, is_active, n_probes,
2624 (void *)&scan->data[len], vif);
2625 if (scan->channel_count == 0) {
2626 D_SCAN("channel count %d\n", scan->channel_count);
2627 return -EIO;
2628 }
2629
2630 cmd.len +=
2631 le16_to_cpu(scan->tx_cmd.len) +
2632 scan->channel_count * sizeof(struct il3945_scan_channel);
2633 cmd.data = scan;
2634 scan->len = cpu_to_le16(cmd.len);
2635
2636 set_bit(S_SCAN_HW, &il->status);
2637 ret = il_send_cmd_sync(il, &cmd);
2638 if (ret)
2639 clear_bit(S_SCAN_HW, &il->status);
2640 return ret;
2641 }
2642
2643 void
il3945_post_scan(struct il_priv * il)2644 il3945_post_scan(struct il_priv *il)
2645 {
2646 /*
2647 * Since setting the RXON may have been deferred while
2648 * performing the scan, fire one off if needed
2649 */
2650 if (memcmp(&il->staging, &il->active, sizeof(il->staging)))
2651 il3945_commit_rxon(il);
2652 }
2653
2654 static void
il3945_bg_restart(struct work_struct * data)2655 il3945_bg_restart(struct work_struct *data)
2656 {
2657 struct il_priv *il = container_of(data, struct il_priv, restart);
2658
2659 if (test_bit(S_EXIT_PENDING, &il->status))
2660 return;
2661
2662 if (test_and_clear_bit(S_FW_ERROR, &il->status)) {
2663 mutex_lock(&il->mutex);
2664 il->is_open = 0;
2665 mutex_unlock(&il->mutex);
2666 il3945_down(il);
2667 ieee80211_restart_hw(il->hw);
2668 } else {
2669 il3945_down(il);
2670
2671 mutex_lock(&il->mutex);
2672 if (test_bit(S_EXIT_PENDING, &il->status)) {
2673 mutex_unlock(&il->mutex);
2674 return;
2675 }
2676
2677 __il3945_up(il);
2678 mutex_unlock(&il->mutex);
2679 }
2680 }
2681
2682 static void
il3945_bg_rx_replenish(struct work_struct * data)2683 il3945_bg_rx_replenish(struct work_struct *data)
2684 {
2685 struct il_priv *il = container_of(data, struct il_priv, rx_replenish);
2686
2687 mutex_lock(&il->mutex);
2688 if (test_bit(S_EXIT_PENDING, &il->status))
2689 goto out;
2690
2691 il3945_rx_replenish(il);
2692 out:
2693 mutex_unlock(&il->mutex);
2694 }
2695
2696 void
il3945_post_associate(struct il_priv * il)2697 il3945_post_associate(struct il_priv *il)
2698 {
2699 int rc = 0;
2700
2701 if (!il->vif || !il->is_open)
2702 return;
2703
2704 D_ASSOC("Associated as %d to: %pM\n", il->vif->cfg.aid,
2705 il->active.bssid_addr);
2706
2707 if (test_bit(S_EXIT_PENDING, &il->status))
2708 return;
2709
2710 il_scan_cancel_timeout(il, 200);
2711
2712 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2713 il3945_commit_rxon(il);
2714
2715 rc = il_send_rxon_timing(il);
2716 if (rc)
2717 IL_WARN("C_RXON_TIMING failed - " "Attempting to continue.\n");
2718
2719 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2720
2721 il->staging.assoc_id = cpu_to_le16(il->vif->cfg.aid);
2722
2723 D_ASSOC("assoc id %d beacon interval %d\n", il->vif->cfg.aid,
2724 il->vif->bss_conf.beacon_int);
2725
2726 if (il->vif->bss_conf.use_short_preamble)
2727 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2728 else
2729 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2730
2731 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
2732 if (il->vif->bss_conf.use_short_slot)
2733 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
2734 else
2735 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2736 }
2737
2738 il3945_commit_rxon(il);
2739
2740 switch (il->vif->type) {
2741 case NL80211_IFTYPE_STATION:
2742 il3945_rate_scale_init(il->hw, IL_AP_ID);
2743 break;
2744 case NL80211_IFTYPE_ADHOC:
2745 il3945_send_beacon_cmd(il);
2746 break;
2747 default:
2748 IL_ERR("%s Should not be called in %d mode\n", __func__,
2749 il->vif->type);
2750 break;
2751 }
2752 }
2753
2754 /*****************************************************************************
2755 *
2756 * mac80211 entry point functions
2757 *
2758 *****************************************************************************/
2759
2760 #define UCODE_READY_TIMEOUT (2 * HZ)
2761
2762 static int
il3945_mac_start(struct ieee80211_hw * hw)2763 il3945_mac_start(struct ieee80211_hw *hw)
2764 {
2765 struct il_priv *il = hw->priv;
2766 int ret;
2767
2768 /* we should be verifying the device is ready to be opened */
2769 mutex_lock(&il->mutex);
2770 D_MAC80211("enter\n");
2771
2772 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2773 * ucode filename and max sizes are card-specific. */
2774
2775 if (!il->ucode_code.len) {
2776 ret = il3945_read_ucode(il);
2777 if (ret) {
2778 IL_ERR("Could not read microcode: %d\n", ret);
2779 mutex_unlock(&il->mutex);
2780 goto out_release_irq;
2781 }
2782 }
2783
2784 ret = __il3945_up(il);
2785
2786 mutex_unlock(&il->mutex);
2787
2788 if (ret)
2789 goto out_release_irq;
2790
2791 D_INFO("Start UP work.\n");
2792
2793 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
2794 * mac80211 will not be run successfully. */
2795 ret = wait_event_timeout(il->wait_command_queue,
2796 test_bit(S_READY, &il->status),
2797 UCODE_READY_TIMEOUT);
2798 if (!ret) {
2799 if (!test_bit(S_READY, &il->status)) {
2800 IL_ERR("Wait for START_ALIVE timeout after %dms.\n",
2801 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2802 ret = -ETIMEDOUT;
2803 goto out_release_irq;
2804 }
2805 }
2806
2807 /* ucode is running and will send rfkill notifications,
2808 * no need to poll the killswitch state anymore */
2809 cancel_delayed_work(&il->_3945.rfkill_poll);
2810
2811 il->is_open = 1;
2812 D_MAC80211("leave\n");
2813 return 0;
2814
2815 out_release_irq:
2816 il->is_open = 0;
2817 D_MAC80211("leave - failed\n");
2818 return ret;
2819 }
2820
2821 static void
il3945_mac_stop(struct ieee80211_hw * hw)2822 il3945_mac_stop(struct ieee80211_hw *hw)
2823 {
2824 struct il_priv *il = hw->priv;
2825
2826 D_MAC80211("enter\n");
2827
2828 if (!il->is_open) {
2829 D_MAC80211("leave - skip\n");
2830 return;
2831 }
2832
2833 il->is_open = 0;
2834
2835 il3945_down(il);
2836
2837 flush_workqueue(il->workqueue);
2838
2839 /* start polling the killswitch state again */
2840 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
2841 round_jiffies_relative(2 * HZ));
2842
2843 D_MAC80211("leave\n");
2844 }
2845
2846 static void
il3945_mac_tx(struct ieee80211_hw * hw,struct ieee80211_tx_control * control,struct sk_buff * skb)2847 il3945_mac_tx(struct ieee80211_hw *hw,
2848 struct ieee80211_tx_control *control,
2849 struct sk_buff *skb)
2850 {
2851 struct il_priv *il = hw->priv;
2852
2853 D_MAC80211("enter\n");
2854
2855 D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2856 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2857
2858 if (il3945_tx_skb(il, control->sta, skb))
2859 dev_kfree_skb_any(skb);
2860
2861 D_MAC80211("leave\n");
2862 }
2863
2864 void
il3945_config_ap(struct il_priv * il)2865 il3945_config_ap(struct il_priv *il)
2866 {
2867 struct ieee80211_vif *vif = il->vif;
2868 int rc = 0;
2869
2870 if (test_bit(S_EXIT_PENDING, &il->status))
2871 return;
2872
2873 /* The following should be done only at AP bring up */
2874 if (!(il_is_associated(il))) {
2875
2876 /* RXON - unassoc (to set timing command) */
2877 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2878 il3945_commit_rxon(il);
2879
2880 /* RXON Timing */
2881 rc = il_send_rxon_timing(il);
2882 if (rc)
2883 IL_WARN("C_RXON_TIMING failed - "
2884 "Attempting to continue.\n");
2885
2886 il->staging.assoc_id = 0;
2887
2888 if (vif->bss_conf.use_short_preamble)
2889 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2890 else
2891 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2892
2893 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
2894 if (vif->bss_conf.use_short_slot)
2895 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
2896 else
2897 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2898 }
2899 /* restore RXON assoc */
2900 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2901 il3945_commit_rxon(il);
2902 }
2903 il3945_send_beacon_cmd(il);
2904 }
2905
2906 static int
il3945_mac_set_key(struct ieee80211_hw * hw,enum set_key_cmd cmd,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct ieee80211_key_conf * key)2907 il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2908 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
2909 struct ieee80211_key_conf *key)
2910 {
2911 struct il_priv *il = hw->priv;
2912 int ret = 0;
2913 u8 sta_id = IL_INVALID_STATION;
2914 u8 static_key;
2915
2916 D_MAC80211("enter\n");
2917
2918 if (il3945_mod_params.sw_crypto) {
2919 D_MAC80211("leave - hwcrypto disabled\n");
2920 return -EOPNOTSUPP;
2921 }
2922
2923 /*
2924 * To support IBSS RSN, don't program group keys in IBSS, the
2925 * hardware will then not attempt to decrypt the frames.
2926 */
2927 if (vif->type == NL80211_IFTYPE_ADHOC &&
2928 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
2929 D_MAC80211("leave - IBSS RSN\n");
2930 return -EOPNOTSUPP;
2931 }
2932
2933 static_key = !il_is_associated(il);
2934
2935 if (!static_key) {
2936 sta_id = il_sta_id_or_broadcast(il, sta);
2937 if (sta_id == IL_INVALID_STATION) {
2938 D_MAC80211("leave - station not found\n");
2939 return -EINVAL;
2940 }
2941 }
2942
2943 mutex_lock(&il->mutex);
2944 il_scan_cancel_timeout(il, 100);
2945
2946 switch (cmd) {
2947 case SET_KEY:
2948 if (static_key)
2949 ret = il3945_set_static_key(il, key);
2950 else
2951 ret = il3945_set_dynamic_key(il, key, sta_id);
2952 D_MAC80211("enable hwcrypto key\n");
2953 break;
2954 case DISABLE_KEY:
2955 if (static_key)
2956 ret = il3945_remove_static_key(il);
2957 else
2958 ret = il3945_clear_sta_key_info(il, sta_id);
2959 D_MAC80211("disable hwcrypto key\n");
2960 break;
2961 default:
2962 ret = -EINVAL;
2963 }
2964
2965 D_MAC80211("leave ret %d\n", ret);
2966 mutex_unlock(&il->mutex);
2967
2968 return ret;
2969 }
2970
2971 static int
il3945_mac_sta_add(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_sta * sta)2972 il3945_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2973 struct ieee80211_sta *sta)
2974 {
2975 struct il_priv *il = hw->priv;
2976 struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv;
2977 int ret;
2978 bool is_ap = vif->type == NL80211_IFTYPE_STATION;
2979 u8 sta_id;
2980
2981 mutex_lock(&il->mutex);
2982 D_INFO("station %pM\n", sta->addr);
2983 sta_priv->common.sta_id = IL_INVALID_STATION;
2984
2985 ret = il_add_station_common(il, sta->addr, is_ap, sta, &sta_id);
2986 if (ret) {
2987 IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret);
2988 /* Should we return success if return code is EEXIST ? */
2989 mutex_unlock(&il->mutex);
2990 return ret;
2991 }
2992
2993 sta_priv->common.sta_id = sta_id;
2994
2995 /* Initialize rate scaling */
2996 D_INFO("Initializing rate scaling for station %pM\n", sta->addr);
2997 il3945_rs_rate_init(il, sta, sta_id);
2998 mutex_unlock(&il->mutex);
2999
3000 return 0;
3001 }
3002
3003 static void
il3945_configure_filter(struct ieee80211_hw * hw,unsigned int changed_flags,unsigned int * total_flags,u64 multicast)3004 il3945_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
3005 unsigned int *total_flags, u64 multicast)
3006 {
3007 struct il_priv *il = hw->priv;
3008 __le32 filter_or = 0, filter_nand = 0;
3009
3010 #define CHK(test, flag) do { \
3011 if (*total_flags & (test)) \
3012 filter_or |= (flag); \
3013 else \
3014 filter_nand |= (flag); \
3015 } while (0)
3016
3017 D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags,
3018 *total_flags);
3019
3020 CHK(FIF_OTHER_BSS, RXON_FILTER_PROMISC_MSK);
3021 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
3022 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
3023
3024 #undef CHK
3025
3026 mutex_lock(&il->mutex);
3027
3028 il->staging.filter_flags &= ~filter_nand;
3029 il->staging.filter_flags |= filter_or;
3030
3031 /*
3032 * Not committing directly because hardware can perform a scan,
3033 * but even if hw is ready, committing here breaks for some reason,
3034 * we'll eventually commit the filter flags change anyway.
3035 */
3036
3037 mutex_unlock(&il->mutex);
3038
3039 /*
3040 * Receiving all multicast frames is always enabled by the
3041 * default flags setup in il_connection_init_rx_config()
3042 * since we currently do not support programming multicast
3043 * filters into the device.
3044 */
3045 *total_flags &=
3046 FIF_OTHER_BSS | FIF_ALLMULTI |
3047 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
3048 }
3049
3050 /*****************************************************************************
3051 *
3052 * sysfs attributes
3053 *
3054 *****************************************************************************/
3055
3056 #ifdef CONFIG_IWLEGACY_DEBUG
3057
3058 /*
3059 * The following adds a new attribute to the sysfs representation
3060 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3061 * used for controlling the debug level.
3062 *
3063 * See the level definitions in iwl for details.
3064 *
3065 * The debug_level being managed using sysfs below is a per device debug
3066 * level that is used instead of the global debug level if it (the per
3067 * device debug level) is set.
3068 */
3069 static ssize_t
il3945_show_debug_level(struct device * d,struct device_attribute * attr,char * buf)3070 il3945_show_debug_level(struct device *d, struct device_attribute *attr,
3071 char *buf)
3072 {
3073 struct il_priv *il = dev_get_drvdata(d);
3074 return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
3075 }
3076
3077 static ssize_t
il3945_store_debug_level(struct device * d,struct device_attribute * attr,const char * buf,size_t count)3078 il3945_store_debug_level(struct device *d, struct device_attribute *attr,
3079 const char *buf, size_t count)
3080 {
3081 struct il_priv *il = dev_get_drvdata(d);
3082 unsigned long val;
3083 int ret;
3084
3085 ret = kstrtoul(buf, 0, &val);
3086 if (ret)
3087 IL_INFO("%s is not in hex or decimal form.\n", buf);
3088 else
3089 il->debug_level = val;
3090
3091 return strnlen(buf, count);
3092 }
3093
3094 static DEVICE_ATTR(debug_level, 0644, il3945_show_debug_level,
3095 il3945_store_debug_level);
3096
3097 #endif /* CONFIG_IWLEGACY_DEBUG */
3098
3099 static ssize_t
il3945_show_temperature(struct device * d,struct device_attribute * attr,char * buf)3100 il3945_show_temperature(struct device *d, struct device_attribute *attr,
3101 char *buf)
3102 {
3103 struct il_priv *il = dev_get_drvdata(d);
3104
3105 if (!il_is_alive(il))
3106 return -EAGAIN;
3107
3108 return sprintf(buf, "%d\n", il3945_hw_get_temperature(il));
3109 }
3110
3111 static DEVICE_ATTR(temperature, 0444, il3945_show_temperature, NULL);
3112
3113 static ssize_t
il3945_show_tx_power(struct device * d,struct device_attribute * attr,char * buf)3114 il3945_show_tx_power(struct device *d, struct device_attribute *attr, char *buf)
3115 {
3116 struct il_priv *il = dev_get_drvdata(d);
3117 return sprintf(buf, "%d\n", il->tx_power_user_lmt);
3118 }
3119
3120 static ssize_t
il3945_store_tx_power(struct device * d,struct device_attribute * attr,const char * buf,size_t count)3121 il3945_store_tx_power(struct device *d, struct device_attribute *attr,
3122 const char *buf, size_t count)
3123 {
3124 struct il_priv *il = dev_get_drvdata(d);
3125 char *p = (char *)buf;
3126 u32 val;
3127
3128 val = simple_strtoul(p, &p, 10);
3129 if (p == buf)
3130 IL_INFO(": %s is not in decimal form.\n", buf);
3131 else
3132 il3945_hw_reg_set_txpower(il, val);
3133
3134 return count;
3135 }
3136
3137 static DEVICE_ATTR(tx_power, 0644, il3945_show_tx_power, il3945_store_tx_power);
3138
3139 static ssize_t
il3945_show_flags(struct device * d,struct device_attribute * attr,char * buf)3140 il3945_show_flags(struct device *d, struct device_attribute *attr, char *buf)
3141 {
3142 struct il_priv *il = dev_get_drvdata(d);
3143
3144 return sprintf(buf, "0x%04X\n", il->active.flags);
3145 }
3146
3147 static ssize_t
il3945_store_flags(struct device * d,struct device_attribute * attr,const char * buf,size_t count)3148 il3945_store_flags(struct device *d, struct device_attribute *attr,
3149 const char *buf, size_t count)
3150 {
3151 struct il_priv *il = dev_get_drvdata(d);
3152 u32 flags = simple_strtoul(buf, NULL, 0);
3153
3154 mutex_lock(&il->mutex);
3155 if (le32_to_cpu(il->staging.flags) != flags) {
3156 /* Cancel any currently running scans... */
3157 if (il_scan_cancel_timeout(il, 100))
3158 IL_WARN("Could not cancel scan.\n");
3159 else {
3160 D_INFO("Committing rxon.flags = 0x%04X\n", flags);
3161 il->staging.flags = cpu_to_le32(flags);
3162 il3945_commit_rxon(il);
3163 }
3164 }
3165 mutex_unlock(&il->mutex);
3166
3167 return count;
3168 }
3169
3170 static DEVICE_ATTR(flags, 0644, il3945_show_flags, il3945_store_flags);
3171
3172 static ssize_t
il3945_show_filter_flags(struct device * d,struct device_attribute * attr,char * buf)3173 il3945_show_filter_flags(struct device *d, struct device_attribute *attr,
3174 char *buf)
3175 {
3176 struct il_priv *il = dev_get_drvdata(d);
3177
3178 return sprintf(buf, "0x%04X\n", le32_to_cpu(il->active.filter_flags));
3179 }
3180
3181 static ssize_t
il3945_store_filter_flags(struct device * d,struct device_attribute * attr,const char * buf,size_t count)3182 il3945_store_filter_flags(struct device *d, struct device_attribute *attr,
3183 const char *buf, size_t count)
3184 {
3185 struct il_priv *il = dev_get_drvdata(d);
3186 u32 filter_flags = simple_strtoul(buf, NULL, 0);
3187
3188 mutex_lock(&il->mutex);
3189 if (le32_to_cpu(il->staging.filter_flags) != filter_flags) {
3190 /* Cancel any currently running scans... */
3191 if (il_scan_cancel_timeout(il, 100))
3192 IL_WARN("Could not cancel scan.\n");
3193 else {
3194 D_INFO("Committing rxon.filter_flags = " "0x%04X\n",
3195 filter_flags);
3196 il->staging.filter_flags = cpu_to_le32(filter_flags);
3197 il3945_commit_rxon(il);
3198 }
3199 }
3200 mutex_unlock(&il->mutex);
3201
3202 return count;
3203 }
3204
3205 static DEVICE_ATTR(filter_flags, 0644, il3945_show_filter_flags,
3206 il3945_store_filter_flags);
3207
3208 static ssize_t
il3945_show_measurement(struct device * d,struct device_attribute * attr,char * buf)3209 il3945_show_measurement(struct device *d, struct device_attribute *attr,
3210 char *buf)
3211 {
3212 struct il_priv *il = dev_get_drvdata(d);
3213 struct il_spectrum_notification measure_report;
3214 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3215 u8 *data = (u8 *) &measure_report;
3216 unsigned long flags;
3217
3218 spin_lock_irqsave(&il->lock, flags);
3219 if (!(il->measurement_status & MEASUREMENT_READY)) {
3220 spin_unlock_irqrestore(&il->lock, flags);
3221 return 0;
3222 }
3223 memcpy(&measure_report, &il->measure_report, size);
3224 il->measurement_status = 0;
3225 spin_unlock_irqrestore(&il->lock, flags);
3226
3227 while (size && PAGE_SIZE - len) {
3228 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3229 PAGE_SIZE - len, true);
3230 len = strlen(buf);
3231 if (PAGE_SIZE - len)
3232 buf[len++] = '\n';
3233
3234 ofs += 16;
3235 size -= min(size, 16U);
3236 }
3237
3238 return len;
3239 }
3240
3241 static ssize_t
il3945_store_measurement(struct device * d,struct device_attribute * attr,const char * buf,size_t count)3242 il3945_store_measurement(struct device *d, struct device_attribute *attr,
3243 const char *buf, size_t count)
3244 {
3245 struct il_priv *il = dev_get_drvdata(d);
3246 struct ieee80211_measurement_params params = {
3247 .channel = le16_to_cpu(il->active.channel),
3248 .start_time = cpu_to_le64(il->_3945.last_tsf),
3249 .duration = cpu_to_le16(1),
3250 };
3251 u8 type = IL_MEASURE_BASIC;
3252 u8 buffer[32];
3253 u8 channel;
3254
3255 if (count) {
3256 char *p = buffer;
3257 strscpy(buffer, buf, sizeof(buffer));
3258 channel = simple_strtoul(p, NULL, 0);
3259 if (channel)
3260 params.channel = channel;
3261
3262 p = buffer;
3263 while (*p && *p != ' ')
3264 p++;
3265 if (*p)
3266 type = simple_strtoul(p + 1, NULL, 0);
3267 }
3268
3269 D_INFO("Invoking measurement of type %d on " "channel %d (for '%s')\n",
3270 type, params.channel, buf);
3271 il3945_get_measurement(il, ¶ms, type);
3272
3273 return count;
3274 }
3275
3276 static DEVICE_ATTR(measurement, 0600, il3945_show_measurement,
3277 il3945_store_measurement);
3278
3279 static ssize_t
il3945_store_retry_rate(struct device * d,struct device_attribute * attr,const char * buf,size_t count)3280 il3945_store_retry_rate(struct device *d, struct device_attribute *attr,
3281 const char *buf, size_t count)
3282 {
3283 struct il_priv *il = dev_get_drvdata(d);
3284
3285 il->retry_rate = simple_strtoul(buf, NULL, 0);
3286 if (il->retry_rate <= 0)
3287 il->retry_rate = 1;
3288
3289 return count;
3290 }
3291
3292 static ssize_t
il3945_show_retry_rate(struct device * d,struct device_attribute * attr,char * buf)3293 il3945_show_retry_rate(struct device *d, struct device_attribute *attr,
3294 char *buf)
3295 {
3296 struct il_priv *il = dev_get_drvdata(d);
3297 return sprintf(buf, "%d", il->retry_rate);
3298 }
3299
3300 static DEVICE_ATTR(retry_rate, 0600, il3945_show_retry_rate,
3301 il3945_store_retry_rate);
3302
3303 static ssize_t
il3945_show_channels(struct device * d,struct device_attribute * attr,char * buf)3304 il3945_show_channels(struct device *d, struct device_attribute *attr, char *buf)
3305 {
3306 /* all this shit doesn't belong into sysfs anyway */
3307 return 0;
3308 }
3309
3310 static DEVICE_ATTR(channels, 0400, il3945_show_channels, NULL);
3311
3312 static ssize_t
il3945_show_antenna(struct device * d,struct device_attribute * attr,char * buf)3313 il3945_show_antenna(struct device *d, struct device_attribute *attr, char *buf)
3314 {
3315 struct il_priv *il = dev_get_drvdata(d);
3316
3317 if (!il_is_alive(il))
3318 return -EAGAIN;
3319
3320 return sprintf(buf, "%d\n", il3945_mod_params.antenna);
3321 }
3322
3323 static ssize_t
il3945_store_antenna(struct device * d,struct device_attribute * attr,const char * buf,size_t count)3324 il3945_store_antenna(struct device *d, struct device_attribute *attr,
3325 const char *buf, size_t count)
3326 {
3327 struct il_priv *il __maybe_unused = dev_get_drvdata(d);
3328 int ant;
3329
3330 if (count == 0)
3331 return 0;
3332
3333 if (sscanf(buf, "%1i", &ant) != 1) {
3334 D_INFO("not in hex or decimal form.\n");
3335 return count;
3336 }
3337
3338 if (ant >= 0 && ant <= 2) {
3339 D_INFO("Setting antenna select to %d.\n", ant);
3340 il3945_mod_params.antenna = (enum il3945_antenna)ant;
3341 } else
3342 D_INFO("Bad antenna select value %d.\n", ant);
3343
3344 return count;
3345 }
3346
3347 static DEVICE_ATTR(antenna, 0644, il3945_show_antenna, il3945_store_antenna);
3348
3349 static ssize_t
il3945_show_status(struct device * d,struct device_attribute * attr,char * buf)3350 il3945_show_status(struct device *d, struct device_attribute *attr, char *buf)
3351 {
3352 struct il_priv *il = dev_get_drvdata(d);
3353 if (!il_is_alive(il))
3354 return -EAGAIN;
3355 return sprintf(buf, "0x%08x\n", (int)il->status);
3356 }
3357
3358 static DEVICE_ATTR(status, 0444, il3945_show_status, NULL);
3359
3360 static ssize_t
il3945_dump_error_log(struct device * d,struct device_attribute * attr,const char * buf,size_t count)3361 il3945_dump_error_log(struct device *d, struct device_attribute *attr,
3362 const char *buf, size_t count)
3363 {
3364 struct il_priv *il = dev_get_drvdata(d);
3365 char *p = (char *)buf;
3366
3367 if (p[0] == '1')
3368 il3945_dump_nic_error_log(il);
3369
3370 return strnlen(buf, count);
3371 }
3372
3373 static DEVICE_ATTR(dump_errors, 0200, NULL, il3945_dump_error_log);
3374
3375 /*****************************************************************************
3376 *
3377 * driver setup and tear down
3378 *
3379 *****************************************************************************/
3380
3381 static void
il3945_setup_deferred_work(struct il_priv * il)3382 il3945_setup_deferred_work(struct il_priv *il)
3383 {
3384 il->workqueue = create_singlethread_workqueue(DRV_NAME);
3385
3386 init_waitqueue_head(&il->wait_command_queue);
3387
3388 INIT_WORK(&il->restart, il3945_bg_restart);
3389 INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish);
3390 INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start);
3391 INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start);
3392 INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll);
3393
3394 il_setup_scan_deferred_work(il);
3395
3396 il3945_hw_setup_deferred_work(il);
3397
3398 timer_setup(&il->watchdog, il_bg_watchdog, 0);
3399
3400 tasklet_setup(&il->irq_tasklet, il3945_irq_tasklet);
3401 }
3402
3403 static void
il3945_cancel_deferred_work(struct il_priv * il)3404 il3945_cancel_deferred_work(struct il_priv *il)
3405 {
3406 il3945_hw_cancel_deferred_work(il);
3407
3408 cancel_delayed_work_sync(&il->init_alive_start);
3409 cancel_delayed_work(&il->alive_start);
3410
3411 il_cancel_scan_deferred_work(il);
3412 }
3413
3414 static struct attribute *il3945_sysfs_entries[] = {
3415 &dev_attr_antenna.attr,
3416 &dev_attr_channels.attr,
3417 &dev_attr_dump_errors.attr,
3418 &dev_attr_flags.attr,
3419 &dev_attr_filter_flags.attr,
3420 &dev_attr_measurement.attr,
3421 &dev_attr_retry_rate.attr,
3422 &dev_attr_status.attr,
3423 &dev_attr_temperature.attr,
3424 &dev_attr_tx_power.attr,
3425 #ifdef CONFIG_IWLEGACY_DEBUG
3426 &dev_attr_debug_level.attr,
3427 #endif
3428 NULL
3429 };
3430
3431 static const struct attribute_group il3945_attribute_group = {
3432 .name = NULL, /* put in device directory */
3433 .attrs = il3945_sysfs_entries,
3434 };
3435
3436 static struct ieee80211_ops il3945_mac_ops __ro_after_init = {
3437 .tx = il3945_mac_tx,
3438 .start = il3945_mac_start,
3439 .stop = il3945_mac_stop,
3440 .add_interface = il_mac_add_interface,
3441 .remove_interface = il_mac_remove_interface,
3442 .change_interface = il_mac_change_interface,
3443 .config = il_mac_config,
3444 .configure_filter = il3945_configure_filter,
3445 .set_key = il3945_mac_set_key,
3446 .conf_tx = il_mac_conf_tx,
3447 .reset_tsf = il_mac_reset_tsf,
3448 .bss_info_changed = il_mac_bss_info_changed,
3449 .hw_scan = il_mac_hw_scan,
3450 .sta_add = il3945_mac_sta_add,
3451 .sta_remove = il_mac_sta_remove,
3452 .tx_last_beacon = il_mac_tx_last_beacon,
3453 .flush = il_mac_flush,
3454 };
3455
3456 static int
il3945_init_drv(struct il_priv * il)3457 il3945_init_drv(struct il_priv *il)
3458 {
3459 int ret;
3460 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
3461
3462 il->retry_rate = 1;
3463 il->beacon_skb = NULL;
3464
3465 spin_lock_init(&il->sta_lock);
3466 spin_lock_init(&il->hcmd_lock);
3467
3468 INIT_LIST_HEAD(&il->free_frames);
3469
3470 mutex_init(&il->mutex);
3471
3472 il->ieee_channels = NULL;
3473 il->ieee_rates = NULL;
3474 il->band = NL80211_BAND_2GHZ;
3475
3476 il->iw_mode = NL80211_IFTYPE_STATION;
3477 il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF;
3478
3479 /* initialize force reset */
3480 il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD;
3481
3482 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
3483 IL_WARN("Unsupported EEPROM version: 0x%04X\n",
3484 eeprom->version);
3485 ret = -EINVAL;
3486 goto err;
3487 }
3488 ret = il_init_channel_map(il);
3489 if (ret) {
3490 IL_ERR("initializing regulatory failed: %d\n", ret);
3491 goto err;
3492 }
3493
3494 /* Set up txpower settings in driver for all channels */
3495 if (il3945_txpower_set_from_eeprom(il)) {
3496 ret = -EIO;
3497 goto err_free_channel_map;
3498 }
3499
3500 ret = il_init_geos(il);
3501 if (ret) {
3502 IL_ERR("initializing geos failed: %d\n", ret);
3503 goto err_free_channel_map;
3504 }
3505 il3945_init_hw_rates(il, il->ieee_rates);
3506
3507 return 0;
3508
3509 err_free_channel_map:
3510 il_free_channel_map(il);
3511 err:
3512 return ret;
3513 }
3514
3515 #define IL3945_MAX_PROBE_REQUEST 200
3516
3517 static int
il3945_setup_mac(struct il_priv * il)3518 il3945_setup_mac(struct il_priv *il)
3519 {
3520 int ret;
3521 struct ieee80211_hw *hw = il->hw;
3522
3523 hw->rate_control_algorithm = "iwl-3945-rs";
3524 hw->sta_data_size = sizeof(struct il3945_sta_priv);
3525 hw->vif_data_size = sizeof(struct il_vif_priv);
3526
3527 /* Tell mac80211 our characteristics */
3528 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
3529 ieee80211_hw_set(hw, SUPPORTS_PS);
3530 ieee80211_hw_set(hw, SIGNAL_DBM);
3531 ieee80211_hw_set(hw, SPECTRUM_MGMT);
3532
3533 hw->wiphy->interface_modes =
3534 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC);
3535
3536 hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN;
3537 hw->wiphy->regulatory_flags |= REGULATORY_CUSTOM_REG |
3538 REGULATORY_DISABLE_BEACON_HINTS;
3539
3540 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
3541
3542 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
3543 /* we create the 802.11 header and a zero-length SSID element */
3544 hw->wiphy->max_scan_ie_len = IL3945_MAX_PROBE_REQUEST - 24 - 2;
3545
3546 /* Default value; 4 EDCA QOS priorities */
3547 hw->queues = 4;
3548
3549 if (il->bands[NL80211_BAND_2GHZ].n_channels)
3550 il->hw->wiphy->bands[NL80211_BAND_2GHZ] =
3551 &il->bands[NL80211_BAND_2GHZ];
3552
3553 if (il->bands[NL80211_BAND_5GHZ].n_channels)
3554 il->hw->wiphy->bands[NL80211_BAND_5GHZ] =
3555 &il->bands[NL80211_BAND_5GHZ];
3556
3557 il_leds_init(il);
3558
3559 wiphy_ext_feature_set(il->hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
3560
3561 ret = ieee80211_register_hw(il->hw);
3562 if (ret) {
3563 IL_ERR("Failed to register hw (error %d)\n", ret);
3564 return ret;
3565 }
3566 il->mac80211_registered = 1;
3567
3568 return 0;
3569 }
3570
3571 static int
il3945_pci_probe(struct pci_dev * pdev,const struct pci_device_id * ent)3572 il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3573 {
3574 int err = 0;
3575 struct il_priv *il;
3576 struct ieee80211_hw *hw;
3577 struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data);
3578 struct il3945_eeprom *eeprom;
3579 unsigned long flags;
3580
3581 /***********************
3582 * 1. Allocating HW data
3583 * ********************/
3584
3585 hw = ieee80211_alloc_hw(sizeof(struct il_priv), &il3945_mac_ops);
3586 if (!hw) {
3587 err = -ENOMEM;
3588 goto out;
3589 }
3590 il = hw->priv;
3591 il->hw = hw;
3592 SET_IEEE80211_DEV(hw, &pdev->dev);
3593
3594 il->cmd_queue = IL39_CMD_QUEUE_NUM;
3595
3596 D_INFO("*** LOAD DRIVER ***\n");
3597 il->cfg = cfg;
3598 il->ops = &il3945_ops;
3599 #ifdef CONFIG_IWLEGACY_DEBUGFS
3600 il->debugfs_ops = &il3945_debugfs_ops;
3601 #endif
3602 il->pci_dev = pdev;
3603 il->inta_mask = CSR_INI_SET_MASK;
3604
3605 /***************************
3606 * 2. Initializing PCI bus
3607 * *************************/
3608 pci_disable_link_state(pdev,
3609 PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
3610 PCIE_LINK_STATE_CLKPM);
3611
3612 if (pci_enable_device(pdev)) {
3613 err = -ENODEV;
3614 goto out_ieee80211_free_hw;
3615 }
3616
3617 pci_set_master(pdev);
3618
3619 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
3620 if (err) {
3621 IL_WARN("No suitable DMA available.\n");
3622 goto out_pci_disable_device;
3623 }
3624
3625 pci_set_drvdata(pdev, il);
3626 err = pci_request_regions(pdev, DRV_NAME);
3627 if (err)
3628 goto out_pci_disable_device;
3629
3630 /***********************
3631 * 3. Read REV Register
3632 * ********************/
3633 il->hw_base = pci_ioremap_bar(pdev, 0);
3634 if (!il->hw_base) {
3635 err = -ENODEV;
3636 goto out_pci_release_regions;
3637 }
3638
3639 D_INFO("pci_resource_len = 0x%08llx\n",
3640 (unsigned long long)pci_resource_len(pdev, 0));
3641 D_INFO("pci_resource_base = %p\n", il->hw_base);
3642
3643 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3644 * PCI Tx retries from interfering with C3 CPU state */
3645 pci_write_config_byte(pdev, 0x41, 0x00);
3646
3647 /* these spin locks will be used in apm_init and EEPROM access
3648 * we should init now
3649 */
3650 spin_lock_init(&il->reg_lock);
3651 spin_lock_init(&il->lock);
3652
3653 /*
3654 * stop and reset the on-board processor just in case it is in a
3655 * strange state ... like being left stranded by a primary kernel
3656 * and this is now the kdump kernel trying to start up
3657 */
3658 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3659
3660 /***********************
3661 * 4. Read EEPROM
3662 * ********************/
3663
3664 /* Read the EEPROM */
3665 err = il_eeprom_init(il);
3666 if (err) {
3667 IL_ERR("Unable to init EEPROM\n");
3668 goto out_iounmap;
3669 }
3670 /* MAC Address location in EEPROM same for 3945/4965 */
3671 eeprom = (struct il3945_eeprom *)il->eeprom;
3672 D_INFO("MAC address: %pM\n", eeprom->mac_address);
3673 SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address);
3674
3675 /***********************
3676 * 5. Setup HW Constants
3677 * ********************/
3678 /* Device-specific setup */
3679 err = il3945_hw_set_hw_params(il);
3680 if (err) {
3681 IL_ERR("failed to set hw settings\n");
3682 goto out_eeprom_free;
3683 }
3684
3685 /***********************
3686 * 6. Setup il
3687 * ********************/
3688
3689 err = il3945_init_drv(il);
3690 if (err) {
3691 IL_ERR("initializing driver failed\n");
3692 goto out_unset_hw_params;
3693 }
3694
3695 IL_INFO("Detected Intel Wireless WiFi Link %s\n", il->cfg->name);
3696
3697 /***********************
3698 * 7. Setup Services
3699 * ********************/
3700
3701 spin_lock_irqsave(&il->lock, flags);
3702 il_disable_interrupts(il);
3703 spin_unlock_irqrestore(&il->lock, flags);
3704
3705 pci_enable_msi(il->pci_dev);
3706
3707 err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il);
3708 if (err) {
3709 IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq);
3710 goto out_disable_msi;
3711 }
3712
3713 err = sysfs_create_group(&pdev->dev.kobj, &il3945_attribute_group);
3714 if (err) {
3715 IL_ERR("failed to create sysfs device attributes\n");
3716 goto out_release_irq;
3717 }
3718
3719 il_set_rxon_channel(il, &il->bands[NL80211_BAND_2GHZ].channels[5]);
3720 il3945_setup_deferred_work(il);
3721 il3945_setup_handlers(il);
3722 il_power_initialize(il);
3723
3724 /*********************************
3725 * 8. Setup and Register mac80211
3726 * *******************************/
3727
3728 il_enable_interrupts(il);
3729
3730 err = il3945_setup_mac(il);
3731 if (err)
3732 goto out_remove_sysfs;
3733
3734 il_dbgfs_register(il, DRV_NAME);
3735
3736 /* Start monitoring the killswitch */
3737 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2 * HZ);
3738
3739 return 0;
3740
3741 out_remove_sysfs:
3742 destroy_workqueue(il->workqueue);
3743 il->workqueue = NULL;
3744 sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
3745 out_release_irq:
3746 free_irq(il->pci_dev->irq, il);
3747 out_disable_msi:
3748 pci_disable_msi(il->pci_dev);
3749 il_free_geos(il);
3750 il_free_channel_map(il);
3751 out_unset_hw_params:
3752 il3945_unset_hw_params(il);
3753 out_eeprom_free:
3754 il_eeprom_free(il);
3755 out_iounmap:
3756 iounmap(il->hw_base);
3757 out_pci_release_regions:
3758 pci_release_regions(pdev);
3759 out_pci_disable_device:
3760 pci_disable_device(pdev);
3761 out_ieee80211_free_hw:
3762 ieee80211_free_hw(il->hw);
3763 out:
3764 return err;
3765 }
3766
3767 static void
il3945_pci_remove(struct pci_dev * pdev)3768 il3945_pci_remove(struct pci_dev *pdev)
3769 {
3770 struct il_priv *il = pci_get_drvdata(pdev);
3771 unsigned long flags;
3772
3773 if (!il)
3774 return;
3775
3776 D_INFO("*** UNLOAD DRIVER ***\n");
3777
3778 il_dbgfs_unregister(il);
3779
3780 set_bit(S_EXIT_PENDING, &il->status);
3781
3782 il_leds_exit(il);
3783
3784 if (il->mac80211_registered) {
3785 ieee80211_unregister_hw(il->hw);
3786 il->mac80211_registered = 0;
3787 } else {
3788 il3945_down(il);
3789 }
3790
3791 /*
3792 * Make sure device is reset to low power before unloading driver.
3793 * This may be redundant with il_down(), but there are paths to
3794 * run il_down() without calling apm_ops.stop(), and there are
3795 * paths to avoid running il_down() at all before leaving driver.
3796 * This (inexpensive) call *makes sure* device is reset.
3797 */
3798 il_apm_stop(il);
3799
3800 /* make sure we flush any pending irq or
3801 * tasklet for the driver
3802 */
3803 spin_lock_irqsave(&il->lock, flags);
3804 il_disable_interrupts(il);
3805 spin_unlock_irqrestore(&il->lock, flags);
3806
3807 il3945_synchronize_irq(il);
3808
3809 sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
3810
3811 cancel_delayed_work_sync(&il->_3945.rfkill_poll);
3812
3813 il3945_dealloc_ucode_pci(il);
3814
3815 if (il->rxq.bd)
3816 il3945_rx_queue_free(il, &il->rxq);
3817 il3945_hw_txq_ctx_free(il);
3818
3819 il3945_unset_hw_params(il);
3820
3821 /*netif_stop_queue(dev); */
3822
3823 /* ieee80211_unregister_hw calls il3945_mac_stop, which flushes
3824 * il->workqueue... so we can't take down the workqueue
3825 * until now... */
3826 destroy_workqueue(il->workqueue);
3827 il->workqueue = NULL;
3828
3829 free_irq(pdev->irq, il);
3830 pci_disable_msi(pdev);
3831
3832 iounmap(il->hw_base);
3833 pci_release_regions(pdev);
3834 pci_disable_device(pdev);
3835
3836 il_free_channel_map(il);
3837 il_free_geos(il);
3838 kfree(il->scan_cmd);
3839 dev_kfree_skb(il->beacon_skb);
3840 ieee80211_free_hw(il->hw);
3841 }
3842
3843 /*****************************************************************************
3844 *
3845 * driver and module entry point
3846 *
3847 *****************************************************************************/
3848
3849 static struct pci_driver il3945_driver = {
3850 .name = DRV_NAME,
3851 .id_table = il3945_hw_card_ids,
3852 .probe = il3945_pci_probe,
3853 .remove = il3945_pci_remove,
3854 .driver.pm = IL_LEGACY_PM_OPS,
3855 };
3856
3857 static int __init
il3945_init(void)3858 il3945_init(void)
3859 {
3860
3861 int ret;
3862 pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
3863 pr_info(DRV_COPYRIGHT "\n");
3864
3865 /*
3866 * Disabling hardware scan means that mac80211 will perform scans
3867 * "the hard way", rather than using device's scan.
3868 */
3869 if (il3945_mod_params.disable_hw_scan) {
3870 pr_info("hw_scan is disabled\n");
3871 il3945_mac_ops.hw_scan = NULL;
3872 }
3873
3874 ret = il3945_rate_control_register();
3875 if (ret) {
3876 pr_err("Unable to register rate control algorithm: %d\n", ret);
3877 return ret;
3878 }
3879
3880 ret = pci_register_driver(&il3945_driver);
3881 if (ret) {
3882 pr_err("Unable to initialize PCI module\n");
3883 goto error_register;
3884 }
3885
3886 return ret;
3887
3888 error_register:
3889 il3945_rate_control_unregister();
3890 return ret;
3891 }
3892
3893 static void __exit
il3945_exit(void)3894 il3945_exit(void)
3895 {
3896 pci_unregister_driver(&il3945_driver);
3897 il3945_rate_control_unregister();
3898 }
3899
3900 MODULE_FIRMWARE(IL3945_MODULE_FIRMWARE(IL3945_UCODE_API_MAX));
3901
3902 module_param_named(antenna, il3945_mod_params.antenna, int, 0444);
3903 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
3904 module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, 0444);
3905 MODULE_PARM_DESC(swcrypto, "using software crypto (default 1 [software])");
3906 module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan, int,
3907 0444);
3908 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)");
3909 #ifdef CONFIG_IWLEGACY_DEBUG
3910 module_param_named(debug, il_debug_level, uint, 0644);
3911 MODULE_PARM_DESC(debug, "debug output mask");
3912 #endif
3913 module_param_named(fw_restart, il3945_mod_params.restart_fw, int, 0444);
3914 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
3915
3916 module_exit(il3945_exit);
3917 module_init(il3945_init);
3918