1 // SPDX-License-Identifier: GPL-2.0
2
3 /* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2018-2022 Linaro Ltd.
5 */
6
7 /* DOC: IPA Interrupts
8 *
9 * The IPA has an interrupt line distinct from the interrupt used by the GSI
10 * code. Whereas GSI interrupts are generally related to channel events (like
11 * transfer completions), IPA interrupts are related to other events related
12 * to the IPA. Some of the IPA interrupts come from a microcontroller
13 * embedded in the IPA. Each IPA interrupt type can be both masked and
14 * acknowledged independent of the others.
15 *
16 * Two of the IPA interrupts are initiated by the microcontroller. A third
17 * can be generated to signal the need for a wakeup/resume when an IPA
18 * endpoint has been suspended. There are other IPA events, but at this
19 * time only these three are supported.
20 */
21
22 #include <linux/types.h>
23 #include <linux/interrupt.h>
24 #include <linux/pm_runtime.h>
25
26 #include "ipa.h"
27 #include "ipa_reg.h"
28 #include "ipa_endpoint.h"
29 #include "ipa_interrupt.h"
30
31 /**
32 * struct ipa_interrupt - IPA interrupt information
33 * @ipa: IPA pointer
34 * @irq: Linux IRQ number used for IPA interrupts
35 * @enabled: Mask indicating which interrupts are enabled
36 * @handler: Array of handlers indexed by IPA interrupt ID
37 */
38 struct ipa_interrupt {
39 struct ipa *ipa;
40 u32 irq;
41 u32 enabled;
42 ipa_irq_handler_t handler[IPA_IRQ_COUNT];
43 };
44
45 /* Returns true if the interrupt type is associated with the microcontroller */
ipa_interrupt_uc(struct ipa_interrupt * interrupt,u32 irq_id)46 static bool ipa_interrupt_uc(struct ipa_interrupt *interrupt, u32 irq_id)
47 {
48 return irq_id == IPA_IRQ_UC_0 || irq_id == IPA_IRQ_UC_1;
49 }
50
51 /* Process a particular interrupt type that has been received */
ipa_interrupt_process(struct ipa_interrupt * interrupt,u32 irq_id)52 static void ipa_interrupt_process(struct ipa_interrupt *interrupt, u32 irq_id)
53 {
54 bool uc_irq = ipa_interrupt_uc(interrupt, irq_id);
55 struct ipa *ipa = interrupt->ipa;
56 const struct ipa_reg *reg;
57 u32 mask = BIT(irq_id);
58 u32 offset;
59
60 /* For microcontroller interrupts, clear the interrupt right away,
61 * "to avoid clearing unhandled interrupts."
62 */
63 reg = ipa_reg(ipa, IPA_IRQ_CLR);
64 offset = ipa_reg_offset(reg);
65 if (uc_irq)
66 iowrite32(mask, ipa->reg_virt + offset);
67
68 if (irq_id < IPA_IRQ_COUNT && interrupt->handler[irq_id])
69 interrupt->handler[irq_id](interrupt->ipa, irq_id);
70
71 /* Clearing the SUSPEND_TX interrupt also clears the register
72 * that tells us which suspended endpoint(s) caused the interrupt,
73 * so defer clearing until after the handler has been called.
74 */
75 if (!uc_irq)
76 iowrite32(mask, ipa->reg_virt + offset);
77 }
78
79 /* IPA IRQ handler is threaded */
ipa_isr_thread(int irq,void * dev_id)80 static irqreturn_t ipa_isr_thread(int irq, void *dev_id)
81 {
82 struct ipa_interrupt *interrupt = dev_id;
83 struct ipa *ipa = interrupt->ipa;
84 u32 enabled = interrupt->enabled;
85 const struct ipa_reg *reg;
86 struct device *dev;
87 u32 pending;
88 u32 offset;
89 u32 mask;
90 int ret;
91
92 dev = &ipa->pdev->dev;
93 ret = pm_runtime_get_sync(dev);
94 if (WARN_ON(ret < 0))
95 goto out_power_put;
96
97 /* The status register indicates which conditions are present,
98 * including conditions whose interrupt is not enabled. Handle
99 * only the enabled ones.
100 */
101 reg = ipa_reg(ipa, IPA_IRQ_STTS);
102 offset = ipa_reg_offset(reg);
103 pending = ioread32(ipa->reg_virt + offset);
104 while ((mask = pending & enabled)) {
105 do {
106 u32 irq_id = __ffs(mask);
107
108 mask ^= BIT(irq_id);
109
110 ipa_interrupt_process(interrupt, irq_id);
111 } while (mask);
112 pending = ioread32(ipa->reg_virt + offset);
113 }
114
115 /* If any disabled interrupts are pending, clear them */
116 if (pending) {
117 dev_dbg(dev, "clearing disabled IPA interrupts 0x%08x\n",
118 pending);
119 reg = ipa_reg(ipa, IPA_IRQ_CLR);
120 offset = ipa_reg_offset(reg);
121 iowrite32(pending, ipa->reg_virt + offset);
122 }
123 out_power_put:
124 pm_runtime_mark_last_busy(dev);
125 (void)pm_runtime_put_autosuspend(dev);
126
127 return IRQ_HANDLED;
128 }
129
ipa_interrupt_irq_disable(struct ipa * ipa)130 void ipa_interrupt_irq_disable(struct ipa *ipa)
131 {
132 disable_irq(ipa->interrupt->irq);
133 }
134
ipa_interrupt_irq_enable(struct ipa * ipa)135 void ipa_interrupt_irq_enable(struct ipa *ipa)
136 {
137 enable_irq(ipa->interrupt->irq);
138 }
139
140 /* Common function used to enable/disable TX_SUSPEND for an endpoint */
ipa_interrupt_suspend_control(struct ipa_interrupt * interrupt,u32 endpoint_id,bool enable)141 static void ipa_interrupt_suspend_control(struct ipa_interrupt *interrupt,
142 u32 endpoint_id, bool enable)
143 {
144 struct ipa *ipa = interrupt->ipa;
145 u32 mask = BIT(endpoint_id);
146 const struct ipa_reg *reg;
147 u32 offset;
148 u32 val;
149
150 WARN_ON(!(mask & ipa->available));
151
152 /* IPA version 3.0 does not support TX_SUSPEND interrupt control */
153 if (ipa->version == IPA_VERSION_3_0)
154 return;
155
156 reg = ipa_reg(ipa, IRQ_SUSPEND_EN);
157 offset = ipa_reg_offset(reg);
158 val = ioread32(ipa->reg_virt + offset);
159 if (enable)
160 val |= mask;
161 else
162 val &= ~mask;
163 iowrite32(val, ipa->reg_virt + offset);
164 }
165
166 /* Enable TX_SUSPEND for an endpoint */
167 void
ipa_interrupt_suspend_enable(struct ipa_interrupt * interrupt,u32 endpoint_id)168 ipa_interrupt_suspend_enable(struct ipa_interrupt *interrupt, u32 endpoint_id)
169 {
170 ipa_interrupt_suspend_control(interrupt, endpoint_id, true);
171 }
172
173 /* Disable TX_SUSPEND for an endpoint */
174 void
ipa_interrupt_suspend_disable(struct ipa_interrupt * interrupt,u32 endpoint_id)175 ipa_interrupt_suspend_disable(struct ipa_interrupt *interrupt, u32 endpoint_id)
176 {
177 ipa_interrupt_suspend_control(interrupt, endpoint_id, false);
178 }
179
180 /* Clear the suspend interrupt for all endpoints that signaled it */
ipa_interrupt_suspend_clear_all(struct ipa_interrupt * interrupt)181 void ipa_interrupt_suspend_clear_all(struct ipa_interrupt *interrupt)
182 {
183 struct ipa *ipa = interrupt->ipa;
184 const struct ipa_reg *reg;
185 u32 val;
186
187 reg = ipa_reg(ipa, IRQ_SUSPEND_INFO);
188 val = ioread32(ipa->reg_virt + ipa_reg_offset(reg));
189
190 /* SUSPEND interrupt status isn't cleared on IPA version 3.0 */
191 if (ipa->version == IPA_VERSION_3_0)
192 return;
193
194 reg = ipa_reg(ipa, IRQ_SUSPEND_CLR);
195 iowrite32(val, ipa->reg_virt + ipa_reg_offset(reg));
196 }
197
198 /* Simulate arrival of an IPA TX_SUSPEND interrupt */
ipa_interrupt_simulate_suspend(struct ipa_interrupt * interrupt)199 void ipa_interrupt_simulate_suspend(struct ipa_interrupt *interrupt)
200 {
201 ipa_interrupt_process(interrupt, IPA_IRQ_TX_SUSPEND);
202 }
203
204 /* Add a handler for an IPA interrupt */
ipa_interrupt_add(struct ipa_interrupt * interrupt,enum ipa_irq_id ipa_irq,ipa_irq_handler_t handler)205 void ipa_interrupt_add(struct ipa_interrupt *interrupt,
206 enum ipa_irq_id ipa_irq, ipa_irq_handler_t handler)
207 {
208 struct ipa *ipa = interrupt->ipa;
209 const struct ipa_reg *reg;
210
211 if (WARN_ON(ipa_irq >= IPA_IRQ_COUNT))
212 return;
213
214 interrupt->handler[ipa_irq] = handler;
215
216 /* Update the IPA interrupt mask to enable it */
217 interrupt->enabled |= BIT(ipa_irq);
218
219 reg = ipa_reg(ipa, IPA_IRQ_EN);
220 iowrite32(interrupt->enabled, ipa->reg_virt + ipa_reg_offset(reg));
221 }
222
223 /* Remove the handler for an IPA interrupt type */
224 void
ipa_interrupt_remove(struct ipa_interrupt * interrupt,enum ipa_irq_id ipa_irq)225 ipa_interrupt_remove(struct ipa_interrupt *interrupt, enum ipa_irq_id ipa_irq)
226 {
227 struct ipa *ipa = interrupt->ipa;
228 const struct ipa_reg *reg;
229
230 if (WARN_ON(ipa_irq >= IPA_IRQ_COUNT))
231 return;
232
233 /* Update the IPA interrupt mask to disable it */
234 interrupt->enabled &= ~BIT(ipa_irq);
235
236 reg = ipa_reg(ipa, IPA_IRQ_EN);
237 iowrite32(interrupt->enabled, ipa->reg_virt + ipa_reg_offset(reg));
238
239 interrupt->handler[ipa_irq] = NULL;
240 }
241
242 /* Configure the IPA interrupt framework */
ipa_interrupt_config(struct ipa * ipa)243 struct ipa_interrupt *ipa_interrupt_config(struct ipa *ipa)
244 {
245 struct device *dev = &ipa->pdev->dev;
246 struct ipa_interrupt *interrupt;
247 const struct ipa_reg *reg;
248 unsigned int irq;
249 int ret;
250
251 ret = platform_get_irq_byname(ipa->pdev, "ipa");
252 if (ret <= 0) {
253 dev_err(dev, "DT error %d getting \"ipa\" IRQ property\n",
254 ret);
255 return ERR_PTR(ret ? : -EINVAL);
256 }
257 irq = ret;
258
259 interrupt = kzalloc(sizeof(*interrupt), GFP_KERNEL);
260 if (!interrupt)
261 return ERR_PTR(-ENOMEM);
262 interrupt->ipa = ipa;
263 interrupt->irq = irq;
264
265 /* Start with all IPA interrupts disabled */
266 reg = ipa_reg(ipa, IPA_IRQ_EN);
267 iowrite32(0, ipa->reg_virt + ipa_reg_offset(reg));
268
269 ret = request_threaded_irq(irq, NULL, ipa_isr_thread, IRQF_ONESHOT,
270 "ipa", interrupt);
271 if (ret) {
272 dev_err(dev, "error %d requesting \"ipa\" IRQ\n", ret);
273 goto err_kfree;
274 }
275
276 ret = enable_irq_wake(irq);
277 if (ret) {
278 dev_err(dev, "error %d enabling wakeup for \"ipa\" IRQ\n", ret);
279 goto err_free_irq;
280 }
281
282 return interrupt;
283
284 err_free_irq:
285 free_irq(interrupt->irq, interrupt);
286 err_kfree:
287 kfree(interrupt);
288
289 return ERR_PTR(ret);
290 }
291
292 /* Inverse of ipa_interrupt_config() */
ipa_interrupt_deconfig(struct ipa_interrupt * interrupt)293 void ipa_interrupt_deconfig(struct ipa_interrupt *interrupt)
294 {
295 struct device *dev = &interrupt->ipa->pdev->dev;
296 int ret;
297
298 ret = disable_irq_wake(interrupt->irq);
299 if (ret)
300 dev_err(dev, "error %d disabling \"ipa\" IRQ wakeup\n", ret);
301 free_irq(interrupt->irq, interrupt);
302 kfree(interrupt);
303 }
304