1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Marvell RVU Admin Function driver 3 * 4 * Copyright (C) 2018 Marvell. 5 * 6 */ 7 8 #ifndef NPC_H 9 #define NPC_H 10 11 #define NPC_KEX_CHAN_MASK 0xFFFULL 12 13 #define SET_KEX_LD(intf, lid, ltype, ld, cfg) \ 14 rvu_write64(rvu, blkaddr, \ 15 NPC_AF_INTFX_LIDX_LTX_LDX_CFG(intf, lid, ltype, ld), cfg) 16 17 #define SET_KEX_LDFLAGS(intf, ld, flags, cfg) \ 18 rvu_write64(rvu, blkaddr, \ 19 NPC_AF_INTFX_LDATAX_FLAGSX_CFG(intf, ld, flags), cfg) 20 21 enum NPC_LID_E { 22 NPC_LID_LA = 0, 23 NPC_LID_LB, 24 NPC_LID_LC, 25 NPC_LID_LD, 26 NPC_LID_LE, 27 NPC_LID_LF, 28 NPC_LID_LG, 29 NPC_LID_LH, 30 }; 31 32 #define NPC_LT_NA 0 33 34 enum npc_kpu_la_ltype { 35 NPC_LT_LA_8023 = 1, 36 NPC_LT_LA_ETHER, 37 NPC_LT_LA_IH_NIX_ETHER, 38 NPC_LT_LA_HIGIG2_ETHER = 7, 39 NPC_LT_LA_IH_NIX_HIGIG2_ETHER, 40 NPC_LT_LA_CUSTOM_L2_90B_ETHER, 41 NPC_LT_LA_CPT_HDR, 42 NPC_LT_LA_CUSTOM_L2_24B_ETHER, 43 NPC_LT_LA_CUSTOM_PRE_L2_ETHER, 44 NPC_LT_LA_CUSTOM0 = 0xE, 45 NPC_LT_LA_CUSTOM1 = 0xF, 46 }; 47 48 enum npc_kpu_lb_ltype { 49 NPC_LT_LB_ETAG = 1, 50 NPC_LT_LB_CTAG, 51 NPC_LT_LB_STAG_QINQ, 52 NPC_LT_LB_BTAG, 53 NPC_LT_LB_PPPOE, 54 NPC_LT_LB_DSA, 55 NPC_LT_LB_DSA_VLAN, 56 NPC_LT_LB_EDSA, 57 NPC_LT_LB_EDSA_VLAN, 58 NPC_LT_LB_EXDSA, 59 NPC_LT_LB_EXDSA_VLAN, 60 NPC_LT_LB_FDSA, 61 NPC_LT_LB_VLAN_EXDSA, 62 NPC_LT_LB_CUSTOM0 = 0xE, 63 NPC_LT_LB_CUSTOM1 = 0xF, 64 }; 65 66 enum npc_kpu_lc_ltype { 67 NPC_LT_LC_IP = 1, 68 NPC_LT_LC_IP_OPT, 69 NPC_LT_LC_IP6, 70 NPC_LT_LC_IP6_EXT, 71 NPC_LT_LC_ARP, 72 NPC_LT_LC_RARP, 73 NPC_LT_LC_MPLS, 74 NPC_LT_LC_NSH, 75 NPC_LT_LC_PTP, 76 NPC_LT_LC_FCOE, 77 NPC_LT_LC_NGIO, 78 NPC_LT_LC_CUSTOM0 = 0xE, 79 NPC_LT_LC_CUSTOM1 = 0xF, 80 }; 81 82 /* Don't modify Ltypes upto SCTP, otherwise it will 83 * effect flow tag calculation and thus RSS. 84 */ 85 enum npc_kpu_ld_ltype { 86 NPC_LT_LD_TCP = 1, 87 NPC_LT_LD_UDP, 88 NPC_LT_LD_ICMP, 89 NPC_LT_LD_SCTP, 90 NPC_LT_LD_ICMP6, 91 NPC_LT_LD_CUSTOM0, 92 NPC_LT_LD_CUSTOM1, 93 NPC_LT_LD_IGMP = 8, 94 NPC_LT_LD_AH, 95 NPC_LT_LD_GRE, 96 NPC_LT_LD_NVGRE, 97 NPC_LT_LD_NSH, 98 NPC_LT_LD_TU_MPLS_IN_NSH, 99 NPC_LT_LD_TU_MPLS_IN_IP, 100 }; 101 102 enum npc_kpu_le_ltype { 103 NPC_LT_LE_VXLAN = 1, 104 NPC_LT_LE_GENEVE, 105 NPC_LT_LE_ESP, 106 NPC_LT_LE_GTPU = 4, 107 NPC_LT_LE_VXLANGPE, 108 NPC_LT_LE_GTPC, 109 NPC_LT_LE_NSH, 110 NPC_LT_LE_TU_MPLS_IN_GRE, 111 NPC_LT_LE_TU_NSH_IN_GRE, 112 NPC_LT_LE_TU_MPLS_IN_UDP, 113 NPC_LT_LE_CUSTOM0 = 0xE, 114 NPC_LT_LE_CUSTOM1 = 0xF, 115 }; 116 117 enum npc_kpu_lf_ltype { 118 NPC_LT_LF_TU_ETHER = 1, 119 NPC_LT_LF_TU_PPP, 120 NPC_LT_LF_TU_MPLS_IN_VXLANGPE, 121 NPC_LT_LF_TU_NSH_IN_VXLANGPE, 122 NPC_LT_LF_TU_MPLS_IN_NSH, 123 NPC_LT_LF_TU_3RD_NSH, 124 NPC_LT_LF_CUSTOM0 = 0xE, 125 NPC_LT_LF_CUSTOM1 = 0xF, 126 }; 127 128 enum npc_kpu_lg_ltype { 129 NPC_LT_LG_TU_IP = 1, 130 NPC_LT_LG_TU_IP6, 131 NPC_LT_LG_TU_ARP, 132 NPC_LT_LG_TU_ETHER_IN_NSH, 133 NPC_LT_LG_CUSTOM0 = 0xE, 134 NPC_LT_LG_CUSTOM1 = 0xF, 135 }; 136 137 /* Don't modify Ltypes upto SCTP, otherwise it will 138 * effect flow tag calculation and thus RSS. 139 */ 140 enum npc_kpu_lh_ltype { 141 NPC_LT_LH_TU_TCP = 1, 142 NPC_LT_LH_TU_UDP, 143 NPC_LT_LH_TU_ICMP, 144 NPC_LT_LH_TU_SCTP, 145 NPC_LT_LH_TU_ICMP6, 146 NPC_LT_LH_TU_IGMP = 8, 147 NPC_LT_LH_TU_ESP, 148 NPC_LT_LH_TU_AH, 149 NPC_LT_LH_CUSTOM0 = 0xE, 150 NPC_LT_LH_CUSTOM1 = 0xF, 151 }; 152 153 /* NPC port kind defines how the incoming or outgoing packets 154 * are processed. NPC accepts packets from up to 64 pkinds. 155 * Software assigns pkind for each incoming port such as CGX 156 * Ethernet interfaces, LBK interfaces, etc. 157 */ 158 #define NPC_UNRESERVED_PKIND_COUNT NPC_RX_CUSTOM_PRE_L2_PKIND 159 160 enum npc_pkind_type { 161 NPC_RX_LBK_PKIND = 0ULL, 162 NPC_RX_CUSTOM_PRE_L2_PKIND = 55ULL, 163 NPC_RX_VLAN_EXDSA_PKIND = 56ULL, 164 NPC_RX_CHLEN24B_PKIND = 57ULL, 165 NPC_RX_CPT_HDR_PKIND, 166 NPC_RX_CHLEN90B_PKIND, 167 NPC_TX_HIGIG_PKIND, 168 NPC_RX_HIGIG_PKIND, 169 NPC_RX_EDSA_PKIND, 170 NPC_TX_DEF_PKIND, /* NIX-TX PKIND */ 171 }; 172 173 enum npc_interface_type { 174 NPC_INTF_MODE_DEF, 175 }; 176 177 /* list of known and supported fields in packet header and 178 * fields present in key structure. 179 */ 180 enum key_fields { 181 NPC_DMAC, 182 NPC_SMAC, 183 NPC_ETYPE, 184 NPC_VLAN_ETYPE_CTAG, /* 0x8100 */ 185 NPC_VLAN_ETYPE_STAG, /* 0x88A8 */ 186 NPC_OUTER_VID, 187 NPC_TOS, 188 NPC_SIP_IPV4, 189 NPC_DIP_IPV4, 190 NPC_SIP_IPV6, 191 NPC_DIP_IPV6, 192 NPC_IPPROTO_TCP, 193 NPC_IPPROTO_UDP, 194 NPC_IPPROTO_SCTP, 195 NPC_IPPROTO_AH, 196 NPC_IPPROTO_ESP, 197 NPC_IPPROTO_ICMP, 198 NPC_IPPROTO_ICMP6, 199 NPC_SPORT_TCP, 200 NPC_DPORT_TCP, 201 NPC_SPORT_UDP, 202 NPC_DPORT_UDP, 203 NPC_SPORT_SCTP, 204 NPC_DPORT_SCTP, 205 NPC_HEADER_FIELDS_MAX, 206 NPC_CHAN = NPC_HEADER_FIELDS_MAX, /* Valid when Rx */ 207 NPC_PF_FUNC, /* Valid when Tx */ 208 NPC_ERRLEV, 209 NPC_ERRCODE, 210 NPC_LXMB, 211 NPC_EXACT_RESULT, 212 NPC_LA, 213 NPC_LB, 214 NPC_LC, 215 NPC_LD, 216 NPC_LE, 217 NPC_LF, 218 NPC_LG, 219 NPC_LH, 220 /* Ethertype for untagged frame */ 221 NPC_ETYPE_ETHER, 222 /* Ethertype for single tagged frame */ 223 NPC_ETYPE_TAG1, 224 /* Ethertype for double tagged frame */ 225 NPC_ETYPE_TAG2, 226 /* outer vlan tci for single tagged frame */ 227 NPC_VLAN_TAG1, 228 /* outer vlan tci for double tagged frame */ 229 NPC_VLAN_TAG2, 230 /* other header fields programmed to extract but not of our interest */ 231 NPC_UNKNOWN, 232 NPC_KEY_FIELDS_MAX, 233 }; 234 235 struct npc_kpu_profile_cam { 236 u8 state; 237 u8 state_mask; 238 u16 dp0; 239 u16 dp0_mask; 240 u16 dp1; 241 u16 dp1_mask; 242 u16 dp2; 243 u16 dp2_mask; 244 } __packed; 245 246 struct npc_kpu_profile_action { 247 u8 errlev; 248 u8 errcode; 249 u8 dp0_offset; 250 u8 dp1_offset; 251 u8 dp2_offset; 252 u8 bypass_count; 253 u8 parse_done; 254 u8 next_state; 255 u8 ptr_advance; 256 u8 cap_ena; 257 u8 lid; 258 u8 ltype; 259 u8 flags; 260 u8 offset; 261 u8 mask; 262 u8 right; 263 u8 shift; 264 } __packed; 265 266 struct npc_kpu_profile { 267 int cam_entries; 268 int action_entries; 269 struct npc_kpu_profile_cam *cam; 270 struct npc_kpu_profile_action *action; 271 }; 272 273 /* NPC KPU register formats */ 274 struct npc_kpu_cam { 275 #if defined(__BIG_ENDIAN_BITFIELD) 276 u64 rsvd_63_56 : 8; 277 u64 state : 8; 278 u64 dp2_data : 16; 279 u64 dp1_data : 16; 280 u64 dp0_data : 16; 281 #else 282 u64 dp0_data : 16; 283 u64 dp1_data : 16; 284 u64 dp2_data : 16; 285 u64 state : 8; 286 u64 rsvd_63_56 : 8; 287 #endif 288 }; 289 290 struct npc_kpu_action0 { 291 #if defined(__BIG_ENDIAN_BITFIELD) 292 u64 rsvd_63_57 : 7; 293 u64 byp_count : 3; 294 u64 capture_ena : 1; 295 u64 parse_done : 1; 296 u64 next_state : 8; 297 u64 rsvd_43 : 1; 298 u64 capture_lid : 3; 299 u64 capture_ltype : 4; 300 u64 capture_flags : 8; 301 u64 ptr_advance : 8; 302 u64 var_len_offset : 8; 303 u64 var_len_mask : 8; 304 u64 var_len_right : 1; 305 u64 var_len_shift : 3; 306 #else 307 u64 var_len_shift : 3; 308 u64 var_len_right : 1; 309 u64 var_len_mask : 8; 310 u64 var_len_offset : 8; 311 u64 ptr_advance : 8; 312 u64 capture_flags : 8; 313 u64 capture_ltype : 4; 314 u64 capture_lid : 3; 315 u64 rsvd_43 : 1; 316 u64 next_state : 8; 317 u64 parse_done : 1; 318 u64 capture_ena : 1; 319 u64 byp_count : 3; 320 u64 rsvd_63_57 : 7; 321 #endif 322 }; 323 324 struct npc_kpu_action1 { 325 #if defined(__BIG_ENDIAN_BITFIELD) 326 u64 rsvd_63_36 : 28; 327 u64 errlev : 4; 328 u64 errcode : 8; 329 u64 dp2_offset : 8; 330 u64 dp1_offset : 8; 331 u64 dp0_offset : 8; 332 #else 333 u64 dp0_offset : 8; 334 u64 dp1_offset : 8; 335 u64 dp2_offset : 8; 336 u64 errcode : 8; 337 u64 errlev : 4; 338 u64 rsvd_63_36 : 28; 339 #endif 340 }; 341 342 struct npc_kpu_pkind_cpi_def { 343 #if defined(__BIG_ENDIAN_BITFIELD) 344 u64 ena : 1; 345 u64 rsvd_62_59 : 4; 346 u64 lid : 3; 347 u64 ltype_match : 4; 348 u64 ltype_mask : 4; 349 u64 flags_match : 8; 350 u64 flags_mask : 8; 351 u64 add_offset : 8; 352 u64 add_mask : 8; 353 u64 rsvd_15 : 1; 354 u64 add_shift : 3; 355 u64 rsvd_11_10 : 2; 356 u64 cpi_base : 10; 357 #else 358 u64 cpi_base : 10; 359 u64 rsvd_11_10 : 2; 360 u64 add_shift : 3; 361 u64 rsvd_15 : 1; 362 u64 add_mask : 8; 363 u64 add_offset : 8; 364 u64 flags_mask : 8; 365 u64 flags_match : 8; 366 u64 ltype_mask : 4; 367 u64 ltype_match : 4; 368 u64 lid : 3; 369 u64 rsvd_62_59 : 4; 370 u64 ena : 1; 371 #endif 372 }; 373 374 struct nix_rx_action { 375 #if defined(__BIG_ENDIAN_BITFIELD) 376 u64 rsvd_63_61 :3; 377 u64 flow_key_alg :5; 378 u64 match_id :16; 379 u64 index :20; 380 u64 pf_func :16; 381 u64 op :4; 382 #else 383 u64 op :4; 384 u64 pf_func :16; 385 u64 index :20; 386 u64 match_id :16; 387 u64 flow_key_alg :5; 388 u64 rsvd_63_61 :3; 389 #endif 390 }; 391 392 /* NPC_AF_INTFX_KEX_CFG field masks */ 393 #define NPC_EXACT_NIBBLE_START 40 394 #define NPC_EXACT_NIBBLE_END 43 395 #define NPC_EXACT_NIBBLE GENMASK_ULL(43, 40) 396 397 /* NPC_EXACT_KEX_S nibble definitions for each field */ 398 #define NPC_EXACT_NIBBLE_HIT BIT_ULL(40) 399 #define NPC_EXACT_NIBBLE_OPC BIT_ULL(40) 400 #define NPC_EXACT_NIBBLE_WAY BIT_ULL(40) 401 #define NPC_EXACT_NIBBLE_INDEX GENMASK_ULL(43, 41) 402 403 #define NPC_EXACT_RESULT_HIT BIT_ULL(0) 404 #define NPC_EXACT_RESULT_OPC GENMASK_ULL(2, 1) 405 #define NPC_EXACT_RESULT_WAY GENMASK_ULL(4, 3) 406 #define NPC_EXACT_RESULT_IDX GENMASK_ULL(15, 5) 407 408 /* NPC_AF_INTFX_KEX_CFG field masks */ 409 #define NPC_PARSE_NIBBLE GENMASK_ULL(30, 0) 410 411 /* NPC_PARSE_KEX_S nibble definitions for each field */ 412 #define NPC_PARSE_NIBBLE_CHAN GENMASK_ULL(2, 0) 413 #define NPC_PARSE_NIBBLE_ERRLEV BIT_ULL(3) 414 #define NPC_PARSE_NIBBLE_ERRCODE GENMASK_ULL(5, 4) 415 #define NPC_PARSE_NIBBLE_L2L3_BCAST BIT_ULL(6) 416 #define NPC_PARSE_NIBBLE_LA_FLAGS GENMASK_ULL(8, 7) 417 #define NPC_PARSE_NIBBLE_LA_LTYPE BIT_ULL(9) 418 #define NPC_PARSE_NIBBLE_LB_FLAGS GENMASK_ULL(11, 10) 419 #define NPC_PARSE_NIBBLE_LB_LTYPE BIT_ULL(12) 420 #define NPC_PARSE_NIBBLE_LC_FLAGS GENMASK_ULL(14, 13) 421 #define NPC_PARSE_NIBBLE_LC_LTYPE BIT_ULL(15) 422 #define NPC_PARSE_NIBBLE_LD_FLAGS GENMASK_ULL(17, 16) 423 #define NPC_PARSE_NIBBLE_LD_LTYPE BIT_ULL(18) 424 #define NPC_PARSE_NIBBLE_LE_FLAGS GENMASK_ULL(20, 19) 425 #define NPC_PARSE_NIBBLE_LE_LTYPE BIT_ULL(21) 426 #define NPC_PARSE_NIBBLE_LF_FLAGS GENMASK_ULL(23, 22) 427 #define NPC_PARSE_NIBBLE_LF_LTYPE BIT_ULL(24) 428 #define NPC_PARSE_NIBBLE_LG_FLAGS GENMASK_ULL(26, 25) 429 #define NPC_PARSE_NIBBLE_LG_LTYPE BIT_ULL(27) 430 #define NPC_PARSE_NIBBLE_LH_FLAGS GENMASK_ULL(29, 28) 431 #define NPC_PARSE_NIBBLE_LH_LTYPE BIT_ULL(30) 432 433 struct nix_tx_action { 434 #if defined(__BIG_ENDIAN_BITFIELD) 435 u64 rsvd_63_48 :16; 436 u64 match_id :16; 437 u64 index :20; 438 u64 rsvd_11_8 :8; 439 u64 op :4; 440 #else 441 u64 op :4; 442 u64 rsvd_11_8 :8; 443 u64 index :20; 444 u64 match_id :16; 445 u64 rsvd_63_48 :16; 446 #endif 447 }; 448 449 /* NIX Receive Vtag Action Structure */ 450 #define RX_VTAG0_VALID_BIT BIT_ULL(15) 451 #define RX_VTAG0_TYPE_MASK GENMASK_ULL(14, 12) 452 #define RX_VTAG0_LID_MASK GENMASK_ULL(10, 8) 453 #define RX_VTAG0_RELPTR_MASK GENMASK_ULL(7, 0) 454 #define RX_VTAG1_VALID_BIT BIT_ULL(47) 455 #define RX_VTAG1_TYPE_MASK GENMASK_ULL(46, 44) 456 #define RX_VTAG1_LID_MASK GENMASK_ULL(42, 40) 457 #define RX_VTAG1_RELPTR_MASK GENMASK_ULL(39, 32) 458 459 /* NIX Transmit Vtag Action Structure */ 460 #define TX_VTAG0_DEF_MASK GENMASK_ULL(25, 16) 461 #define TX_VTAG0_OP_MASK GENMASK_ULL(13, 12) 462 #define TX_VTAG0_LID_MASK GENMASK_ULL(10, 8) 463 #define TX_VTAG0_RELPTR_MASK GENMASK_ULL(7, 0) 464 #define TX_VTAG1_DEF_MASK GENMASK_ULL(57, 48) 465 #define TX_VTAG1_OP_MASK GENMASK_ULL(45, 44) 466 #define TX_VTAG1_LID_MASK GENMASK_ULL(42, 40) 467 #define TX_VTAG1_RELPTR_MASK GENMASK_ULL(39, 32) 468 469 /* NPC MCAM reserved entry index per nixlf */ 470 #define NIXLF_UCAST_ENTRY 0 471 #define NIXLF_BCAST_ENTRY 1 472 #define NIXLF_ALLMULTI_ENTRY 2 473 #define NIXLF_PROMISC_ENTRY 3 474 475 struct npc_coalesced_kpu_prfl { 476 #define NPC_SIGN 0x00666f727063706e 477 #define NPC_PRFL_NAME "npc_prfls_array" 478 #define NPC_NAME_LEN 32 479 __le64 signature; /* "npcprof\0" (8 bytes/ASCII characters) */ 480 u8 name[NPC_NAME_LEN]; /* KPU Profile name */ 481 u64 version; /* KPU firmware/profile version */ 482 u8 num_prfl; /* No of NPC profiles. */ 483 u16 prfl_sz[]; 484 }; 485 486 struct npc_mcam_kex { 487 /* MKEX Profle Header */ 488 u64 mkex_sign; /* "mcam-kex-profile" (8 bytes/ASCII characters) */ 489 u8 name[MKEX_NAME_LEN]; /* MKEX Profile name */ 490 u64 cpu_model; /* Format as profiled by CPU hardware */ 491 u64 kpu_version; /* KPU firmware/profile version */ 492 u64 reserved; /* Reserved for extension */ 493 494 /* MKEX Profle Data */ 495 u64 keyx_cfg[NPC_MAX_INTF]; /* NPC_AF_INTF(0..1)_KEX_CFG */ 496 /* NPC_AF_KEX_LDATA(0..1)_FLAGS_CFG */ 497 u64 kex_ld_flags[NPC_MAX_LD]; 498 /* NPC_AF_INTF(0..1)_LID(0..7)_LT(0..15)_LD(0..1)_CFG */ 499 u64 intf_lid_lt_ld[NPC_MAX_INTF][NPC_MAX_LID][NPC_MAX_LT][NPC_MAX_LD]; 500 /* NPC_AF_INTF(0..1)_LDATA(0..1)_FLAGS(0..15)_CFG */ 501 u64 intf_ld_flags[NPC_MAX_INTF][NPC_MAX_LD][NPC_MAX_LFL]; 502 } __packed; 503 504 struct npc_kpu_fwdata { 505 int entries; 506 /* What follows is: 507 * struct npc_kpu_profile_cam[entries]; 508 * struct npc_kpu_profile_action[entries]; 509 */ 510 u8 data[]; 511 } __packed; 512 513 struct npc_lt_def { 514 u8 ltype_mask; 515 u8 ltype_match; 516 u8 lid; 517 }; 518 519 struct npc_lt_def_ipsec { 520 u8 ltype_mask; 521 u8 ltype_match; 522 u8 lid; 523 u8 spi_offset; 524 u8 spi_nz; 525 }; 526 527 struct npc_lt_def_apad { 528 u8 ltype_mask; 529 u8 ltype_match; 530 u8 lid; 531 u8 valid; 532 } __packed; 533 534 struct npc_lt_def_color { 535 u8 ltype_mask; 536 u8 ltype_match; 537 u8 lid; 538 u8 noffset; 539 u8 offset; 540 } __packed; 541 542 struct npc_lt_def_et { 543 u8 ltype_mask; 544 u8 ltype_match; 545 u8 lid; 546 u8 valid; 547 u8 offset; 548 } __packed; 549 550 struct npc_lt_def_cfg { 551 struct npc_lt_def rx_ol2; 552 struct npc_lt_def rx_oip4; 553 struct npc_lt_def rx_iip4; 554 struct npc_lt_def rx_oip6; 555 struct npc_lt_def rx_iip6; 556 struct npc_lt_def rx_otcp; 557 struct npc_lt_def rx_itcp; 558 struct npc_lt_def rx_oudp; 559 struct npc_lt_def rx_iudp; 560 struct npc_lt_def rx_osctp; 561 struct npc_lt_def rx_isctp; 562 struct npc_lt_def_ipsec rx_ipsec[2]; 563 struct npc_lt_def pck_ol2; 564 struct npc_lt_def pck_oip4; 565 struct npc_lt_def pck_oip6; 566 struct npc_lt_def pck_iip4; 567 struct npc_lt_def_apad rx_apad0; 568 struct npc_lt_def_apad rx_apad1; 569 struct npc_lt_def_color ovlan; 570 struct npc_lt_def_color ivlan; 571 struct npc_lt_def_color rx_gen0_color; 572 struct npc_lt_def_color rx_gen1_color; 573 struct npc_lt_def_et rx_et[2]; 574 } __packed; 575 576 /* Loadable KPU profile firmware data */ 577 struct npc_kpu_profile_fwdata { 578 #define KPU_SIGN 0x00666f727075706b 579 #define KPU_NAME_LEN 32 580 /** Maximum number of custom KPU entries supported by the built-in profile. */ 581 #define KPU_MAX_CST_ENT 6 582 /* KPU Profle Header */ 583 __le64 signature; /* "kpuprof\0" (8 bytes/ASCII characters) */ 584 u8 name[KPU_NAME_LEN]; /* KPU Profile name */ 585 __le64 version; /* KPU profile version */ 586 u8 kpus; 587 u8 reserved[7]; 588 589 /* Default MKEX profile to be used with this KPU profile. May be 590 * overridden with mkex_profile module parameter. Format is same as for 591 * the MKEX profile to streamline processing. 592 */ 593 struct npc_mcam_kex mkex; 594 /* LTYPE values for specific HW offloaded protocols. */ 595 struct npc_lt_def_cfg lt_def; 596 /* Dynamically sized data: 597 * Custom KPU CAM and ACTION configuration entries. 598 * struct npc_kpu_fwdata kpu[kpus]; 599 */ 600 u8 data[]; 601 } __packed; 602 603 struct rvu_npc_mcam_rule { 604 struct flow_msg packet; 605 struct flow_msg mask; 606 u8 intf; 607 union { 608 struct nix_tx_action tx_action; 609 struct nix_rx_action rx_action; 610 }; 611 u64 vtag_action; 612 struct list_head list; 613 u64 features; 614 u16 owner; 615 u16 entry; 616 u16 cntr; 617 bool has_cntr; 618 u8 default_rule; 619 bool enable; 620 bool vfvlan_cfg; 621 u16 chan; 622 u16 chan_mask; 623 }; 624 625 #endif /* NPC_H */ 626