1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 1995 Linus Torvalds
4 * Adapted from 'alpha' version by Gary Thomas
5 * Modified by Cort Dougan (cort@cs.nmt.edu)
6 * Modified for MBX using prep/chrp/pmac functions by Dan (dmalek@jlc.net)
7 * Further modified for generic 8xx by Dan.
8 */
9
10 /*
11 * bootup setup stuff..
12 */
13
14 #include <linux/kernel.h>
15 #include <linux/interrupt.h>
16 #include <linux/init.h>
17 #include <linux/time.h>
18 #include <linux/rtc.h>
19 #include <linux/fsl_devices.h>
20 #include <linux/of.h>
21 #include <linux/of_irq.h>
22
23 #include <asm/io.h>
24 #include <asm/8xx_immap.h>
25 #include <asm/fs_pd.h>
26 #include <mm/mmu_decl.h>
27
28 #include "pic.h"
29
30 #include "mpc8xx.h"
31
32 /* A place holder for time base interrupts, if they are ever enabled. */
timebase_interrupt(int irq,void * dev)33 static irqreturn_t timebase_interrupt(int irq, void *dev)
34 {
35 printk ("timebase_interrupt()\n");
36
37 return IRQ_HANDLED;
38 }
39
40 /* per-board overridable init_internal_rtc() function. */
41 void __init __attribute__ ((weak))
init_internal_rtc(void)42 init_internal_rtc(void)
43 {
44 sit8xx_t __iomem *sys_tmr = immr_map(im_sit);
45
46 /* Disable the RTC one second and alarm interrupts. */
47 clrbits16(&sys_tmr->sit_rtcsc, (RTCSC_SIE | RTCSC_ALE));
48
49 /* Enable the RTC */
50 setbits16(&sys_tmr->sit_rtcsc, (RTCSC_RTF | RTCSC_RTE));
51 immr_unmap(sys_tmr);
52 }
53
get_freq(char * name,unsigned long * val)54 static int __init get_freq(char *name, unsigned long *val)
55 {
56 struct device_node *cpu;
57 const unsigned int *fp;
58 int found = 0;
59
60 /* The cpu node should have timebase and clock frequency properties */
61 cpu = of_get_cpu_node(0, NULL);
62
63 if (cpu) {
64 fp = of_get_property(cpu, name, NULL);
65 if (fp) {
66 found = 1;
67 *val = *fp;
68 }
69
70 of_node_put(cpu);
71 }
72
73 return found;
74 }
75
76 /* The decrementer counts at the system (internal) clock frequency divided by
77 * sixteen, or external oscillator divided by four. We force the processor
78 * to use system clock divided by sixteen.
79 */
mpc8xx_calibrate_decr(void)80 void __init mpc8xx_calibrate_decr(void)
81 {
82 struct device_node *cpu;
83 cark8xx_t __iomem *clk_r1;
84 car8xx_t __iomem *clk_r2;
85 sitk8xx_t __iomem *sys_tmr1;
86 sit8xx_t __iomem *sys_tmr2;
87 int irq, virq;
88
89 clk_r1 = immr_map(im_clkrstk);
90
91 /* Unlock the SCCR. */
92 out_be32(&clk_r1->cark_sccrk, ~KAPWR_KEY);
93 out_be32(&clk_r1->cark_sccrk, KAPWR_KEY);
94 immr_unmap(clk_r1);
95
96 /* Force all 8xx processors to use divide by 16 processor clock. */
97 clk_r2 = immr_map(im_clkrst);
98 setbits32(&clk_r2->car_sccr, 0x02000000);
99 immr_unmap(clk_r2);
100
101 /* Processor frequency is MHz.
102 */
103 ppc_proc_freq = 50000000;
104 if (!get_freq("clock-frequency", &ppc_proc_freq))
105 printk(KERN_ERR "WARNING: Estimating processor frequency "
106 "(not found)\n");
107
108 ppc_tb_freq = ppc_proc_freq / 16;
109 printk("Decrementer Frequency = 0x%lx\n", ppc_tb_freq);
110
111 /* Perform some more timer/timebase initialization. This used
112 * to be done elsewhere, but other changes caused it to get
113 * called more than once....that is a bad thing.
114 *
115 * First, unlock all of the registers we are going to modify.
116 * To protect them from corruption during power down, registers
117 * that are maintained by keep alive power are "locked". To
118 * modify these registers we have to write the key value to
119 * the key location associated with the register.
120 * Some boards power up with these unlocked, while others
121 * are locked. Writing anything (including the unlock code?)
122 * to the unlocked registers will lock them again. So, here
123 * we guarantee the registers are locked, then we unlock them
124 * for our use.
125 */
126 sys_tmr1 = immr_map(im_sitk);
127 out_be32(&sys_tmr1->sitk_tbscrk, ~KAPWR_KEY);
128 out_be32(&sys_tmr1->sitk_rtcsck, ~KAPWR_KEY);
129 out_be32(&sys_tmr1->sitk_tbk, ~KAPWR_KEY);
130 out_be32(&sys_tmr1->sitk_tbscrk, KAPWR_KEY);
131 out_be32(&sys_tmr1->sitk_rtcsck, KAPWR_KEY);
132 out_be32(&sys_tmr1->sitk_tbk, KAPWR_KEY);
133 immr_unmap(sys_tmr1);
134
135 init_internal_rtc();
136
137 /* Enabling the decrementer also enables the timebase interrupts
138 * (or from the other point of view, to get decrementer interrupts
139 * we have to enable the timebase). The decrementer interrupt
140 * is wired into the vector table, nothing to do here for that.
141 */
142 cpu = of_get_cpu_node(0, NULL);
143 virq= irq_of_parse_and_map(cpu, 0);
144 of_node_put(cpu);
145 irq = virq_to_hw(virq);
146
147 sys_tmr2 = immr_map(im_sit);
148 out_be16(&sys_tmr2->sit_tbscr, ((1 << (7 - (irq/2))) << 8) |
149 (TBSCR_TBF | TBSCR_TBE));
150 immr_unmap(sys_tmr2);
151
152 if (request_irq(virq, timebase_interrupt, IRQF_NO_THREAD, "tbint",
153 NULL))
154 panic("Could not allocate timer IRQ!");
155 }
156
157 /* The RTC on the MPC8xx is an internal register.
158 * We want to protect this during power down, so we need to unlock,
159 * modify, and re-lock.
160 */
161
mpc8xx_set_rtc_time(struct rtc_time * tm)162 int mpc8xx_set_rtc_time(struct rtc_time *tm)
163 {
164 sitk8xx_t __iomem *sys_tmr1;
165 sit8xx_t __iomem *sys_tmr2;
166 time64_t time;
167
168 sys_tmr1 = immr_map(im_sitk);
169 sys_tmr2 = immr_map(im_sit);
170 time = rtc_tm_to_time64(tm);
171
172 out_be32(&sys_tmr1->sitk_rtck, KAPWR_KEY);
173 out_be32(&sys_tmr2->sit_rtc, (u32)time);
174 out_be32(&sys_tmr1->sitk_rtck, ~KAPWR_KEY);
175
176 immr_unmap(sys_tmr2);
177 immr_unmap(sys_tmr1);
178 return 0;
179 }
180
mpc8xx_get_rtc_time(struct rtc_time * tm)181 void mpc8xx_get_rtc_time(struct rtc_time *tm)
182 {
183 unsigned long data;
184 sit8xx_t __iomem *sys_tmr = immr_map(im_sit);
185
186 /* Get time from the RTC. */
187 data = in_be32(&sys_tmr->sit_rtc);
188 rtc_time64_to_tm(data, tm);
189 immr_unmap(sys_tmr);
190 return;
191 }
192
mpc8xx_restart(char * cmd)193 void __noreturn mpc8xx_restart(char *cmd)
194 {
195 car8xx_t __iomem *clk_r = immr_map(im_clkrst);
196
197
198 local_irq_disable();
199
200 setbits32(&clk_r->car_plprcr, 0x00000080);
201 /* Clear the ME bit in MSR to cause checkstop on machine check
202 */
203 mtmsr(mfmsr() & ~0x1000);
204
205 in_8(&clk_r->res[0]);
206 panic("Restart failed\n");
207 }
208