1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * MediaTek ALSA SoC Audio DAI PCM I/F Control
4 *
5 * Copyright (c) 2020 MediaTek Inc.
6 * Author: Bicycle Tsai <bicycle.tsai@mediatek.com>
7 * Trevor Wu <trevor.wu@mediatek.com>
8 */
9
10 #include <linux/regmap.h>
11 #include <sound/pcm_params.h>
12 #include "mt8195-afe-clk.h"
13 #include "mt8195-afe-common.h"
14 #include "mt8195-reg.h"
15
16 enum {
17 MTK_DAI_PCM_FMT_I2S,
18 MTK_DAI_PCM_FMT_EIAJ,
19 MTK_DAI_PCM_FMT_MODEA,
20 MTK_DAI_PCM_FMT_MODEB,
21 };
22
23 enum {
24 MTK_DAI_PCM_CLK_A1SYS,
25 MTK_DAI_PCM_CLK_A2SYS,
26 MTK_DAI_PCM_CLK_26M_48K,
27 MTK_DAI_PCM_CLK_26M_441K,
28 };
29
30 struct mtk_dai_pcm_rate {
31 unsigned int rate;
32 unsigned int reg_value;
33 };
34
35 struct mtk_dai_pcmif_priv {
36 unsigned int slave_mode;
37 unsigned int lrck_inv;
38 unsigned int bck_inv;
39 unsigned int format;
40 };
41
42 static const struct mtk_dai_pcm_rate mtk_dai_pcm_rates[] = {
43 { .rate = 8000, .reg_value = 0, },
44 { .rate = 16000, .reg_value = 1, },
45 { .rate = 32000, .reg_value = 2, },
46 { .rate = 48000, .reg_value = 3, },
47 { .rate = 11025, .reg_value = 1, },
48 { .rate = 22050, .reg_value = 2, },
49 { .rate = 44100, .reg_value = 3, },
50 };
51
mtk_dai_pcm_mode(unsigned int rate)52 static int mtk_dai_pcm_mode(unsigned int rate)
53 {
54 int i;
55
56 for (i = 0; i < ARRAY_SIZE(mtk_dai_pcm_rates); i++)
57 if (mtk_dai_pcm_rates[i].rate == rate)
58 return mtk_dai_pcm_rates[i].reg_value;
59
60 return -EINVAL;
61 }
62
63 static const struct snd_kcontrol_new mtk_dai_pcm_o000_mix[] = {
64 SOC_DAPM_SINGLE_AUTODISABLE("I000 Switch", AFE_CONN0, 0, 1, 0),
65 SOC_DAPM_SINGLE_AUTODISABLE("I070 Switch", AFE_CONN0_2, 6, 1, 0),
66 };
67
68 static const struct snd_kcontrol_new mtk_dai_pcm_o001_mix[] = {
69 SOC_DAPM_SINGLE_AUTODISABLE("I001 Switch", AFE_CONN1, 1, 1, 0),
70 SOC_DAPM_SINGLE_AUTODISABLE("I071 Switch", AFE_CONN1_2, 7, 1, 0),
71 };
72
73 static const struct snd_soc_dapm_widget mtk_dai_pcm_widgets[] = {
74 SND_SOC_DAPM_MIXER("I002", SND_SOC_NOPM, 0, 0, NULL, 0),
75 SND_SOC_DAPM_MIXER("I003", SND_SOC_NOPM, 0, 0, NULL, 0),
76 SND_SOC_DAPM_MIXER("O000", SND_SOC_NOPM, 0, 0,
77 mtk_dai_pcm_o000_mix,
78 ARRAY_SIZE(mtk_dai_pcm_o000_mix)),
79 SND_SOC_DAPM_MIXER("O001", SND_SOC_NOPM, 0, 0,
80 mtk_dai_pcm_o001_mix,
81 ARRAY_SIZE(mtk_dai_pcm_o001_mix)),
82
83 SND_SOC_DAPM_SUPPLY("PCM_EN", PCM_INTF_CON1,
84 PCM_INTF_CON1_PCM_EN_SHIFT, 0, NULL, 0),
85
86 SND_SOC_DAPM_INPUT("PCM1_INPUT"),
87 SND_SOC_DAPM_OUTPUT("PCM1_OUTPUT"),
88
89 SND_SOC_DAPM_CLOCK_SUPPLY("aud_asrc11"),
90 SND_SOC_DAPM_CLOCK_SUPPLY("aud_asrc12"),
91 SND_SOC_DAPM_CLOCK_SUPPLY("aud_pcmif"),
92 };
93
94 static const struct snd_soc_dapm_route mtk_dai_pcm_routes[] = {
95 {"I002", NULL, "PCM1 Capture"},
96 {"I003", NULL, "PCM1 Capture"},
97
98 {"O000", "I000 Switch", "I000"},
99 {"O001", "I001 Switch", "I001"},
100
101 {"O000", "I070 Switch", "I070"},
102 {"O001", "I071 Switch", "I071"},
103
104 {"PCM1 Playback", NULL, "O000"},
105 {"PCM1 Playback", NULL, "O001"},
106
107 {"PCM1 Playback", NULL, "PCM_EN"},
108 {"PCM1 Playback", NULL, "aud_asrc12"},
109 {"PCM1 Playback", NULL, "aud_pcmif"},
110
111 {"PCM1 Capture", NULL, "PCM_EN"},
112 {"PCM1 Capture", NULL, "aud_asrc11"},
113 {"PCM1 Capture", NULL, "aud_pcmif"},
114
115 {"PCM1_OUTPUT", NULL, "PCM1 Playback"},
116 {"PCM1 Capture", NULL, "PCM1_INPUT"},
117 };
118
mtk_dai_pcm_configure(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)119 static int mtk_dai_pcm_configure(struct snd_pcm_substream *substream,
120 struct snd_soc_dai *dai)
121 {
122 struct snd_pcm_runtime * const runtime = substream->runtime;
123 struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
124 struct mt8195_afe_private *afe_priv = afe->platform_priv;
125 struct mtk_dai_pcmif_priv *pcmif_priv = afe_priv->dai_priv[dai->id];
126 unsigned int slave_mode = pcmif_priv->slave_mode;
127 unsigned int lrck_inv = pcmif_priv->lrck_inv;
128 unsigned int bck_inv = pcmif_priv->bck_inv;
129 unsigned int fmt = pcmif_priv->format;
130 unsigned int bit_width = dai->sample_bits;
131 unsigned int val = 0;
132 unsigned int mask = 0;
133 int fs = 0;
134 int mode = 0;
135
136 /* sync freq mode */
137 fs = mt8195_afe_fs_timing(runtime->rate);
138 if (fs < 0)
139 return -EINVAL;
140 val |= PCM_INTF_CON2_SYNC_FREQ_MODE(fs);
141 mask |= PCM_INTF_CON2_SYNC_FREQ_MODE_MASK;
142
143 /* clk domain sel */
144 if (runtime->rate % 8000)
145 val |= PCM_INTF_CON2_CLK_DOMAIN_SEL(MTK_DAI_PCM_CLK_26M_441K);
146 else
147 val |= PCM_INTF_CON2_CLK_DOMAIN_SEL(MTK_DAI_PCM_CLK_26M_48K);
148 mask |= PCM_INTF_CON2_CLK_DOMAIN_SEL_MASK;
149
150 regmap_update_bits(afe->regmap, PCM_INTF_CON2, mask, val);
151
152 val = 0;
153 mask = 0;
154
155 /* pcm mode */
156 mode = mtk_dai_pcm_mode(runtime->rate);
157 if (mode < 0)
158 return -EINVAL;
159 val |= PCM_INTF_CON1_PCM_MODE(mode);
160 mask |= PCM_INTF_CON1_PCM_MODE_MASK;
161
162 /* pcm format */
163 val |= PCM_INTF_CON1_PCM_FMT(fmt);
164 mask |= PCM_INTF_CON1_PCM_FMT_MASK;
165
166 /* pcm sync length */
167 if (fmt == MTK_DAI_PCM_FMT_MODEA ||
168 fmt == MTK_DAI_PCM_FMT_MODEB)
169 val |= PCM_INTF_CON1_SYNC_LENGTH(1);
170 else
171 val |= PCM_INTF_CON1_SYNC_LENGTH(bit_width);
172 mask |= PCM_INTF_CON1_SYNC_LENGTH_MASK;
173
174 /* pcm bits, word length */
175 if (bit_width > 16) {
176 val |= PCM_INTF_CON1_PCM_24BIT;
177 val |= PCM_INTF_CON1_PCM_WLEN_64BCK;
178 } else {
179 val |= PCM_INTF_CON1_PCM_16BIT;
180 val |= PCM_INTF_CON1_PCM_WLEN_32BCK;
181 }
182 mask |= PCM_INTF_CON1_PCM_BIT_MASK;
183 mask |= PCM_INTF_CON1_PCM_WLEN_MASK;
184
185 /* master/slave */
186 if (!slave_mode) {
187 val |= PCM_INTF_CON1_PCM_MASTER;
188
189 if (lrck_inv)
190 val |= PCM_INTF_CON1_SYNC_OUT_INV;
191 if (bck_inv)
192 val |= PCM_INTF_CON1_BCLK_OUT_INV;
193 mask |= PCM_INTF_CON1_CLK_OUT_INV_MASK;
194 } else {
195 val |= PCM_INTF_CON1_PCM_SLAVE;
196
197 if (lrck_inv)
198 val |= PCM_INTF_CON1_SYNC_IN_INV;
199 if (bck_inv)
200 val |= PCM_INTF_CON1_BCLK_IN_INV;
201 mask |= PCM_INTF_CON1_CLK_IN_INV_MASK;
202
203 /* TODO: add asrc setting for slave mode */
204 }
205 mask |= PCM_INTF_CON1_PCM_M_S_MASK;
206
207 regmap_update_bits(afe->regmap, PCM_INTF_CON1, mask, val);
208
209 return 0;
210 }
211
212 /* dai ops */
mtk_dai_pcm_prepare(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)213 static int mtk_dai_pcm_prepare(struct snd_pcm_substream *substream,
214 struct snd_soc_dai *dai)
215 {
216 dev_dbg(dai->dev, "%s(), id %d, stream %d, widget active p %d, c %d\n",
217 __func__, dai->id, substream->stream,
218 dai->playback_widget->active, dai->capture_widget->active);
219
220 if (dai->playback_widget->active || dai->capture_widget->active)
221 return 0;
222
223 return mtk_dai_pcm_configure(substream, dai);
224 }
225
mtk_dai_pcm_set_fmt(struct snd_soc_dai * dai,unsigned int fmt)226 static int mtk_dai_pcm_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
227 {
228 struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
229 struct mt8195_afe_private *afe_priv = afe->platform_priv;
230 struct mtk_dai_pcmif_priv *pcmif_priv = afe_priv->dai_priv[dai->id];
231
232 dev_dbg(dai->dev, "%s fmt 0x%x\n", __func__, fmt);
233
234 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
235 case SND_SOC_DAIFMT_I2S:
236 pcmif_priv->format = MTK_DAI_PCM_FMT_I2S;
237 break;
238 case SND_SOC_DAIFMT_DSP_A:
239 pcmif_priv->format = MTK_DAI_PCM_FMT_MODEA;
240 break;
241 case SND_SOC_DAIFMT_DSP_B:
242 pcmif_priv->format = MTK_DAI_PCM_FMT_MODEB;
243 break;
244 default:
245 return -EINVAL;
246 }
247
248 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
249 case SND_SOC_DAIFMT_NB_NF:
250 pcmif_priv->bck_inv = 0;
251 pcmif_priv->lrck_inv = 0;
252 break;
253 case SND_SOC_DAIFMT_NB_IF:
254 pcmif_priv->bck_inv = 0;
255 pcmif_priv->lrck_inv = 1;
256 break;
257 case SND_SOC_DAIFMT_IB_NF:
258 pcmif_priv->bck_inv = 1;
259 pcmif_priv->lrck_inv = 0;
260 break;
261 case SND_SOC_DAIFMT_IB_IF:
262 pcmif_priv->bck_inv = 1;
263 pcmif_priv->lrck_inv = 1;
264 break;
265 default:
266 return -EINVAL;
267 }
268
269 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
270 case SND_SOC_DAIFMT_CBM_CFM:
271 pcmif_priv->slave_mode = 1;
272 break;
273 case SND_SOC_DAIFMT_CBS_CFS:
274 pcmif_priv->slave_mode = 0;
275 break;
276 default:
277 return -EINVAL;
278 }
279
280 return 0;
281 }
282
283 static const struct snd_soc_dai_ops mtk_dai_pcm_ops = {
284 .prepare = mtk_dai_pcm_prepare,
285 .set_fmt = mtk_dai_pcm_set_fmt,
286 };
287
288 /* dai driver */
289 #define MTK_PCM_RATES (SNDRV_PCM_RATE_8000_48000)
290
291 #define MTK_PCM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
292 SNDRV_PCM_FMTBIT_S24_LE |\
293 SNDRV_PCM_FMTBIT_S32_LE)
294
295 static struct snd_soc_dai_driver mtk_dai_pcm_driver[] = {
296 {
297 .name = "PCM1",
298 .id = MT8195_AFE_IO_PCM,
299 .playback = {
300 .stream_name = "PCM1 Playback",
301 .channels_min = 1,
302 .channels_max = 2,
303 .rates = MTK_PCM_RATES,
304 .formats = MTK_PCM_FORMATS,
305 },
306 .capture = {
307 .stream_name = "PCM1 Capture",
308 .channels_min = 1,
309 .channels_max = 2,
310 .rates = MTK_PCM_RATES,
311 .formats = MTK_PCM_FORMATS,
312 },
313 .ops = &mtk_dai_pcm_ops,
314 .symmetric_rate = 1,
315 .symmetric_sample_bits = 1,
316 },
317 };
318
init_pcmif_priv_data(struct mtk_base_afe * afe)319 static int init_pcmif_priv_data(struct mtk_base_afe *afe)
320 {
321 struct mt8195_afe_private *afe_priv = afe->platform_priv;
322 struct mtk_dai_pcmif_priv *pcmif_priv;
323
324 pcmif_priv = devm_kzalloc(afe->dev, sizeof(struct mtk_dai_pcmif_priv),
325 GFP_KERNEL);
326 if (!pcmif_priv)
327 return -ENOMEM;
328
329 afe_priv->dai_priv[MT8195_AFE_IO_PCM] = pcmif_priv;
330 return 0;
331 }
332
mt8195_dai_pcm_register(struct mtk_base_afe * afe)333 int mt8195_dai_pcm_register(struct mtk_base_afe *afe)
334 {
335 struct mtk_base_afe_dai *dai;
336
337 dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL);
338 if (!dai)
339 return -ENOMEM;
340
341 list_add(&dai->list, &afe->sub_dais);
342
343 dai->dai_drivers = mtk_dai_pcm_driver;
344 dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_pcm_driver);
345
346 dai->dapm_widgets = mtk_dai_pcm_widgets;
347 dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_pcm_widgets);
348 dai->dapm_routes = mtk_dai_pcm_routes;
349 dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_pcm_routes);
350
351 return init_pcmif_priv_data(afe);
352 }
353