1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (c) 2022, Linaro Ltd.
4  *
5  */
6 #ifndef _MHI_EP_H_
7 #define _MHI_EP_H_
8 
9 #include <linux/dma-direction.h>
10 #include <linux/mhi.h>
11 
12 #define MHI_EP_DEFAULT_MTU 0x8000
13 
14 /**
15  * struct mhi_ep_channel_config - Channel configuration structure for controller
16  * @name: The name of this channel
17  * @num: The number assigned to this channel
18  * @num_elements: The number of elements that can be queued to this channel
19  * @dir: Direction that data may flow on this channel
20  */
21 struct mhi_ep_channel_config {
22 	char *name;
23 	u32 num;
24 	u32 num_elements;
25 	enum dma_data_direction dir;
26 };
27 
28 /**
29  * struct mhi_ep_cntrl_config - MHI Endpoint controller configuration
30  * @mhi_version: MHI spec version supported by the controller
31  * @max_channels: Maximum number of channels supported
32  * @num_channels: Number of channels defined in @ch_cfg
33  * @ch_cfg: Array of defined channels
34  */
35 struct mhi_ep_cntrl_config {
36 	u32 mhi_version;
37 	u32 max_channels;
38 	u32 num_channels;
39 	const struct mhi_ep_channel_config *ch_cfg;
40 };
41 
42 /**
43  * struct mhi_ep_db_info - MHI Endpoint doorbell info
44  * @mask: Mask of the doorbell interrupt
45  * @status: Status of the doorbell interrupt
46  */
47 struct mhi_ep_db_info {
48 	u32 mask;
49 	u32 status;
50 };
51 
52 /**
53  * struct mhi_ep_cntrl - MHI Endpoint controller structure
54  * @cntrl_dev: Pointer to the struct device of physical bus acting as the MHI
55  *             Endpoint controller
56  * @mhi_dev: MHI Endpoint device instance for the controller
57  * @mmio: MMIO region containing the MHI registers
58  * @mhi_chan: Points to the channel configuration table
59  * @mhi_event: Points to the event ring configurations table
60  * @mhi_cmd: Points to the command ring configurations table
61  * @sm: MHI Endpoint state machine
62  * @ch_ctx_cache: Cache of host channel context data structure
63  * @ev_ctx_cache: Cache of host event context data structure
64  * @cmd_ctx_cache: Cache of host command context data structure
65  * @ch_ctx_host_pa: Physical address of host channel context data structure
66  * @ev_ctx_host_pa: Physical address of host event context data structure
67  * @cmd_ctx_host_pa: Physical address of host command context data structure
68  * @ch_ctx_cache_phys: Physical address of the host channel context cache
69  * @ev_ctx_cache_phys: Physical address of the host event context cache
70  * @cmd_ctx_cache_phys: Physical address of the host command context cache
71  * @chdb: Array of channel doorbell interrupt info
72  * @event_lock: Lock for protecting event rings
73  * @list_lock: Lock for protecting state transition and channel doorbell lists
74  * @state_lock: Lock for protecting state transitions
75  * @st_transition_list: List of state transitions
76  * @ch_db_list: List of queued channel doorbells
77  * @wq: Dedicated workqueue for handling rings and state changes
78  * @state_work: State transition worker
79  * @reset_work: Worker for MHI Endpoint reset
80  * @cmd_ring_work: Worker for processing command rings
81  * @ch_ring_work: Worker for processing channel rings
82  * @raise_irq: CB function for raising IRQ to the host
83  * @alloc_map: CB function for allocating memory in endpoint for storing host context and mapping it
84  * @unmap_free: CB function to unmap and free the allocated memory in endpoint for storing host context
85  * @read_from_host: CB function for reading from host memory from endpoint
86  * @write_to_host: CB function for writing to host memory from endpoint
87  * @mhi_state: MHI Endpoint state
88  * @max_chan: Maximum channels supported by the endpoint controller
89  * @mru: MRU (Maximum Receive Unit) value of the endpoint controller
90  * @event_rings: Number of event rings supported by the endpoint controller
91  * @hw_event_rings: Number of hardware event rings supported by the endpoint controller
92  * @chdb_offset: Channel doorbell offset set by the host
93  * @erdb_offset: Event ring doorbell offset set by the host
94  * @index: MHI Endpoint controller index
95  * @irq: IRQ used by the endpoint controller
96  * @enabled: Check if the endpoint controller is enabled or not
97  */
98 struct mhi_ep_cntrl {
99 	struct device *cntrl_dev;
100 	struct mhi_ep_device *mhi_dev;
101 	void __iomem *mmio;
102 
103 	struct mhi_ep_chan *mhi_chan;
104 	struct mhi_ep_event *mhi_event;
105 	struct mhi_ep_cmd *mhi_cmd;
106 	struct mhi_ep_sm *sm;
107 
108 	struct mhi_chan_ctxt *ch_ctx_cache;
109 	struct mhi_event_ctxt *ev_ctx_cache;
110 	struct mhi_cmd_ctxt *cmd_ctx_cache;
111 	u64 ch_ctx_host_pa;
112 	u64 ev_ctx_host_pa;
113 	u64 cmd_ctx_host_pa;
114 	phys_addr_t ch_ctx_cache_phys;
115 	phys_addr_t ev_ctx_cache_phys;
116 	phys_addr_t cmd_ctx_cache_phys;
117 
118 	struct mhi_ep_db_info chdb[4];
119 	struct mutex event_lock;
120 	spinlock_t list_lock;
121 	spinlock_t state_lock;
122 
123 	struct list_head st_transition_list;
124 	struct list_head ch_db_list;
125 
126 	struct workqueue_struct *wq;
127 	struct work_struct state_work;
128 	struct work_struct reset_work;
129 	struct work_struct cmd_ring_work;
130 	struct work_struct ch_ring_work;
131 
132 	void (*raise_irq)(struct mhi_ep_cntrl *mhi_cntrl, u32 vector);
133 	int (*alloc_map)(struct mhi_ep_cntrl *mhi_cntrl, u64 pci_addr, phys_addr_t *phys_ptr,
134 			 void __iomem **virt, size_t size);
135 	void (*unmap_free)(struct mhi_ep_cntrl *mhi_cntrl, u64 pci_addr, phys_addr_t phys,
136 			   void __iomem *virt, size_t size);
137 	int (*read_from_host)(struct mhi_ep_cntrl *mhi_cntrl, u64 from, void *to, size_t size);
138 	int (*write_to_host)(struct mhi_ep_cntrl *mhi_cntrl, void *from, u64 to, size_t size);
139 
140 	enum mhi_state mhi_state;
141 
142 	u32 max_chan;
143 	u32 mru;
144 	u32 event_rings;
145 	u32 hw_event_rings;
146 	u32 chdb_offset;
147 	u32 erdb_offset;
148 	u32 index;
149 	int irq;
150 	bool enabled;
151 };
152 
153 /**
154  * struct mhi_ep_device - Structure representing an MHI Endpoint device that binds
155  *                     to channels or is associated with controllers
156  * @dev: Driver model device node for the MHI Endpoint device
157  * @mhi_cntrl: Controller the device belongs to
158  * @id: Pointer to MHI Endpoint device ID struct
159  * @name: Name of the associated MHI Endpoint device
160  * @ul_chan: UL (from host to endpoint) channel for the device
161  * @dl_chan: DL (from endpoint to host) channel for the device
162  * @dev_type: MHI device type
163  */
164 struct mhi_ep_device {
165 	struct device dev;
166 	struct mhi_ep_cntrl *mhi_cntrl;
167 	const struct mhi_device_id *id;
168 	const char *name;
169 	struct mhi_ep_chan *ul_chan;
170 	struct mhi_ep_chan *dl_chan;
171 	enum mhi_device_type dev_type;
172 };
173 
174 /**
175  * struct mhi_ep_driver - Structure representing a MHI Endpoint client driver
176  * @id_table: Pointer to MHI Endpoint device ID table
177  * @driver: Device driver model driver
178  * @probe: CB function for client driver probe function
179  * @remove: CB function for client driver remove function
180  * @ul_xfer_cb: CB function for UL (from host to endpoint) data transfer
181  * @dl_xfer_cb: CB function for DL (from endpoint to host) data transfer
182  */
183 struct mhi_ep_driver {
184 	const struct mhi_device_id *id_table;
185 	struct device_driver driver;
186 	int (*probe)(struct mhi_ep_device *mhi_ep,
187 		     const struct mhi_device_id *id);
188 	void (*remove)(struct mhi_ep_device *mhi_ep);
189 	void (*ul_xfer_cb)(struct mhi_ep_device *mhi_dev,
190 			   struct mhi_result *result);
191 	void (*dl_xfer_cb)(struct mhi_ep_device *mhi_dev,
192 			   struct mhi_result *result);
193 };
194 
195 #define to_mhi_ep_device(dev) container_of(dev, struct mhi_ep_device, dev)
196 #define to_mhi_ep_driver(drv) container_of(drv, struct mhi_ep_driver, driver)
197 
198 /*
199  * module_mhi_ep_driver() - Helper macro for drivers that don't do
200  * anything special other than using default mhi_ep_driver_register() and
201  * mhi_ep_driver_unregister().  This eliminates a lot of boilerplate.
202  * Each module may only use this macro once.
203  */
204 #define module_mhi_ep_driver(mhi_drv) \
205 	module_driver(mhi_drv, mhi_ep_driver_register, \
206 		      mhi_ep_driver_unregister)
207 
208 /*
209  * Macro to avoid include chaining to get THIS_MODULE
210  */
211 #define mhi_ep_driver_register(mhi_drv) \
212 	__mhi_ep_driver_register(mhi_drv, THIS_MODULE)
213 
214 /**
215  * __mhi_ep_driver_register - Register a driver with MHI Endpoint bus
216  * @mhi_drv: Driver to be associated with the device
217  * @owner: The module owner
218  *
219  * Return: 0 if driver registrations succeeds, a negative error code otherwise.
220  */
221 int __mhi_ep_driver_register(struct mhi_ep_driver *mhi_drv, struct module *owner);
222 
223 /**
224  * mhi_ep_driver_unregister - Unregister a driver from MHI Endpoint bus
225  * @mhi_drv: Driver associated with the device
226  */
227 void mhi_ep_driver_unregister(struct mhi_ep_driver *mhi_drv);
228 
229 /**
230  * mhi_ep_register_controller - Register MHI Endpoint controller
231  * @mhi_cntrl: MHI Endpoint controller to register
232  * @config: Configuration to use for the controller
233  *
234  * Return: 0 if controller registrations succeeds, a negative error code otherwise.
235  */
236 int mhi_ep_register_controller(struct mhi_ep_cntrl *mhi_cntrl,
237 			       const struct mhi_ep_cntrl_config *config);
238 
239 /**
240  * mhi_ep_unregister_controller - Unregister MHI Endpoint controller
241  * @mhi_cntrl: MHI Endpoint controller to unregister
242  */
243 void mhi_ep_unregister_controller(struct mhi_ep_cntrl *mhi_cntrl);
244 
245 /**
246  * mhi_ep_power_up - Power up the MHI endpoint stack
247  * @mhi_cntrl: MHI Endpoint controller
248  *
249  * Return: 0 if power up succeeds, a negative error code otherwise.
250  */
251 int mhi_ep_power_up(struct mhi_ep_cntrl *mhi_cntrl);
252 
253 /**
254  * mhi_ep_power_down - Power down the MHI endpoint stack
255  * @mhi_cntrl: MHI controller
256  */
257 void mhi_ep_power_down(struct mhi_ep_cntrl *mhi_cntrl);
258 
259 /**
260  * mhi_ep_queue_is_empty - Determine whether the transfer queue is empty
261  * @mhi_dev: Device associated with the channels
262  * @dir: DMA direction for the channel
263  *
264  * Return: true if the queue is empty, false otherwise.
265  */
266 bool mhi_ep_queue_is_empty(struct mhi_ep_device *mhi_dev, enum dma_data_direction dir);
267 
268 /**
269  * mhi_ep_queue_skb - Send SKBs to host over MHI Endpoint
270  * @mhi_dev: Device associated with the DL channel
271  * @skb: SKBs to be queued
272  *
273  * Return: 0 if the SKBs has been sent successfully, a negative error code otherwise.
274  */
275 int mhi_ep_queue_skb(struct mhi_ep_device *mhi_dev, struct sk_buff *skb);
276 
277 #endif
278