1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * FPGA Manager Core
4  *
5  *  Copyright (C) 2013-2015 Altera Corporation
6  *  Copyright (C) 2017 Intel Corporation
7  *
8  * With code from the mailing list:
9  * Copyright (C) 2013 Xilinx, Inc.
10  */
11 #include <linux/firmware.h>
12 #include <linux/fpga/fpga-mgr.h>
13 #include <linux/idr.h>
14 #include <linux/module.h>
15 #include <linux/of.h>
16 #include <linux/mutex.h>
17 #include <linux/slab.h>
18 #include <linux/scatterlist.h>
19 #include <linux/highmem.h>
20 
21 static DEFINE_IDA(fpga_mgr_ida);
22 static struct class *fpga_mgr_class;
23 
24 struct fpga_mgr_devres {
25 	struct fpga_manager *mgr;
26 };
27 
fpga_mgr_fpga_remove(struct fpga_manager * mgr)28 static inline void fpga_mgr_fpga_remove(struct fpga_manager *mgr)
29 {
30 	if (mgr->mops->fpga_remove)
31 		mgr->mops->fpga_remove(mgr);
32 }
33 
fpga_mgr_state(struct fpga_manager * mgr)34 static inline enum fpga_mgr_states fpga_mgr_state(struct fpga_manager *mgr)
35 {
36 	if (mgr->mops->state)
37 		return  mgr->mops->state(mgr);
38 	return FPGA_MGR_STATE_UNKNOWN;
39 }
40 
fpga_mgr_status(struct fpga_manager * mgr)41 static inline u64 fpga_mgr_status(struct fpga_manager *mgr)
42 {
43 	if (mgr->mops->status)
44 		return mgr->mops->status(mgr);
45 	return 0;
46 }
47 
fpga_mgr_write(struct fpga_manager * mgr,const char * buf,size_t count)48 static inline int fpga_mgr_write(struct fpga_manager *mgr, const char *buf, size_t count)
49 {
50 	if (mgr->mops->write)
51 		return  mgr->mops->write(mgr, buf, count);
52 	return -EOPNOTSUPP;
53 }
54 
55 /*
56  * After all the FPGA image has been written, do the device specific steps to
57  * finish and set the FPGA into operating mode.
58  */
fpga_mgr_write_complete(struct fpga_manager * mgr,struct fpga_image_info * info)59 static inline int fpga_mgr_write_complete(struct fpga_manager *mgr,
60 					  struct fpga_image_info *info)
61 {
62 	int ret = 0;
63 
64 	mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE;
65 	if (mgr->mops->write_complete)
66 		ret = mgr->mops->write_complete(mgr, info);
67 	if (ret) {
68 		dev_err(&mgr->dev, "Error after writing image data to FPGA\n");
69 		mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
70 		return ret;
71 	}
72 	mgr->state = FPGA_MGR_STATE_OPERATING;
73 
74 	return 0;
75 }
76 
fpga_mgr_write_init(struct fpga_manager * mgr,struct fpga_image_info * info,const char * buf,size_t count)77 static inline int fpga_mgr_write_init(struct fpga_manager *mgr,
78 				      struct fpga_image_info *info,
79 				      const char *buf, size_t count)
80 {
81 	if (mgr->mops->write_init)
82 		return  mgr->mops->write_init(mgr, info, buf, count);
83 	return 0;
84 }
85 
fpga_mgr_write_sg(struct fpga_manager * mgr,struct sg_table * sgt)86 static inline int fpga_mgr_write_sg(struct fpga_manager *mgr,
87 				    struct sg_table *sgt)
88 {
89 	if (mgr->mops->write_sg)
90 		return  mgr->mops->write_sg(mgr, sgt);
91 	return -EOPNOTSUPP;
92 }
93 
94 /**
95  * fpga_image_info_alloc - Allocate an FPGA image info struct
96  * @dev: owning device
97  *
98  * Return: struct fpga_image_info or NULL
99  */
fpga_image_info_alloc(struct device * dev)100 struct fpga_image_info *fpga_image_info_alloc(struct device *dev)
101 {
102 	struct fpga_image_info *info;
103 
104 	get_device(dev);
105 
106 	info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
107 	if (!info) {
108 		put_device(dev);
109 		return NULL;
110 	}
111 
112 	info->dev = dev;
113 
114 	return info;
115 }
116 EXPORT_SYMBOL_GPL(fpga_image_info_alloc);
117 
118 /**
119  * fpga_image_info_free - Free an FPGA image info struct
120  * @info: FPGA image info struct to free
121  */
fpga_image_info_free(struct fpga_image_info * info)122 void fpga_image_info_free(struct fpga_image_info *info)
123 {
124 	struct device *dev;
125 
126 	if (!info)
127 		return;
128 
129 	dev = info->dev;
130 	if (info->firmware_name)
131 		devm_kfree(dev, info->firmware_name);
132 
133 	devm_kfree(dev, info);
134 	put_device(dev);
135 }
136 EXPORT_SYMBOL_GPL(fpga_image_info_free);
137 
138 /*
139  * Call the low level driver's write_init function.  This will do the
140  * device-specific things to get the FPGA into the state where it is ready to
141  * receive an FPGA image. The low level driver only gets to see the first
142  * initial_header_size bytes in the buffer.
143  */
fpga_mgr_write_init_buf(struct fpga_manager * mgr,struct fpga_image_info * info,const char * buf,size_t count)144 static int fpga_mgr_write_init_buf(struct fpga_manager *mgr,
145 				   struct fpga_image_info *info,
146 				   const char *buf, size_t count)
147 {
148 	int ret;
149 
150 	mgr->state = FPGA_MGR_STATE_WRITE_INIT;
151 	if (!mgr->mops->initial_header_size) {
152 		ret = fpga_mgr_write_init(mgr, info, NULL, 0);
153 	} else {
154 		count = min(mgr->mops->initial_header_size, count);
155 		ret = fpga_mgr_write_init(mgr, info, buf, count);
156 	}
157 
158 	if (ret) {
159 		dev_err(&mgr->dev, "Error preparing FPGA for writing\n");
160 		mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR;
161 		return ret;
162 	}
163 
164 	return 0;
165 }
166 
fpga_mgr_write_init_sg(struct fpga_manager * mgr,struct fpga_image_info * info,struct sg_table * sgt)167 static int fpga_mgr_write_init_sg(struct fpga_manager *mgr,
168 				  struct fpga_image_info *info,
169 				  struct sg_table *sgt)
170 {
171 	struct sg_mapping_iter miter;
172 	size_t len;
173 	char *buf;
174 	int ret;
175 
176 	if (!mgr->mops->initial_header_size)
177 		return fpga_mgr_write_init_buf(mgr, info, NULL, 0);
178 
179 	/*
180 	 * First try to use miter to map the first fragment to access the
181 	 * header, this is the typical path.
182 	 */
183 	sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG);
184 	if (sg_miter_next(&miter) &&
185 	    miter.length >= mgr->mops->initial_header_size) {
186 		ret = fpga_mgr_write_init_buf(mgr, info, miter.addr,
187 					      miter.length);
188 		sg_miter_stop(&miter);
189 		return ret;
190 	}
191 	sg_miter_stop(&miter);
192 
193 	/* Otherwise copy the fragments into temporary memory. */
194 	buf = kmalloc(mgr->mops->initial_header_size, GFP_KERNEL);
195 	if (!buf)
196 		return -ENOMEM;
197 
198 	len = sg_copy_to_buffer(sgt->sgl, sgt->nents, buf,
199 				mgr->mops->initial_header_size);
200 	ret = fpga_mgr_write_init_buf(mgr, info, buf, len);
201 
202 	kfree(buf);
203 
204 	return ret;
205 }
206 
207 /**
208  * fpga_mgr_buf_load_sg - load fpga from image in buffer from a scatter list
209  * @mgr:	fpga manager
210  * @info:	fpga image specific information
211  * @sgt:	scatterlist table
212  *
213  * Step the low level fpga manager through the device-specific steps of getting
214  * an FPGA ready to be configured, writing the image to it, then doing whatever
215  * post-configuration steps necessary.  This code assumes the caller got the
216  * mgr pointer from of_fpga_mgr_get() or fpga_mgr_get() and checked that it is
217  * not an error code.
218  *
219  * This is the preferred entry point for FPGA programming, it does not require
220  * any contiguous kernel memory.
221  *
222  * Return: 0 on success, negative error code otherwise.
223  */
fpga_mgr_buf_load_sg(struct fpga_manager * mgr,struct fpga_image_info * info,struct sg_table * sgt)224 static int fpga_mgr_buf_load_sg(struct fpga_manager *mgr,
225 				struct fpga_image_info *info,
226 				struct sg_table *sgt)
227 {
228 	int ret;
229 
230 	ret = fpga_mgr_write_init_sg(mgr, info, sgt);
231 	if (ret)
232 		return ret;
233 
234 	/* Write the FPGA image to the FPGA. */
235 	mgr->state = FPGA_MGR_STATE_WRITE;
236 	if (mgr->mops->write_sg) {
237 		ret = fpga_mgr_write_sg(mgr, sgt);
238 	} else {
239 		struct sg_mapping_iter miter;
240 
241 		sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG);
242 		while (sg_miter_next(&miter)) {
243 			ret = fpga_mgr_write(mgr, miter.addr, miter.length);
244 			if (ret)
245 				break;
246 		}
247 		sg_miter_stop(&miter);
248 	}
249 
250 	if (ret) {
251 		dev_err(&mgr->dev, "Error while writing image data to FPGA\n");
252 		mgr->state = FPGA_MGR_STATE_WRITE_ERR;
253 		return ret;
254 	}
255 
256 	return fpga_mgr_write_complete(mgr, info);
257 }
258 
fpga_mgr_buf_load_mapped(struct fpga_manager * mgr,struct fpga_image_info * info,const char * buf,size_t count)259 static int fpga_mgr_buf_load_mapped(struct fpga_manager *mgr,
260 				    struct fpga_image_info *info,
261 				    const char *buf, size_t count)
262 {
263 	int ret;
264 
265 	ret = fpga_mgr_write_init_buf(mgr, info, buf, count);
266 	if (ret)
267 		return ret;
268 
269 	/*
270 	 * Write the FPGA image to the FPGA.
271 	 */
272 	mgr->state = FPGA_MGR_STATE_WRITE;
273 	ret = fpga_mgr_write(mgr, buf, count);
274 	if (ret) {
275 		dev_err(&mgr->dev, "Error while writing image data to FPGA\n");
276 		mgr->state = FPGA_MGR_STATE_WRITE_ERR;
277 		return ret;
278 	}
279 
280 	return fpga_mgr_write_complete(mgr, info);
281 }
282 
283 /**
284  * fpga_mgr_buf_load - load fpga from image in buffer
285  * @mgr:	fpga manager
286  * @info:	fpga image info
287  * @buf:	buffer contain fpga image
288  * @count:	byte count of buf
289  *
290  * Step the low level fpga manager through the device-specific steps of getting
291  * an FPGA ready to be configured, writing the image to it, then doing whatever
292  * post-configuration steps necessary.  This code assumes the caller got the
293  * mgr pointer from of_fpga_mgr_get() and checked that it is not an error code.
294  *
295  * Return: 0 on success, negative error code otherwise.
296  */
fpga_mgr_buf_load(struct fpga_manager * mgr,struct fpga_image_info * info,const char * buf,size_t count)297 static int fpga_mgr_buf_load(struct fpga_manager *mgr,
298 			     struct fpga_image_info *info,
299 			     const char *buf, size_t count)
300 {
301 	struct page **pages;
302 	struct sg_table sgt;
303 	const void *p;
304 	int nr_pages;
305 	int index;
306 	int rc;
307 
308 	/*
309 	 * This is just a fast path if the caller has already created a
310 	 * contiguous kernel buffer and the driver doesn't require SG, non-SG
311 	 * drivers will still work on the slow path.
312 	 */
313 	if (mgr->mops->write)
314 		return fpga_mgr_buf_load_mapped(mgr, info, buf, count);
315 
316 	/*
317 	 * Convert the linear kernel pointer into a sg_table of pages for use
318 	 * by the driver.
319 	 */
320 	nr_pages = DIV_ROUND_UP((unsigned long)buf + count, PAGE_SIZE) -
321 		   (unsigned long)buf / PAGE_SIZE;
322 	pages = kmalloc_array(nr_pages, sizeof(struct page *), GFP_KERNEL);
323 	if (!pages)
324 		return -ENOMEM;
325 
326 	p = buf - offset_in_page(buf);
327 	for (index = 0; index < nr_pages; index++) {
328 		if (is_vmalloc_addr(p))
329 			pages[index] = vmalloc_to_page(p);
330 		else
331 			pages[index] = kmap_to_page((void *)p);
332 		if (!pages[index]) {
333 			kfree(pages);
334 			return -EFAULT;
335 		}
336 		p += PAGE_SIZE;
337 	}
338 
339 	/*
340 	 * The temporary pages list is used to code share the merging algorithm
341 	 * in sg_alloc_table_from_pages
342 	 */
343 	rc = sg_alloc_table_from_pages(&sgt, pages, index, offset_in_page(buf),
344 				       count, GFP_KERNEL);
345 	kfree(pages);
346 	if (rc)
347 		return rc;
348 
349 	rc = fpga_mgr_buf_load_sg(mgr, info, &sgt);
350 	sg_free_table(&sgt);
351 
352 	return rc;
353 }
354 
355 /**
356  * fpga_mgr_firmware_load - request firmware and load to fpga
357  * @mgr:	fpga manager
358  * @info:	fpga image specific information
359  * @image_name:	name of image file on the firmware search path
360  *
361  * Request an FPGA image using the firmware class, then write out to the FPGA.
362  * Update the state before each step to provide info on what step failed if
363  * there is a failure.  This code assumes the caller got the mgr pointer
364  * from of_fpga_mgr_get() or fpga_mgr_get() and checked that it is not an error
365  * code.
366  *
367  * Return: 0 on success, negative error code otherwise.
368  */
fpga_mgr_firmware_load(struct fpga_manager * mgr,struct fpga_image_info * info,const char * image_name)369 static int fpga_mgr_firmware_load(struct fpga_manager *mgr,
370 				  struct fpga_image_info *info,
371 				  const char *image_name)
372 {
373 	struct device *dev = &mgr->dev;
374 	const struct firmware *fw;
375 	int ret;
376 
377 	dev_info(dev, "writing %s to %s\n", image_name, mgr->name);
378 
379 	mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ;
380 
381 	ret = request_firmware(&fw, image_name, dev);
382 	if (ret) {
383 		mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ_ERR;
384 		dev_err(dev, "Error requesting firmware %s\n", image_name);
385 		return ret;
386 	}
387 
388 	ret = fpga_mgr_buf_load(mgr, info, fw->data, fw->size);
389 
390 	release_firmware(fw);
391 
392 	return ret;
393 }
394 
395 /**
396  * fpga_mgr_load - load FPGA from scatter/gather table, buffer, or firmware
397  * @mgr:	fpga manager
398  * @info:	fpga image information.
399  *
400  * Load the FPGA from an image which is indicated in @info.  If successful, the
401  * FPGA ends up in operating mode.
402  *
403  * Return: 0 on success, negative error code otherwise.
404  */
fpga_mgr_load(struct fpga_manager * mgr,struct fpga_image_info * info)405 int fpga_mgr_load(struct fpga_manager *mgr, struct fpga_image_info *info)
406 {
407 	if (info->sgt)
408 		return fpga_mgr_buf_load_sg(mgr, info, info->sgt);
409 	if (info->buf && info->count)
410 		return fpga_mgr_buf_load(mgr, info, info->buf, info->count);
411 	if (info->firmware_name)
412 		return fpga_mgr_firmware_load(mgr, info, info->firmware_name);
413 	return -EINVAL;
414 }
415 EXPORT_SYMBOL_GPL(fpga_mgr_load);
416 
417 static const char * const state_str[] = {
418 	[FPGA_MGR_STATE_UNKNOWN] =		"unknown",
419 	[FPGA_MGR_STATE_POWER_OFF] =		"power off",
420 	[FPGA_MGR_STATE_POWER_UP] =		"power up",
421 	[FPGA_MGR_STATE_RESET] =		"reset",
422 
423 	/* requesting FPGA image from firmware */
424 	[FPGA_MGR_STATE_FIRMWARE_REQ] =		"firmware request",
425 	[FPGA_MGR_STATE_FIRMWARE_REQ_ERR] =	"firmware request error",
426 
427 	/* Preparing FPGA to receive image */
428 	[FPGA_MGR_STATE_WRITE_INIT] =		"write init",
429 	[FPGA_MGR_STATE_WRITE_INIT_ERR] =	"write init error",
430 
431 	/* Writing image to FPGA */
432 	[FPGA_MGR_STATE_WRITE] =		"write",
433 	[FPGA_MGR_STATE_WRITE_ERR] =		"write error",
434 
435 	/* Finishing configuration after image has been written */
436 	[FPGA_MGR_STATE_WRITE_COMPLETE] =	"write complete",
437 	[FPGA_MGR_STATE_WRITE_COMPLETE_ERR] =	"write complete error",
438 
439 	/* FPGA reports to be in normal operating mode */
440 	[FPGA_MGR_STATE_OPERATING] =		"operating",
441 };
442 
name_show(struct device * dev,struct device_attribute * attr,char * buf)443 static ssize_t name_show(struct device *dev,
444 			 struct device_attribute *attr, char *buf)
445 {
446 	struct fpga_manager *mgr = to_fpga_manager(dev);
447 
448 	return sprintf(buf, "%s\n", mgr->name);
449 }
450 
state_show(struct device * dev,struct device_attribute * attr,char * buf)451 static ssize_t state_show(struct device *dev,
452 			  struct device_attribute *attr, char *buf)
453 {
454 	struct fpga_manager *mgr = to_fpga_manager(dev);
455 
456 	return sprintf(buf, "%s\n", state_str[mgr->state]);
457 }
458 
status_show(struct device * dev,struct device_attribute * attr,char * buf)459 static ssize_t status_show(struct device *dev,
460 			   struct device_attribute *attr, char *buf)
461 {
462 	struct fpga_manager *mgr = to_fpga_manager(dev);
463 	u64 status;
464 	int len = 0;
465 
466 	status = fpga_mgr_status(mgr);
467 
468 	if (status & FPGA_MGR_STATUS_OPERATION_ERR)
469 		len += sprintf(buf + len, "reconfig operation error\n");
470 	if (status & FPGA_MGR_STATUS_CRC_ERR)
471 		len += sprintf(buf + len, "reconfig CRC error\n");
472 	if (status & FPGA_MGR_STATUS_INCOMPATIBLE_IMAGE_ERR)
473 		len += sprintf(buf + len, "reconfig incompatible image\n");
474 	if (status & FPGA_MGR_STATUS_IP_PROTOCOL_ERR)
475 		len += sprintf(buf + len, "reconfig IP protocol error\n");
476 	if (status & FPGA_MGR_STATUS_FIFO_OVERFLOW_ERR)
477 		len += sprintf(buf + len, "reconfig fifo overflow error\n");
478 
479 	return len;
480 }
481 
482 static DEVICE_ATTR_RO(name);
483 static DEVICE_ATTR_RO(state);
484 static DEVICE_ATTR_RO(status);
485 
486 static struct attribute *fpga_mgr_attrs[] = {
487 	&dev_attr_name.attr,
488 	&dev_attr_state.attr,
489 	&dev_attr_status.attr,
490 	NULL,
491 };
492 ATTRIBUTE_GROUPS(fpga_mgr);
493 
__fpga_mgr_get(struct device * dev)494 static struct fpga_manager *__fpga_mgr_get(struct device *dev)
495 {
496 	struct fpga_manager *mgr;
497 
498 	mgr = to_fpga_manager(dev);
499 
500 	if (!try_module_get(dev->parent->driver->owner))
501 		goto err_dev;
502 
503 	return mgr;
504 
505 err_dev:
506 	put_device(dev);
507 	return ERR_PTR(-ENODEV);
508 }
509 
fpga_mgr_dev_match(struct device * dev,const void * data)510 static int fpga_mgr_dev_match(struct device *dev, const void *data)
511 {
512 	return dev->parent == data;
513 }
514 
515 /**
516  * fpga_mgr_get - Given a device, get a reference to an fpga mgr.
517  * @dev:	parent device that fpga mgr was registered with
518  *
519  * Return: fpga manager struct or IS_ERR() condition containing error code.
520  */
fpga_mgr_get(struct device * dev)521 struct fpga_manager *fpga_mgr_get(struct device *dev)
522 {
523 	struct device *mgr_dev = class_find_device(fpga_mgr_class, NULL, dev,
524 						   fpga_mgr_dev_match);
525 	if (!mgr_dev)
526 		return ERR_PTR(-ENODEV);
527 
528 	return __fpga_mgr_get(mgr_dev);
529 }
530 EXPORT_SYMBOL_GPL(fpga_mgr_get);
531 
532 /**
533  * of_fpga_mgr_get - Given a device node, get a reference to an fpga mgr.
534  *
535  * @node:	device node
536  *
537  * Return: fpga manager struct or IS_ERR() condition containing error code.
538  */
of_fpga_mgr_get(struct device_node * node)539 struct fpga_manager *of_fpga_mgr_get(struct device_node *node)
540 {
541 	struct device *dev;
542 
543 	dev = class_find_device_by_of_node(fpga_mgr_class, node);
544 	if (!dev)
545 		return ERR_PTR(-ENODEV);
546 
547 	return __fpga_mgr_get(dev);
548 }
549 EXPORT_SYMBOL_GPL(of_fpga_mgr_get);
550 
551 /**
552  * fpga_mgr_put - release a reference to an fpga manager
553  * @mgr:	fpga manager structure
554  */
fpga_mgr_put(struct fpga_manager * mgr)555 void fpga_mgr_put(struct fpga_manager *mgr)
556 {
557 	module_put(mgr->dev.parent->driver->owner);
558 	put_device(&mgr->dev);
559 }
560 EXPORT_SYMBOL_GPL(fpga_mgr_put);
561 
562 /**
563  * fpga_mgr_lock - Lock FPGA manager for exclusive use
564  * @mgr:	fpga manager
565  *
566  * Given a pointer to FPGA Manager (from fpga_mgr_get() or
567  * of_fpga_mgr_put()) attempt to get the mutex. The user should call
568  * fpga_mgr_lock() and verify that it returns 0 before attempting to
569  * program the FPGA.  Likewise, the user should call fpga_mgr_unlock
570  * when done programming the FPGA.
571  *
572  * Return: 0 for success or -EBUSY
573  */
fpga_mgr_lock(struct fpga_manager * mgr)574 int fpga_mgr_lock(struct fpga_manager *mgr)
575 {
576 	if (!mutex_trylock(&mgr->ref_mutex)) {
577 		dev_err(&mgr->dev, "FPGA manager is in use.\n");
578 		return -EBUSY;
579 	}
580 
581 	return 0;
582 }
583 EXPORT_SYMBOL_GPL(fpga_mgr_lock);
584 
585 /**
586  * fpga_mgr_unlock - Unlock FPGA manager after done programming
587  * @mgr:	fpga manager
588  */
fpga_mgr_unlock(struct fpga_manager * mgr)589 void fpga_mgr_unlock(struct fpga_manager *mgr)
590 {
591 	mutex_unlock(&mgr->ref_mutex);
592 }
593 EXPORT_SYMBOL_GPL(fpga_mgr_unlock);
594 
595 /**
596  * fpga_mgr_register_full - create and register an FPGA Manager device
597  * @parent:	fpga manager device from pdev
598  * @info:	parameters for fpga manager
599  *
600  * The caller of this function is responsible for calling fpga_mgr_unregister().
601  * Using devm_fpga_mgr_register_full() instead is recommended.
602  *
603  * Return: pointer to struct fpga_manager pointer or ERR_PTR()
604  */
605 struct fpga_manager *
fpga_mgr_register_full(struct device * parent,const struct fpga_manager_info * info)606 fpga_mgr_register_full(struct device *parent, const struct fpga_manager_info *info)
607 {
608 	const struct fpga_manager_ops *mops = info->mops;
609 	struct fpga_manager *mgr;
610 	int id, ret;
611 
612 	if (!mops) {
613 		dev_err(parent, "Attempt to register without fpga_manager_ops\n");
614 		return ERR_PTR(-EINVAL);
615 	}
616 
617 	if (!info->name || !strlen(info->name)) {
618 		dev_err(parent, "Attempt to register with no name!\n");
619 		return ERR_PTR(-EINVAL);
620 	}
621 
622 	mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
623 	if (!mgr)
624 		return ERR_PTR(-ENOMEM);
625 
626 	id = ida_simple_get(&fpga_mgr_ida, 0, 0, GFP_KERNEL);
627 	if (id < 0) {
628 		ret = id;
629 		goto error_kfree;
630 	}
631 
632 	mutex_init(&mgr->ref_mutex);
633 
634 	mgr->name = info->name;
635 	mgr->mops = info->mops;
636 	mgr->priv = info->priv;
637 	mgr->compat_id = info->compat_id;
638 
639 	mgr->dev.class = fpga_mgr_class;
640 	mgr->dev.groups = mops->groups;
641 	mgr->dev.parent = parent;
642 	mgr->dev.of_node = parent->of_node;
643 	mgr->dev.id = id;
644 
645 	ret = dev_set_name(&mgr->dev, "fpga%d", id);
646 	if (ret)
647 		goto error_device;
648 
649 	/*
650 	 * Initialize framework state by requesting low level driver read state
651 	 * from device.  FPGA may be in reset mode or may have been programmed
652 	 * by bootloader or EEPROM.
653 	 */
654 	mgr->state = fpga_mgr_state(mgr);
655 
656 	ret = device_register(&mgr->dev);
657 	if (ret) {
658 		put_device(&mgr->dev);
659 		return ERR_PTR(ret);
660 	}
661 
662 	return mgr;
663 
664 error_device:
665 	ida_simple_remove(&fpga_mgr_ida, id);
666 error_kfree:
667 	kfree(mgr);
668 
669 	return ERR_PTR(ret);
670 }
671 EXPORT_SYMBOL_GPL(fpga_mgr_register_full);
672 
673 /**
674  * fpga_mgr_register - create and register an FPGA Manager device
675  * @parent:	fpga manager device from pdev
676  * @name:	fpga manager name
677  * @mops:	pointer to structure of fpga manager ops
678  * @priv:	fpga manager private data
679  *
680  * The caller of this function is responsible for calling fpga_mgr_unregister().
681  * Using devm_fpga_mgr_register() instead is recommended. This simple
682  * version of the register function should be sufficient for most users. The
683  * fpga_mgr_register_full() function is available for users that need to pass
684  * additional, optional parameters.
685  *
686  * Return: pointer to struct fpga_manager pointer or ERR_PTR()
687  */
688 struct fpga_manager *
fpga_mgr_register(struct device * parent,const char * name,const struct fpga_manager_ops * mops,void * priv)689 fpga_mgr_register(struct device *parent, const char *name,
690 		  const struct fpga_manager_ops *mops, void *priv)
691 {
692 	struct fpga_manager_info info = { 0 };
693 
694 	info.name = name;
695 	info.mops = mops;
696 	info.priv = priv;
697 
698 	return fpga_mgr_register_full(parent, &info);
699 }
700 EXPORT_SYMBOL_GPL(fpga_mgr_register);
701 
702 /**
703  * fpga_mgr_unregister - unregister an FPGA manager
704  * @mgr: fpga manager struct
705  *
706  * This function is intended for use in an FPGA manager driver's remove function.
707  */
fpga_mgr_unregister(struct fpga_manager * mgr)708 void fpga_mgr_unregister(struct fpga_manager *mgr)
709 {
710 	dev_info(&mgr->dev, "%s %s\n", __func__, mgr->name);
711 
712 	/*
713 	 * If the low level driver provides a method for putting fpga into
714 	 * a desired state upon unregister, do it.
715 	 */
716 	fpga_mgr_fpga_remove(mgr);
717 
718 	device_unregister(&mgr->dev);
719 }
720 EXPORT_SYMBOL_GPL(fpga_mgr_unregister);
721 
devm_fpga_mgr_unregister(struct device * dev,void * res)722 static void devm_fpga_mgr_unregister(struct device *dev, void *res)
723 {
724 	struct fpga_mgr_devres *dr = res;
725 
726 	fpga_mgr_unregister(dr->mgr);
727 }
728 
729 /**
730  * devm_fpga_mgr_register_full - resource managed variant of fpga_mgr_register()
731  * @parent:	fpga manager device from pdev
732  * @info:	parameters for fpga manager
733  *
734  * Return:  fpga manager pointer on success, negative error code otherwise.
735  *
736  * This is the devres variant of fpga_mgr_register_full() for which the unregister
737  * function will be called automatically when the managing device is detached.
738  */
739 struct fpga_manager *
devm_fpga_mgr_register_full(struct device * parent,const struct fpga_manager_info * info)740 devm_fpga_mgr_register_full(struct device *parent, const struct fpga_manager_info *info)
741 {
742 	struct fpga_mgr_devres *dr;
743 	struct fpga_manager *mgr;
744 
745 	dr = devres_alloc(devm_fpga_mgr_unregister, sizeof(*dr), GFP_KERNEL);
746 	if (!dr)
747 		return ERR_PTR(-ENOMEM);
748 
749 	mgr = fpga_mgr_register_full(parent, info);
750 	if (IS_ERR(mgr)) {
751 		devres_free(dr);
752 		return mgr;
753 	}
754 
755 	dr->mgr = mgr;
756 	devres_add(parent, dr);
757 
758 	return mgr;
759 }
760 EXPORT_SYMBOL_GPL(devm_fpga_mgr_register_full);
761 
762 /**
763  * devm_fpga_mgr_register - resource managed variant of fpga_mgr_register()
764  * @parent:	fpga manager device from pdev
765  * @name:	fpga manager name
766  * @mops:	pointer to structure of fpga manager ops
767  * @priv:	fpga manager private data
768  *
769  * Return:  fpga manager pointer on success, negative error code otherwise.
770  *
771  * This is the devres variant of fpga_mgr_register() for which the
772  * unregister function will be called automatically when the managing
773  * device is detached.
774  */
775 struct fpga_manager *
devm_fpga_mgr_register(struct device * parent,const char * name,const struct fpga_manager_ops * mops,void * priv)776 devm_fpga_mgr_register(struct device *parent, const char *name,
777 		       const struct fpga_manager_ops *mops, void *priv)
778 {
779 	struct fpga_manager_info info = { 0 };
780 
781 	info.name = name;
782 	info.mops = mops;
783 	info.priv = priv;
784 
785 	return devm_fpga_mgr_register_full(parent, &info);
786 }
787 EXPORT_SYMBOL_GPL(devm_fpga_mgr_register);
788 
fpga_mgr_dev_release(struct device * dev)789 static void fpga_mgr_dev_release(struct device *dev)
790 {
791 	struct fpga_manager *mgr = to_fpga_manager(dev);
792 
793 	ida_simple_remove(&fpga_mgr_ida, mgr->dev.id);
794 	kfree(mgr);
795 }
796 
fpga_mgr_class_init(void)797 static int __init fpga_mgr_class_init(void)
798 {
799 	pr_info("FPGA manager framework\n");
800 
801 	fpga_mgr_class = class_create(THIS_MODULE, "fpga_manager");
802 	if (IS_ERR(fpga_mgr_class))
803 		return PTR_ERR(fpga_mgr_class);
804 
805 	fpga_mgr_class->dev_groups = fpga_mgr_groups;
806 	fpga_mgr_class->dev_release = fpga_mgr_dev_release;
807 
808 	return 0;
809 }
810 
fpga_mgr_class_exit(void)811 static void __exit fpga_mgr_class_exit(void)
812 {
813 	class_destroy(fpga_mgr_class);
814 	ida_destroy(&fpga_mgr_ida);
815 }
816 
817 MODULE_AUTHOR("Alan Tull <atull@kernel.org>");
818 MODULE_DESCRIPTION("FPGA manager framework");
819 MODULE_LICENSE("GPL v2");
820 
821 subsys_initcall(fpga_mgr_class_init);
822 module_exit(fpga_mgr_class_exit);
823