1 /*
2 * Pin-multiplex helper macros for TI DaVinci family devices
3 *
4 * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 *
11 * Copyright (C) 2008 Texas Instruments.
12 */
13 #ifndef _MACH_DAVINCI_MUX_H_
14 #define _MACH_DAVINCI_MUX_H_
15
16 struct mux_config {
17 const char *name;
18 const char *mux_reg_name;
19 const unsigned char mux_reg;
20 const unsigned char mask_offset;
21 const unsigned char mask;
22 const unsigned char mode;
23 bool debug;
24 };
25
26 enum davinci_dm644x_index {
27 /* ATA and HDDIR functions */
28 DM644X_HDIREN,
29 DM644X_ATAEN,
30 DM644X_ATAEN_DISABLE,
31
32 /* HPI functions */
33 DM644X_HPIEN_DISABLE,
34
35 /* AEAW functions */
36 DM644X_AEAW,
37 DM644X_AEAW0,
38 DM644X_AEAW1,
39 DM644X_AEAW2,
40 DM644X_AEAW3,
41 DM644X_AEAW4,
42
43 /* Memory Stick */
44 DM644X_MSTK,
45
46 /* I2C */
47 DM644X_I2C,
48
49 /* ASP function */
50 DM644X_MCBSP,
51
52 /* UART1 */
53 DM644X_UART1,
54
55 /* UART2 */
56 DM644X_UART2,
57
58 /* PWM0 */
59 DM644X_PWM0,
60
61 /* PWM1 */
62 DM644X_PWM1,
63
64 /* PWM2 */
65 DM644X_PWM2,
66
67 /* VLYNQ function */
68 DM644X_VLYNQEN,
69 DM644X_VLSCREN,
70 DM644X_VLYNQWD,
71
72 /* EMAC and MDIO function */
73 DM644X_EMACEN,
74
75 /* GPIO3V[0:16] pins */
76 DM644X_GPIO3V,
77
78 /* GPIO pins */
79 DM644X_GPIO0,
80 DM644X_GPIO3,
81 DM644X_GPIO43_44,
82 DM644X_GPIO46_47,
83
84 /* VPBE */
85 DM644X_RGB666,
86
87 /* LCD */
88 DM644X_LOEEN,
89 DM644X_LFLDEN,
90 };
91
92 enum davinci_dm646x_index {
93 /* ATA function */
94 DM646X_ATAEN,
95
96 /* AUDIO Clock */
97 DM646X_AUDCK1,
98 DM646X_AUDCK0,
99
100 /* CRGEN Control */
101 DM646X_CRGMUX,
102
103 /* VPIF Control */
104 DM646X_STSOMUX_DISABLE,
105 DM646X_STSIMUX_DISABLE,
106 DM646X_PTSOMUX_DISABLE,
107 DM646X_PTSIMUX_DISABLE,
108
109 /* TSIF Control */
110 DM646X_STSOMUX,
111 DM646X_STSIMUX,
112 DM646X_PTSOMUX_PARALLEL,
113 DM646X_PTSIMUX_PARALLEL,
114 DM646X_PTSOMUX_SERIAL,
115 DM646X_PTSIMUX_SERIAL,
116 };
117
118 enum davinci_dm355_index {
119 /* MMC/SD 0 */
120 DM355_MMCSD0,
121
122 /* MMC/SD 1 */
123 DM355_SD1_CLK,
124 DM355_SD1_CMD,
125 DM355_SD1_DATA3,
126 DM355_SD1_DATA2,
127 DM355_SD1_DATA1,
128 DM355_SD1_DATA0,
129
130 /* I2C */
131 DM355_I2C_SDA,
132 DM355_I2C_SCL,
133
134 /* ASP0 function */
135 DM355_MCBSP0_BDX,
136 DM355_MCBSP0_X,
137 DM355_MCBSP0_BFSX,
138 DM355_MCBSP0_BDR,
139 DM355_MCBSP0_R,
140 DM355_MCBSP0_BFSR,
141
142 /* SPI0 */
143 DM355_SPI0_SDI,
144 DM355_SPI0_SDENA0,
145 DM355_SPI0_SDENA1,
146
147 /* IRQ muxing */
148 DM355_INT_EDMA_CC,
149 DM355_INT_EDMA_TC0_ERR,
150 DM355_INT_EDMA_TC1_ERR,
151
152 /* EDMA event muxing */
153 DM355_EVT8_ASP1_TX,
154 DM355_EVT9_ASP1_RX,
155 DM355_EVT26_MMC0_RX,
156
157 /* Video Out */
158 DM355_VOUT_FIELD,
159 DM355_VOUT_FIELD_G70,
160 DM355_VOUT_HVSYNC,
161 DM355_VOUT_COUTL_EN,
162 DM355_VOUT_COUTH_EN,
163
164 /* Video In Pin Mux */
165 DM355_VIN_PCLK,
166 DM355_VIN_CAM_WEN,
167 DM355_VIN_CAM_VD,
168 DM355_VIN_CAM_HD,
169 DM355_VIN_YIN_EN,
170 DM355_VIN_CINL_EN,
171 DM355_VIN_CINH_EN,
172 };
173
174 enum davinci_dm365_index {
175 /* MMC/SD 0 */
176 DM365_MMCSD0,
177
178 /* MMC/SD 1 */
179 DM365_SD1_CLK,
180 DM365_SD1_CMD,
181 DM365_SD1_DATA3,
182 DM365_SD1_DATA2,
183 DM365_SD1_DATA1,
184 DM365_SD1_DATA0,
185
186 /* I2C */
187 DM365_I2C_SDA,
188 DM365_I2C_SCL,
189
190 /* AEMIF */
191 DM365_AEMIF_AR_A14,
192 DM365_AEMIF_AR_BA0,
193 DM365_AEMIF_A3,
194 DM365_AEMIF_A7,
195 DM365_AEMIF_D15_8,
196 DM365_AEMIF_CE0,
197 DM365_AEMIF_CE1,
198 DM365_AEMIF_WE_OE,
199
200 /* ASP0 function */
201 DM365_MCBSP0_BDX,
202 DM365_MCBSP0_X,
203 DM365_MCBSP0_BFSX,
204 DM365_MCBSP0_BDR,
205 DM365_MCBSP0_R,
206 DM365_MCBSP0_BFSR,
207
208 /* SPI0 */
209 DM365_SPI0_SCLK,
210 DM365_SPI0_SDI,
211 DM365_SPI0_SDO,
212 DM365_SPI0_SDENA0,
213 DM365_SPI0_SDENA1,
214
215 /* UART */
216 DM365_UART0_RXD,
217 DM365_UART0_TXD,
218 DM365_UART1_RXD,
219 DM365_UART1_TXD,
220 DM365_UART1_RTS,
221 DM365_UART1_CTS,
222
223 /* EMAC */
224 DM365_EMAC_TX_EN,
225 DM365_EMAC_TX_CLK,
226 DM365_EMAC_COL,
227 DM365_EMAC_TXD3,
228 DM365_EMAC_TXD2,
229 DM365_EMAC_TXD1,
230 DM365_EMAC_TXD0,
231 DM365_EMAC_RXD3,
232 DM365_EMAC_RXD2,
233 DM365_EMAC_RXD1,
234 DM365_EMAC_RXD0,
235 DM365_EMAC_RX_CLK,
236 DM365_EMAC_RX_DV,
237 DM365_EMAC_RX_ER,
238 DM365_EMAC_CRS,
239 DM365_EMAC_MDIO,
240 DM365_EMAC_MDCLK,
241
242 /* Key Scan */
243 DM365_KEYSCAN,
244
245 /* PWM */
246 DM365_PWM0,
247 DM365_PWM0_G23,
248 DM365_PWM1,
249 DM365_PWM1_G25,
250 DM365_PWM2_G87,
251 DM365_PWM2_G88,
252 DM365_PWM2_G89,
253 DM365_PWM2_G90,
254 DM365_PWM3_G80,
255 DM365_PWM3_G81,
256 DM365_PWM3_G85,
257 DM365_PWM3_G86,
258
259 /* SPI1 */
260 DM365_SPI1_SCLK,
261 DM365_SPI1_SDO,
262 DM365_SPI1_SDI,
263 DM365_SPI1_SDENA0,
264 DM365_SPI1_SDENA1,
265
266 /* SPI2 */
267 DM365_SPI2_SCLK,
268 DM365_SPI2_SDO,
269 DM365_SPI2_SDI,
270 DM365_SPI2_SDENA0,
271 DM365_SPI2_SDENA1,
272
273 /* SPI3 */
274 DM365_SPI3_SCLK,
275 DM365_SPI3_SDO,
276 DM365_SPI3_SDI,
277 DM365_SPI3_SDENA0,
278 DM365_SPI3_SDENA1,
279
280 /* SPI4 */
281 DM365_SPI4_SCLK,
282 DM365_SPI4_SDO,
283 DM365_SPI4_SDI,
284 DM365_SPI4_SDENA0,
285 DM365_SPI4_SDENA1,
286
287 /* Clock */
288 DM365_CLKOUT0,
289 DM365_CLKOUT1,
290 DM365_CLKOUT2,
291
292 /* GPIO */
293 DM365_GPIO20,
294 DM365_GPIO30,
295 DM365_GPIO31,
296 DM365_GPIO32,
297 DM365_GPIO33,
298 DM365_GPIO40,
299 DM365_GPIO64_57,
300
301 /* Video */
302 DM365_VOUT_FIELD,
303 DM365_VOUT_FIELD_G81,
304 DM365_VOUT_HVSYNC,
305 DM365_VOUT_COUTL_EN,
306 DM365_VOUT_COUTH_EN,
307 DM365_VIN_CAM_WEN,
308 DM365_VIN_CAM_VD,
309 DM365_VIN_CAM_HD,
310 DM365_VIN_YIN4_7_EN,
311 DM365_VIN_YIN0_3_EN,
312
313 /* IRQ muxing */
314 DM365_INT_EDMA_CC,
315 DM365_INT_EDMA_TC0_ERR,
316 DM365_INT_EDMA_TC1_ERR,
317 DM365_INT_EDMA_TC2_ERR,
318 DM365_INT_EDMA_TC3_ERR,
319 DM365_INT_PRTCSS,
320 DM365_INT_EMAC_RXTHRESH,
321 DM365_INT_EMAC_RXPULSE,
322 DM365_INT_EMAC_TXPULSE,
323 DM365_INT_EMAC_MISCPULSE,
324 DM365_INT_IMX0_ENABLE,
325 DM365_INT_IMX0_DISABLE,
326 DM365_INT_HDVICP_ENABLE,
327 DM365_INT_HDVICP_DISABLE,
328 DM365_INT_IMX1_ENABLE,
329 DM365_INT_IMX1_DISABLE,
330 DM365_INT_NSF_ENABLE,
331 DM365_INT_NSF_DISABLE,
332
333 /* EDMA event muxing */
334 DM365_EVT2_ASP_TX,
335 DM365_EVT3_ASP_RX,
336 DM365_EVT2_VC_TX,
337 DM365_EVT3_VC_RX,
338 DM365_EVT26_MMC0_RX,
339 };
340
341 enum da830_index {
342 DA830_GPIO7_14,
343 DA830_RTCK,
344 DA830_GPIO7_15,
345 DA830_EMU_0,
346 DA830_EMB_SDCKE,
347 DA830_EMB_CLK_GLUE,
348 DA830_EMB_CLK,
349 DA830_NEMB_CS_0,
350 DA830_NEMB_CAS,
351 DA830_NEMB_RAS,
352 DA830_NEMB_WE,
353 DA830_EMB_BA_1,
354 DA830_EMB_BA_0,
355 DA830_EMB_A_0,
356 DA830_EMB_A_1,
357 DA830_EMB_A_2,
358 DA830_EMB_A_3,
359 DA830_EMB_A_4,
360 DA830_EMB_A_5,
361 DA830_GPIO7_0,
362 DA830_GPIO7_1,
363 DA830_GPIO7_2,
364 DA830_GPIO7_3,
365 DA830_GPIO7_4,
366 DA830_GPIO7_5,
367 DA830_GPIO7_6,
368 DA830_GPIO7_7,
369 DA830_EMB_A_6,
370 DA830_EMB_A_7,
371 DA830_EMB_A_8,
372 DA830_EMB_A_9,
373 DA830_EMB_A_10,
374 DA830_EMB_A_11,
375 DA830_EMB_A_12,
376 DA830_EMB_D_31,
377 DA830_GPIO7_8,
378 DA830_GPIO7_9,
379 DA830_GPIO7_10,
380 DA830_GPIO7_11,
381 DA830_GPIO7_12,
382 DA830_GPIO7_13,
383 DA830_GPIO3_13,
384 DA830_EMB_D_30,
385 DA830_EMB_D_29,
386 DA830_EMB_D_28,
387 DA830_EMB_D_27,
388 DA830_EMB_D_26,
389 DA830_EMB_D_25,
390 DA830_EMB_D_24,
391 DA830_EMB_D_23,
392 DA830_EMB_D_22,
393 DA830_EMB_D_21,
394 DA830_EMB_D_20,
395 DA830_EMB_D_19,
396 DA830_EMB_D_18,
397 DA830_EMB_D_17,
398 DA830_EMB_D_16,
399 DA830_NEMB_WE_DQM_3,
400 DA830_NEMB_WE_DQM_2,
401 DA830_EMB_D_0,
402 DA830_EMB_D_1,
403 DA830_EMB_D_2,
404 DA830_EMB_D_3,
405 DA830_EMB_D_4,
406 DA830_EMB_D_5,
407 DA830_EMB_D_6,
408 DA830_GPIO6_0,
409 DA830_GPIO6_1,
410 DA830_GPIO6_2,
411 DA830_GPIO6_3,
412 DA830_GPIO6_4,
413 DA830_GPIO6_5,
414 DA830_GPIO6_6,
415 DA830_EMB_D_7,
416 DA830_EMB_D_8,
417 DA830_EMB_D_9,
418 DA830_EMB_D_10,
419 DA830_EMB_D_11,
420 DA830_EMB_D_12,
421 DA830_EMB_D_13,
422 DA830_EMB_D_14,
423 DA830_GPIO6_7,
424 DA830_GPIO6_8,
425 DA830_GPIO6_9,
426 DA830_GPIO6_10,
427 DA830_GPIO6_11,
428 DA830_GPIO6_12,
429 DA830_GPIO6_13,
430 DA830_GPIO6_14,
431 DA830_EMB_D_15,
432 DA830_NEMB_WE_DQM_1,
433 DA830_NEMB_WE_DQM_0,
434 DA830_SPI0_SOMI_0,
435 DA830_SPI0_SIMO_0,
436 DA830_SPI0_CLK,
437 DA830_NSPI0_ENA,
438 DA830_NSPI0_SCS_0,
439 DA830_EQEP0I,
440 DA830_EQEP0S,
441 DA830_EQEP1I,
442 DA830_NUART0_CTS,
443 DA830_NUART0_RTS,
444 DA830_EQEP0A,
445 DA830_EQEP0B,
446 DA830_GPIO6_15,
447 DA830_GPIO5_14,
448 DA830_GPIO5_15,
449 DA830_GPIO5_0,
450 DA830_GPIO5_1,
451 DA830_GPIO5_2,
452 DA830_GPIO5_3,
453 DA830_GPIO5_4,
454 DA830_SPI1_SOMI_0,
455 DA830_SPI1_SIMO_0,
456 DA830_SPI1_CLK,
457 DA830_UART0_RXD,
458 DA830_UART0_TXD,
459 DA830_AXR1_10,
460 DA830_AXR1_11,
461 DA830_NSPI1_ENA,
462 DA830_I2C1_SCL,
463 DA830_I2C1_SDA,
464 DA830_EQEP1S,
465 DA830_I2C0_SDA,
466 DA830_I2C0_SCL,
467 DA830_UART2_RXD,
468 DA830_TM64P0_IN12,
469 DA830_TM64P0_OUT12,
470 DA830_GPIO5_5,
471 DA830_GPIO5_6,
472 DA830_GPIO5_7,
473 DA830_GPIO5_8,
474 DA830_GPIO5_9,
475 DA830_GPIO5_10,
476 DA830_GPIO5_11,
477 DA830_GPIO5_12,
478 DA830_NSPI1_SCS_0,
479 DA830_USB0_DRVVBUS,
480 DA830_AHCLKX0,
481 DA830_ACLKX0,
482 DA830_AFSX0,
483 DA830_AHCLKR0,
484 DA830_ACLKR0,
485 DA830_AFSR0,
486 DA830_UART2_TXD,
487 DA830_AHCLKX2,
488 DA830_ECAP0_APWM0,
489 DA830_RMII_MHZ_50_CLK,
490 DA830_ECAP1_APWM1,
491 DA830_USB_REFCLKIN,
492 DA830_GPIO5_13,
493 DA830_GPIO4_15,
494 DA830_GPIO2_11,
495 DA830_GPIO2_12,
496 DA830_GPIO2_13,
497 DA830_GPIO2_14,
498 DA830_GPIO2_15,
499 DA830_GPIO3_12,
500 DA830_AMUTE0,
501 DA830_AXR0_0,
502 DA830_AXR0_1,
503 DA830_AXR0_2,
504 DA830_AXR0_3,
505 DA830_AXR0_4,
506 DA830_AXR0_5,
507 DA830_AXR0_6,
508 DA830_RMII_TXD_0,
509 DA830_RMII_TXD_1,
510 DA830_RMII_TXEN,
511 DA830_RMII_CRS_DV,
512 DA830_RMII_RXD_0,
513 DA830_RMII_RXD_1,
514 DA830_RMII_RXER,
515 DA830_AFSR2,
516 DA830_ACLKX2,
517 DA830_AXR2_3,
518 DA830_AXR2_2,
519 DA830_AXR2_1,
520 DA830_AFSX2,
521 DA830_ACLKR2,
522 DA830_NRESETOUT,
523 DA830_GPIO3_0,
524 DA830_GPIO3_1,
525 DA830_GPIO3_2,
526 DA830_GPIO3_3,
527 DA830_GPIO3_4,
528 DA830_GPIO3_5,
529 DA830_GPIO3_6,
530 DA830_AXR0_7,
531 DA830_AXR0_8,
532 DA830_UART1_RXD,
533 DA830_UART1_TXD,
534 DA830_AXR0_11,
535 DA830_AHCLKX1,
536 DA830_ACLKX1,
537 DA830_AFSX1,
538 DA830_MDIO_CLK,
539 DA830_MDIO_D,
540 DA830_AXR0_9,
541 DA830_AXR0_10,
542 DA830_EPWM0B,
543 DA830_EPWM0A,
544 DA830_EPWMSYNCI,
545 DA830_AXR2_0,
546 DA830_EPWMSYNC0,
547 DA830_GPIO3_7,
548 DA830_GPIO3_8,
549 DA830_GPIO3_9,
550 DA830_GPIO3_10,
551 DA830_GPIO3_11,
552 DA830_GPIO3_14,
553 DA830_GPIO3_15,
554 DA830_GPIO4_10,
555 DA830_AHCLKR1,
556 DA830_ACLKR1,
557 DA830_AFSR1,
558 DA830_AMUTE1,
559 DA830_AXR1_0,
560 DA830_AXR1_1,
561 DA830_AXR1_2,
562 DA830_AXR1_3,
563 DA830_ECAP2_APWM2,
564 DA830_EHRPWMGLUETZ,
565 DA830_EQEP1A,
566 DA830_GPIO4_11,
567 DA830_GPIO4_12,
568 DA830_GPIO4_13,
569 DA830_GPIO4_14,
570 DA830_GPIO4_0,
571 DA830_GPIO4_1,
572 DA830_GPIO4_2,
573 DA830_GPIO4_3,
574 DA830_AXR1_4,
575 DA830_AXR1_5,
576 DA830_AXR1_6,
577 DA830_AXR1_7,
578 DA830_AXR1_8,
579 DA830_AXR1_9,
580 DA830_EMA_D_0,
581 DA830_EMA_D_1,
582 DA830_EQEP1B,
583 DA830_EPWM2B,
584 DA830_EPWM2A,
585 DA830_EPWM1B,
586 DA830_EPWM1A,
587 DA830_MMCSD_DAT_0,
588 DA830_MMCSD_DAT_1,
589 DA830_UHPI_HD_0,
590 DA830_UHPI_HD_1,
591 DA830_GPIO4_4,
592 DA830_GPIO4_5,
593 DA830_GPIO4_6,
594 DA830_GPIO4_7,
595 DA830_GPIO4_8,
596 DA830_GPIO4_9,
597 DA830_GPIO0_0,
598 DA830_GPIO0_1,
599 DA830_EMA_D_2,
600 DA830_EMA_D_3,
601 DA830_EMA_D_4,
602 DA830_EMA_D_5,
603 DA830_EMA_D_6,
604 DA830_EMA_D_7,
605 DA830_EMA_D_8,
606 DA830_EMA_D_9,
607 DA830_MMCSD_DAT_2,
608 DA830_MMCSD_DAT_3,
609 DA830_MMCSD_DAT_4,
610 DA830_MMCSD_DAT_5,
611 DA830_MMCSD_DAT_6,
612 DA830_MMCSD_DAT_7,
613 DA830_UHPI_HD_8,
614 DA830_UHPI_HD_9,
615 DA830_UHPI_HD_2,
616 DA830_UHPI_HD_3,
617 DA830_UHPI_HD_4,
618 DA830_UHPI_HD_5,
619 DA830_UHPI_HD_6,
620 DA830_UHPI_HD_7,
621 DA830_LCD_D_8,
622 DA830_LCD_D_9,
623 DA830_GPIO0_2,
624 DA830_GPIO0_3,
625 DA830_GPIO0_4,
626 DA830_GPIO0_5,
627 DA830_GPIO0_6,
628 DA830_GPIO0_7,
629 DA830_GPIO0_8,
630 DA830_GPIO0_9,
631 DA830_EMA_D_10,
632 DA830_EMA_D_11,
633 DA830_EMA_D_12,
634 DA830_EMA_D_13,
635 DA830_EMA_D_14,
636 DA830_EMA_D_15,
637 DA830_EMA_A_0,
638 DA830_EMA_A_1,
639 DA830_UHPI_HD_10,
640 DA830_UHPI_HD_11,
641 DA830_UHPI_HD_12,
642 DA830_UHPI_HD_13,
643 DA830_UHPI_HD_14,
644 DA830_UHPI_HD_15,
645 DA830_LCD_D_7,
646 DA830_MMCSD_CLK,
647 DA830_LCD_D_10,
648 DA830_LCD_D_11,
649 DA830_LCD_D_12,
650 DA830_LCD_D_13,
651 DA830_LCD_D_14,
652 DA830_LCD_D_15,
653 DA830_UHPI_HCNTL0,
654 DA830_GPIO0_10,
655 DA830_GPIO0_11,
656 DA830_GPIO0_12,
657 DA830_GPIO0_13,
658 DA830_GPIO0_14,
659 DA830_GPIO0_15,
660 DA830_GPIO1_0,
661 DA830_GPIO1_1,
662 DA830_EMA_A_2,
663 DA830_EMA_A_3,
664 DA830_EMA_A_4,
665 DA830_EMA_A_5,
666 DA830_EMA_A_6,
667 DA830_EMA_A_7,
668 DA830_EMA_A_8,
669 DA830_EMA_A_9,
670 DA830_MMCSD_CMD,
671 DA830_LCD_D_6,
672 DA830_LCD_D_3,
673 DA830_LCD_D_2,
674 DA830_LCD_D_1,
675 DA830_LCD_D_0,
676 DA830_LCD_PCLK,
677 DA830_LCD_HSYNC,
678 DA830_UHPI_HCNTL1,
679 DA830_GPIO1_2,
680 DA830_GPIO1_3,
681 DA830_GPIO1_4,
682 DA830_GPIO1_5,
683 DA830_GPIO1_6,
684 DA830_GPIO1_7,
685 DA830_GPIO1_8,
686 DA830_GPIO1_9,
687 DA830_EMA_A_10,
688 DA830_EMA_A_11,
689 DA830_EMA_A_12,
690 DA830_EMA_BA_1,
691 DA830_EMA_BA_0,
692 DA830_EMA_CLK,
693 DA830_EMA_SDCKE,
694 DA830_NEMA_CAS,
695 DA830_LCD_VSYNC,
696 DA830_NLCD_AC_ENB_CS,
697 DA830_LCD_MCLK,
698 DA830_LCD_D_5,
699 DA830_LCD_D_4,
700 DA830_OBSCLK,
701 DA830_NEMA_CS_4,
702 DA830_UHPI_HHWIL,
703 DA830_AHCLKR2,
704 DA830_GPIO1_10,
705 DA830_GPIO1_11,
706 DA830_GPIO1_12,
707 DA830_GPIO1_13,
708 DA830_GPIO1_14,
709 DA830_GPIO1_15,
710 DA830_GPIO2_0,
711 DA830_GPIO2_1,
712 DA830_NEMA_RAS,
713 DA830_NEMA_WE,
714 DA830_NEMA_CS_0,
715 DA830_NEMA_CS_2,
716 DA830_NEMA_CS_3,
717 DA830_NEMA_OE,
718 DA830_NEMA_WE_DQM_1,
719 DA830_NEMA_WE_DQM_0,
720 DA830_NEMA_CS_5,
721 DA830_UHPI_HRNW,
722 DA830_NUHPI_HAS,
723 DA830_NUHPI_HCS,
724 DA830_NUHPI_HDS1,
725 DA830_NUHPI_HDS2,
726 DA830_NUHPI_HINT,
727 DA830_AXR0_12,
728 DA830_AMUTE2,
729 DA830_AXR0_13,
730 DA830_AXR0_14,
731 DA830_AXR0_15,
732 DA830_GPIO2_2,
733 DA830_GPIO2_3,
734 DA830_GPIO2_4,
735 DA830_GPIO2_5,
736 DA830_GPIO2_6,
737 DA830_GPIO2_7,
738 DA830_GPIO2_8,
739 DA830_GPIO2_9,
740 DA830_EMA_WAIT_0,
741 DA830_NUHPI_HRDY,
742 DA830_GPIO2_10,
743 };
744
745 enum davinci_da850_index {
746 /* UART0 function */
747 DA850_NUART0_CTS,
748 DA850_NUART0_RTS,
749 DA850_UART0_RXD,
750 DA850_UART0_TXD,
751
752 /* UART1 function */
753 DA850_NUART1_CTS,
754 DA850_NUART1_RTS,
755 DA850_UART1_RXD,
756 DA850_UART1_TXD,
757
758 /* UART2 function */
759 DA850_NUART2_CTS,
760 DA850_NUART2_RTS,
761 DA850_UART2_RXD,
762 DA850_UART2_TXD,
763
764 /* I2C1 function */
765 DA850_I2C1_SCL,
766 DA850_I2C1_SDA,
767
768 /* I2C0 function */
769 DA850_I2C0_SDA,
770 DA850_I2C0_SCL,
771
772 /* EMAC function */
773 DA850_MII_TXEN,
774 DA850_MII_TXCLK,
775 DA850_MII_COL,
776 DA850_MII_TXD_3,
777 DA850_MII_TXD_2,
778 DA850_MII_TXD_1,
779 DA850_MII_TXD_0,
780 DA850_MII_RXER,
781 DA850_MII_CRS,
782 DA850_MII_RXCLK,
783 DA850_MII_RXDV,
784 DA850_MII_RXD_3,
785 DA850_MII_RXD_2,
786 DA850_MII_RXD_1,
787 DA850_MII_RXD_0,
788 DA850_MDIO_CLK,
789 DA850_MDIO_D,
790 DA850_RMII_TXD_0,
791 DA850_RMII_TXD_1,
792 DA850_RMII_TXEN,
793 DA850_RMII_CRS_DV,
794 DA850_RMII_RXD_0,
795 DA850_RMII_RXD_1,
796 DA850_RMII_RXER,
797 DA850_RMII_MHZ_50_CLK,
798
799 /* McASP function */
800 DA850_ACLKR,
801 DA850_ACLKX,
802 DA850_AFSR,
803 DA850_AFSX,
804 DA850_AHCLKR,
805 DA850_AHCLKX,
806 DA850_AMUTE,
807 DA850_AXR_15,
808 DA850_AXR_14,
809 DA850_AXR_13,
810 DA850_AXR_12,
811 DA850_AXR_11,
812 DA850_AXR_10,
813 DA850_AXR_9,
814 DA850_AXR_8,
815 DA850_AXR_7,
816 DA850_AXR_6,
817 DA850_AXR_5,
818 DA850_AXR_4,
819 DA850_AXR_3,
820 DA850_AXR_2,
821 DA850_AXR_1,
822 DA850_AXR_0,
823
824 /* LCD function */
825 DA850_LCD_D_7,
826 DA850_LCD_D_6,
827 DA850_LCD_D_5,
828 DA850_LCD_D_4,
829 DA850_LCD_D_3,
830 DA850_LCD_D_2,
831 DA850_LCD_D_1,
832 DA850_LCD_D_0,
833 DA850_LCD_D_15,
834 DA850_LCD_D_14,
835 DA850_LCD_D_13,
836 DA850_LCD_D_12,
837 DA850_LCD_D_11,
838 DA850_LCD_D_10,
839 DA850_LCD_D_9,
840 DA850_LCD_D_8,
841 DA850_LCD_PCLK,
842 DA850_LCD_HSYNC,
843 DA850_LCD_VSYNC,
844 DA850_NLCD_AC_ENB_CS,
845
846 /* MMC/SD0 function */
847 DA850_MMCSD0_DAT_0,
848 DA850_MMCSD0_DAT_1,
849 DA850_MMCSD0_DAT_2,
850 DA850_MMCSD0_DAT_3,
851 DA850_MMCSD0_CLK,
852 DA850_MMCSD0_CMD,
853
854 /* MMC/SD1 function */
855 DA850_MMCSD1_DAT_0,
856 DA850_MMCSD1_DAT_1,
857 DA850_MMCSD1_DAT_2,
858 DA850_MMCSD1_DAT_3,
859 DA850_MMCSD1_CLK,
860 DA850_MMCSD1_CMD,
861
862 /* EMIF2.5/EMIFA function */
863 DA850_EMA_D_7,
864 DA850_EMA_D_6,
865 DA850_EMA_D_5,
866 DA850_EMA_D_4,
867 DA850_EMA_D_3,
868 DA850_EMA_D_2,
869 DA850_EMA_D_1,
870 DA850_EMA_D_0,
871 DA850_EMA_A_1,
872 DA850_EMA_A_2,
873 DA850_NEMA_CS_3,
874 DA850_NEMA_CS_4,
875 DA850_NEMA_WE,
876 DA850_NEMA_OE,
877 DA850_EMA_D_15,
878 DA850_EMA_D_14,
879 DA850_EMA_D_13,
880 DA850_EMA_D_12,
881 DA850_EMA_D_11,
882 DA850_EMA_D_10,
883 DA850_EMA_D_9,
884 DA850_EMA_D_8,
885 DA850_EMA_A_0,
886 DA850_EMA_A_3,
887 DA850_EMA_A_4,
888 DA850_EMA_A_5,
889 DA850_EMA_A_6,
890 DA850_EMA_A_7,
891 DA850_EMA_A_8,
892 DA850_EMA_A_9,
893 DA850_EMA_A_10,
894 DA850_EMA_A_11,
895 DA850_EMA_A_12,
896 DA850_EMA_A_13,
897 DA850_EMA_A_14,
898 DA850_EMA_A_15,
899 DA850_EMA_A_16,
900 DA850_EMA_A_17,
901 DA850_EMA_A_18,
902 DA850_EMA_A_19,
903 DA850_EMA_A_20,
904 DA850_EMA_A_21,
905 DA850_EMA_A_22,
906 DA850_EMA_A_23,
907 DA850_EMA_BA_1,
908 DA850_EMA_CLK,
909 DA850_EMA_WAIT_1,
910 DA850_NEMA_CS_2,
911
912 /* GPIO function */
913 DA850_GPIO2_4,
914 DA850_GPIO2_6,
915 DA850_GPIO2_8,
916 DA850_GPIO2_15,
917 DA850_GPIO3_12,
918 DA850_GPIO3_13,
919 DA850_GPIO4_0,
920 DA850_GPIO4_1,
921 DA850_GPIO6_9,
922 DA850_GPIO6_10,
923 DA850_GPIO6_13,
924 DA850_RTC_ALARM,
925
926 /* VPIF Capture */
927 DA850_VPIF_DIN0,
928 DA850_VPIF_DIN1,
929 DA850_VPIF_DIN2,
930 DA850_VPIF_DIN3,
931 DA850_VPIF_DIN4,
932 DA850_VPIF_DIN5,
933 DA850_VPIF_DIN6,
934 DA850_VPIF_DIN7,
935 DA850_VPIF_DIN8,
936 DA850_VPIF_DIN9,
937 DA850_VPIF_DIN10,
938 DA850_VPIF_DIN11,
939 DA850_VPIF_DIN12,
940 DA850_VPIF_DIN13,
941 DA850_VPIF_DIN14,
942 DA850_VPIF_DIN15,
943 DA850_VPIF_CLKIN0,
944 DA850_VPIF_CLKIN1,
945 DA850_VPIF_CLKIN2,
946 DA850_VPIF_CLKIN3,
947
948 /* VPIF Display */
949 DA850_VPIF_DOUT0,
950 DA850_VPIF_DOUT1,
951 DA850_VPIF_DOUT2,
952 DA850_VPIF_DOUT3,
953 DA850_VPIF_DOUT4,
954 DA850_VPIF_DOUT5,
955 DA850_VPIF_DOUT6,
956 DA850_VPIF_DOUT7,
957 DA850_VPIF_DOUT8,
958 DA850_VPIF_DOUT9,
959 DA850_VPIF_DOUT10,
960 DA850_VPIF_DOUT11,
961 DA850_VPIF_DOUT12,
962 DA850_VPIF_DOUT13,
963 DA850_VPIF_DOUT14,
964 DA850_VPIF_DOUT15,
965 DA850_VPIF_CLKO2,
966 DA850_VPIF_CLKO3,
967 };
968
969 #define PINMUX(x) (4 * (x))
970
971 #ifdef CONFIG_DAVINCI_MUX
972 /* setup pin muxing */
973 extern int davinci_cfg_reg(unsigned long reg_cfg);
974 extern int davinci_cfg_reg_list(const short pins[]);
975 #else
976 /* boot loader does it all (no warnings from CONFIG_DAVINCI_MUX_WARNINGS) */
davinci_cfg_reg(unsigned long reg_cfg)977 static inline int davinci_cfg_reg(unsigned long reg_cfg) { return 0; }
davinci_cfg_reg_list(const short pins[])978 static inline int davinci_cfg_reg_list(const short pins[])
979 {
980 return 0;
981 }
982 #endif
983
984
985 #define MUX_CFG(soc, desc, muxreg, mode_offset, mode_mask, mux_mode, dbg)\
986 [soc##_##desc] = { \
987 .name = #desc, \
988 .debug = dbg, \
989 .mux_reg_name = "PINMUX"#muxreg, \
990 .mux_reg = PINMUX(muxreg), \
991 .mask_offset = mode_offset, \
992 .mask = mode_mask, \
993 .mode = mux_mode, \
994 },
995
996 #define INT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \
997 [soc##_##desc] = { \
998 .name = #desc, \
999 .debug = dbg, \
1000 .mux_reg_name = "INTMUX", \
1001 .mux_reg = INTMUX, \
1002 .mask_offset = mode_offset, \
1003 .mask = mode_mask, \
1004 .mode = mux_mode, \
1005 },
1006
1007 #define EVT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \
1008 [soc##_##desc] = { \
1009 .name = #desc, \
1010 .debug = dbg, \
1011 .mux_reg_name = "EVTMUX", \
1012 .mux_reg = EVTMUX, \
1013 .mask_offset = mode_offset, \
1014 .mask = mode_mask, \
1015 .mode = mux_mode, \
1016 },
1017
1018 #endif /* _MACH_DAVINCI_MUX_H */
1019