1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2006-2011 Solarflare Communications Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11 #ifndef EFX_NIC_H
12 #define EFX_NIC_H
13
14 #include <linux/i2c-algo-bit.h>
15 #include "net_driver.h"
16 #include "efx.h"
17 #include "mcdi.h"
18 #include "spi.h"
19
20 /*
21 * Falcon hardware control
22 */
23
24 enum {
25 EFX_REV_FALCON_A0 = 0,
26 EFX_REV_FALCON_A1 = 1,
27 EFX_REV_FALCON_B0 = 2,
28 EFX_REV_SIENA_A0 = 3,
29 };
30
efx_nic_rev(struct efx_nic * efx)31 static inline int efx_nic_rev(struct efx_nic *efx)
32 {
33 return efx->type->revision;
34 }
35
36 extern u32 efx_nic_fpga_ver(struct efx_nic *efx);
37
38 /* NIC has two interlinked PCI functions for the same port. */
efx_nic_is_dual_func(struct efx_nic * efx)39 static inline bool efx_nic_is_dual_func(struct efx_nic *efx)
40 {
41 return efx_nic_rev(efx) < EFX_REV_FALCON_B0;
42 }
43
44 enum {
45 PHY_TYPE_NONE = 0,
46 PHY_TYPE_TXC43128 = 1,
47 PHY_TYPE_88E1111 = 2,
48 PHY_TYPE_SFX7101 = 3,
49 PHY_TYPE_QT2022C2 = 4,
50 PHY_TYPE_PM8358 = 6,
51 PHY_TYPE_SFT9001A = 8,
52 PHY_TYPE_QT2025C = 9,
53 PHY_TYPE_SFT9001B = 10,
54 };
55
56 #define FALCON_XMAC_LOOPBACKS \
57 ((1 << LOOPBACK_XGMII) | \
58 (1 << LOOPBACK_XGXS) | \
59 (1 << LOOPBACK_XAUI))
60
61 #define FALCON_GMAC_LOOPBACKS \
62 (1 << LOOPBACK_GMAC)
63
64 /* Alignment of PCIe DMA boundaries (4KB) */
65 #define EFX_PAGE_SIZE 4096
66 /* Size and alignment of buffer table entries (same) */
67 #define EFX_BUF_SIZE EFX_PAGE_SIZE
68
69 /**
70 * struct falcon_board_type - board operations and type information
71 * @id: Board type id, as found in NVRAM
72 * @init: Allocate resources and initialise peripheral hardware
73 * @init_phy: Do board-specific PHY initialisation
74 * @fini: Shut down hardware and free resources
75 * @set_id_led: Set state of identifying LED or revert to automatic function
76 * @monitor: Board-specific health check function
77 */
78 struct falcon_board_type {
79 u8 id;
80 int (*init) (struct efx_nic *nic);
81 void (*init_phy) (struct efx_nic *efx);
82 void (*fini) (struct efx_nic *nic);
83 void (*set_id_led) (struct efx_nic *efx, enum efx_led_mode mode);
84 int (*monitor) (struct efx_nic *nic);
85 };
86
87 /**
88 * struct falcon_board - board information
89 * @type: Type of board
90 * @major: Major rev. ('A', 'B' ...)
91 * @minor: Minor rev. (0, 1, ...)
92 * @i2c_adap: I2C adapter for on-board peripherals
93 * @i2c_data: Data for bit-banging algorithm
94 * @hwmon_client: I2C client for hardware monitor
95 * @ioexp_client: I2C client for power/port control
96 */
97 struct falcon_board {
98 const struct falcon_board_type *type;
99 int major;
100 int minor;
101 struct i2c_adapter i2c_adap;
102 struct i2c_algo_bit_data i2c_data;
103 struct i2c_client *hwmon_client, *ioexp_client;
104 };
105
106 /**
107 * struct falcon_nic_data - Falcon NIC state
108 * @pci_dev2: Secondary function of Falcon A
109 * @board: Board state and functions
110 * @stats_disable_count: Nest count for disabling statistics fetches
111 * @stats_pending: Is there a pending DMA of MAC statistics.
112 * @stats_timer: A timer for regularly fetching MAC statistics.
113 * @stats_dma_done: Pointer to the flag which indicates DMA completion.
114 * @spi_flash: SPI flash device
115 * @spi_eeprom: SPI EEPROM device
116 * @spi_lock: SPI bus lock
117 * @mdio_lock: MDIO bus lock
118 * @xmac_poll_required: XMAC link state needs polling
119 */
120 struct falcon_nic_data {
121 struct pci_dev *pci_dev2;
122 struct falcon_board board;
123 unsigned int stats_disable_count;
124 bool stats_pending;
125 struct timer_list stats_timer;
126 u32 *stats_dma_done;
127 struct efx_spi_device spi_flash;
128 struct efx_spi_device spi_eeprom;
129 struct mutex spi_lock;
130 struct mutex mdio_lock;
131 bool xmac_poll_required;
132 };
133
falcon_board(struct efx_nic * efx)134 static inline struct falcon_board *falcon_board(struct efx_nic *efx)
135 {
136 struct falcon_nic_data *data = efx->nic_data;
137 return &data->board;
138 }
139
140 /**
141 * struct siena_nic_data - Siena NIC state
142 * @mcdi: Management-Controller-to-Driver Interface
143 * @wol_filter_id: Wake-on-LAN packet filter id
144 * @hwmon: Hardware monitor state
145 */
146 struct siena_nic_data {
147 struct efx_mcdi_iface mcdi;
148 int wol_filter_id;
149 #ifdef CONFIG_SFC_MCDI_MON
150 struct efx_mcdi_mon hwmon;
151 #endif
152 };
153
154 #ifdef CONFIG_SFC_MCDI_MON
efx_mcdi_mon(struct efx_nic * efx)155 static inline struct efx_mcdi_mon *efx_mcdi_mon(struct efx_nic *efx)
156 {
157 struct siena_nic_data *nic_data;
158 EFX_BUG_ON_PARANOID(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
159 nic_data = efx->nic_data;
160 return &nic_data->hwmon;
161 }
162 #endif
163
164 /*
165 * On the SFC9000 family each port is associated with 1 PCI physical
166 * function (PF) handled by sfc and a configurable number of virtual
167 * functions (VFs) that may be handled by some other driver, often in
168 * a VM guest. The queue pointer registers are mapped in both PF and
169 * VF BARs such that an 8K region provides access to a single RX, TX
170 * and event queue (collectively a Virtual Interface, VI or VNIC).
171 *
172 * The PF has access to all 1024 VIs while VFs are mapped to VIs
173 * according to VI_BASE and VI_SCALE: VF i has access to VIs numbered
174 * in range [VI_BASE + i << VI_SCALE, VI_BASE + i + 1 << VI_SCALE).
175 * The number of VIs and the VI_SCALE value are configurable but must
176 * be established at boot time by firmware.
177 */
178
179 /* Maximum VI_SCALE parameter supported by Siena */
180 #define EFX_VI_SCALE_MAX 6
181 /* Base VI to use for SR-IOV. Must be aligned to (1 << EFX_VI_SCALE_MAX),
182 * so this is the smallest allowed value. */
183 #define EFX_VI_BASE 128U
184 /* Maximum number of VFs allowed */
185 #define EFX_VF_COUNT_MAX 127
186 /* Limit EVQs on VFs to be only 8k to reduce buffer table reservation */
187 #define EFX_MAX_VF_EVQ_SIZE 8192UL
188 /* The number of buffer table entries reserved for each VI on a VF */
189 #define EFX_VF_BUFTBL_PER_VI \
190 ((EFX_MAX_VF_EVQ_SIZE + 2 * EFX_MAX_DMAQ_SIZE) * \
191 sizeof(efx_qword_t) / EFX_BUF_SIZE)
192
193 #ifdef CONFIG_SFC_SRIOV
194
efx_sriov_wanted(struct efx_nic * efx)195 static inline bool efx_sriov_wanted(struct efx_nic *efx)
196 {
197 return efx->vf_count != 0;
198 }
efx_sriov_enabled(struct efx_nic * efx)199 static inline bool efx_sriov_enabled(struct efx_nic *efx)
200 {
201 return efx->vf_init_count != 0;
202 }
efx_vf_size(struct efx_nic * efx)203 static inline unsigned int efx_vf_size(struct efx_nic *efx)
204 {
205 return 1 << efx->vi_scale;
206 }
207
208 extern int efx_init_sriov(void);
209 extern void efx_sriov_probe(struct efx_nic *efx);
210 extern int efx_sriov_init(struct efx_nic *efx);
211 extern void efx_sriov_mac_address_changed(struct efx_nic *efx);
212 extern void efx_sriov_tx_flush_done(struct efx_nic *efx, efx_qword_t *event);
213 extern void efx_sriov_rx_flush_done(struct efx_nic *efx, efx_qword_t *event);
214 extern void efx_sriov_event(struct efx_channel *channel, efx_qword_t *event);
215 extern void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq);
216 extern void efx_sriov_flr(struct efx_nic *efx, unsigned flr);
217 extern void efx_sriov_reset(struct efx_nic *efx);
218 extern void efx_sriov_fini(struct efx_nic *efx);
219 extern void efx_fini_sriov(void);
220
221 #else
222
efx_sriov_wanted(struct efx_nic * efx)223 static inline bool efx_sriov_wanted(struct efx_nic *efx) { return false; }
efx_sriov_enabled(struct efx_nic * efx)224 static inline bool efx_sriov_enabled(struct efx_nic *efx) { return false; }
efx_vf_size(struct efx_nic * efx)225 static inline unsigned int efx_vf_size(struct efx_nic *efx) { return 0; }
226
efx_init_sriov(void)227 static inline int efx_init_sriov(void) { return 0; }
efx_sriov_probe(struct efx_nic * efx)228 static inline void efx_sriov_probe(struct efx_nic *efx) {}
efx_sriov_init(struct efx_nic * efx)229 static inline int efx_sriov_init(struct efx_nic *efx) { return -EOPNOTSUPP; }
efx_sriov_mac_address_changed(struct efx_nic * efx)230 static inline void efx_sriov_mac_address_changed(struct efx_nic *efx) {}
efx_sriov_tx_flush_done(struct efx_nic * efx,efx_qword_t * event)231 static inline void efx_sriov_tx_flush_done(struct efx_nic *efx,
232 efx_qword_t *event) {}
efx_sriov_rx_flush_done(struct efx_nic * efx,efx_qword_t * event)233 static inline void efx_sriov_rx_flush_done(struct efx_nic *efx,
234 efx_qword_t *event) {}
efx_sriov_event(struct efx_channel * channel,efx_qword_t * event)235 static inline void efx_sriov_event(struct efx_channel *channel,
236 efx_qword_t *event) {}
efx_sriov_desc_fetch_err(struct efx_nic * efx,unsigned dmaq)237 static inline void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq) {}
efx_sriov_flr(struct efx_nic * efx,unsigned flr)238 static inline void efx_sriov_flr(struct efx_nic *efx, unsigned flr) {}
efx_sriov_reset(struct efx_nic * efx)239 static inline void efx_sriov_reset(struct efx_nic *efx) {}
efx_sriov_fini(struct efx_nic * efx)240 static inline void efx_sriov_fini(struct efx_nic *efx) {}
efx_fini_sriov(void)241 static inline void efx_fini_sriov(void) {}
242
243 #endif
244
245 extern int efx_sriov_set_vf_mac(struct net_device *dev, int vf, u8 *mac);
246 extern int efx_sriov_set_vf_vlan(struct net_device *dev, int vf,
247 u16 vlan, u8 qos);
248 extern int efx_sriov_get_vf_config(struct net_device *dev, int vf,
249 struct ifla_vf_info *ivf);
250 extern int efx_sriov_set_vf_spoofchk(struct net_device *net_dev, int vf,
251 bool spoofchk);
252
253 extern const struct efx_nic_type falcon_a1_nic_type;
254 extern const struct efx_nic_type falcon_b0_nic_type;
255 extern const struct efx_nic_type siena_a0_nic_type;
256
257 /**************************************************************************
258 *
259 * Externs
260 *
261 **************************************************************************
262 */
263
264 extern int falcon_probe_board(struct efx_nic *efx, u16 revision_info);
265
266 /* TX data path */
267 extern int efx_nic_probe_tx(struct efx_tx_queue *tx_queue);
268 extern void efx_nic_init_tx(struct efx_tx_queue *tx_queue);
269 extern void efx_nic_fini_tx(struct efx_tx_queue *tx_queue);
270 extern void efx_nic_remove_tx(struct efx_tx_queue *tx_queue);
271 extern void efx_nic_push_buffers(struct efx_tx_queue *tx_queue);
272
273 /* RX data path */
274 extern int efx_nic_probe_rx(struct efx_rx_queue *rx_queue);
275 extern void efx_nic_init_rx(struct efx_rx_queue *rx_queue);
276 extern void efx_nic_fini_rx(struct efx_rx_queue *rx_queue);
277 extern void efx_nic_remove_rx(struct efx_rx_queue *rx_queue);
278 extern void efx_nic_notify_rx_desc(struct efx_rx_queue *rx_queue);
279 extern void efx_nic_generate_fill_event(struct efx_rx_queue *rx_queue);
280
281 /* Event data path */
282 extern int efx_nic_probe_eventq(struct efx_channel *channel);
283 extern void efx_nic_init_eventq(struct efx_channel *channel);
284 extern void efx_nic_fini_eventq(struct efx_channel *channel);
285 extern void efx_nic_remove_eventq(struct efx_channel *channel);
286 extern int efx_nic_process_eventq(struct efx_channel *channel, int rx_quota);
287 extern void efx_nic_eventq_read_ack(struct efx_channel *channel);
288 extern bool efx_nic_event_present(struct efx_channel *channel);
289
290 /* MAC/PHY */
291 extern void falcon_drain_tx_fifo(struct efx_nic *efx);
292 extern void falcon_reconfigure_mac_wrapper(struct efx_nic *efx);
293 extern bool falcon_xmac_check_fault(struct efx_nic *efx);
294 extern int falcon_reconfigure_xmac(struct efx_nic *efx);
295 extern void falcon_update_stats_xmac(struct efx_nic *efx);
296
297 /* Interrupts and test events */
298 extern int efx_nic_init_interrupt(struct efx_nic *efx);
299 extern void efx_nic_enable_interrupts(struct efx_nic *efx);
300 extern void efx_nic_event_test_start(struct efx_channel *channel);
301 extern void efx_nic_irq_test_start(struct efx_nic *efx);
302 extern void efx_nic_disable_interrupts(struct efx_nic *efx);
303 extern void efx_nic_fini_interrupt(struct efx_nic *efx);
304 extern irqreturn_t efx_nic_fatal_interrupt(struct efx_nic *efx);
305 extern irqreturn_t falcon_legacy_interrupt_a1(int irq, void *dev_id);
306 extern void falcon_irq_ack_a1(struct efx_nic *efx);
307
efx_nic_event_test_irq_cpu(struct efx_channel * channel)308 static inline int efx_nic_event_test_irq_cpu(struct efx_channel *channel)
309 {
310 return ACCESS_ONCE(channel->event_test_cpu);
311 }
efx_nic_irq_test_irq_cpu(struct efx_nic * efx)312 static inline int efx_nic_irq_test_irq_cpu(struct efx_nic *efx)
313 {
314 return ACCESS_ONCE(efx->last_irq_cpu);
315 }
316
317 /* Global Resources */
318 extern int efx_nic_flush_queues(struct efx_nic *efx);
319 extern void siena_prepare_flush(struct efx_nic *efx);
320 extern void siena_finish_flush(struct efx_nic *efx);
321 extern void falcon_start_nic_stats(struct efx_nic *efx);
322 extern void falcon_stop_nic_stats(struct efx_nic *efx);
323 extern void falcon_setup_xaui(struct efx_nic *efx);
324 extern int falcon_reset_xaui(struct efx_nic *efx);
325 extern void
326 efx_nic_dimension_resources(struct efx_nic *efx, unsigned sram_lim_qw);
327 extern void efx_nic_init_common(struct efx_nic *efx);
328 extern void efx_nic_push_rx_indir_table(struct efx_nic *efx);
329
330 int efx_nic_alloc_buffer(struct efx_nic *efx, struct efx_buffer *buffer,
331 unsigned int len);
332 void efx_nic_free_buffer(struct efx_nic *efx, struct efx_buffer *buffer);
333
334 /* Tests */
335 struct efx_nic_register_test {
336 unsigned address;
337 efx_oword_t mask;
338 };
339 extern int efx_nic_test_registers(struct efx_nic *efx,
340 const struct efx_nic_register_test *regs,
341 size_t n_regs);
342
343 extern size_t efx_nic_get_regs_len(struct efx_nic *efx);
344 extern void efx_nic_get_regs(struct efx_nic *efx, void *buf);
345
346 /**************************************************************************
347 *
348 * Falcon MAC stats
349 *
350 **************************************************************************
351 */
352
353 #define FALCON_STAT_OFFSET(falcon_stat) EFX_VAL(falcon_stat, offset)
354 #define FALCON_STAT_WIDTH(falcon_stat) EFX_VAL(falcon_stat, WIDTH)
355
356 /* Retrieve statistic from statistics block */
357 #define FALCON_STAT(efx, falcon_stat, efx_stat) do { \
358 if (FALCON_STAT_WIDTH(falcon_stat) == 16) \
359 (efx)->mac_stats.efx_stat += le16_to_cpu( \
360 *((__force __le16 *) \
361 (efx->stats_buffer.addr + \
362 FALCON_STAT_OFFSET(falcon_stat)))); \
363 else if (FALCON_STAT_WIDTH(falcon_stat) == 32) \
364 (efx)->mac_stats.efx_stat += le32_to_cpu( \
365 *((__force __le32 *) \
366 (efx->stats_buffer.addr + \
367 FALCON_STAT_OFFSET(falcon_stat)))); \
368 else \
369 (efx)->mac_stats.efx_stat += le64_to_cpu( \
370 *((__force __le64 *) \
371 (efx->stats_buffer.addr + \
372 FALCON_STAT_OFFSET(falcon_stat)))); \
373 } while (0)
374
375 #define FALCON_MAC_STATS_SIZE 0x100
376
377 #define MAC_DATA_LBN 0
378 #define MAC_DATA_WIDTH 32
379
380 extern void efx_generate_event(struct efx_nic *efx, unsigned int evq,
381 efx_qword_t *event);
382
383 extern void falcon_poll_xmac(struct efx_nic *efx);
384
385 #endif /* EFX_NIC_H */
386