1 /*
2  * include/asm-mips/vr41xx/irq.h
3  *
4  * Interrupt numbers for NEC VR4100 series.
5  *
6  * Copyright (C) 1999 Michael Klar
7  * Copyright (C) 2001, 2002 Paul Mundt
8  * Copyright (C) 2002 MontaVista Software, Inc.
9  * Copyright (C) 2002 TimeSys Corp.
10  * Copyright (C) 2003-2006 Yoichi Yuasa <yuasa@linux-mips.org>
11  *
12  * This program is free software; you can redistribute it and/or modify it
13  * under the terms of the GNU General Public License as published by the
14  * Free Software Foundation; either version 2 of the License, or (at your
15  * option) any later version.
16  */
17 #ifndef __NEC_VR41XX_IRQ_H
18 #define __NEC_VR41XX_IRQ_H
19 
20 /*
21  * CPU core Interrupt Numbers
22  */
23 #define MIPS_CPU_IRQ_BASE	0
24 #define MIPS_CPU_IRQ(x)		(MIPS_CPU_IRQ_BASE + (x))
25 #define MIPS_SOFTINT0_IRQ	MIPS_CPU_IRQ(0)
26 #define MIPS_SOFTINT1_IRQ	MIPS_CPU_IRQ(1)
27 #define INT0_IRQ		MIPS_CPU_IRQ(2)
28 #define INT1_IRQ		MIPS_CPU_IRQ(3)
29 #define INT2_IRQ		MIPS_CPU_IRQ(4)
30 #define INT3_IRQ		MIPS_CPU_IRQ(5)
31 #define INT4_IRQ		MIPS_CPU_IRQ(6)
32 #define TIMER_IRQ		MIPS_CPU_IRQ(7)
33 
34 /*
35  * SYINT1 Interrupt Numbers
36  */
37 #define SYSINT1_IRQ_BASE	8
38 #define SYSINT1_IRQ(x)		(SYSINT1_IRQ_BASE + (x))
39 #define BATTRY_IRQ		SYSINT1_IRQ(0)
40 #define POWER_IRQ		SYSINT1_IRQ(1)
41 #define RTCLONG1_IRQ		SYSINT1_IRQ(2)
42 #define ELAPSEDTIME_IRQ		SYSINT1_IRQ(3)
43 /* RFU */
44 #define PIU_IRQ			SYSINT1_IRQ(5)
45 #define AIU_IRQ			SYSINT1_IRQ(6)
46 #define KIU_IRQ			SYSINT1_IRQ(7)
47 #define GIUINT_IRQ		SYSINT1_IRQ(8)
48 #define SIU_IRQ			SYSINT1_IRQ(9)
49 #define BUSERR_IRQ		SYSINT1_IRQ(10)
50 #define SOFTINT_IRQ		SYSINT1_IRQ(11)
51 #define CLKRUN_IRQ		SYSINT1_IRQ(12)
52 #define DOZEPIU_IRQ		SYSINT1_IRQ(13)
53 #define SYSINT1_IRQ_LAST	DOZEPIU_IRQ
54 
55 /*
56  * SYSINT2 Interrupt Numbers
57  */
58 #define SYSINT2_IRQ_BASE	24
59 #define SYSINT2_IRQ(x)		(SYSINT2_IRQ_BASE + (x))
60 #define RTCLONG2_IRQ		SYSINT2_IRQ(0)
61 #define LED_IRQ			SYSINT2_IRQ(1)
62 #define HSP_IRQ			SYSINT2_IRQ(2)
63 #define TCLOCK_IRQ		SYSINT2_IRQ(3)
64 #define FIR_IRQ			SYSINT2_IRQ(4)
65 #define CEU_IRQ			SYSINT2_IRQ(4)	/* same number as FIR_IRQ */
66 #define DSIU_IRQ		SYSINT2_IRQ(5)
67 #define PCI_IRQ			SYSINT2_IRQ(6)
68 #define SCU_IRQ			SYSINT2_IRQ(7)
69 #define CSI_IRQ			SYSINT2_IRQ(8)
70 #define BCU_IRQ			SYSINT2_IRQ(9)
71 #define ETHERNET_IRQ		SYSINT2_IRQ(10)
72 #define SYSINT2_IRQ_LAST	ETHERNET_IRQ
73 
74 /*
75  * GIU Interrupt Numbers
76  */
77 #define GIU_IRQ_BASE		40
78 #define GIU_IRQ(x)		(GIU_IRQ_BASE + (x))	/* IRQ 40-71 */
79 #define GIU_IRQ_LAST		GIU_IRQ(31)
80 
81 /*
82  * VRC4173 Interrupt Numbers
83  */
84 #define VRC4173_IRQ_BASE	72
85 #define VRC4173_IRQ(x)		(VRC4173_IRQ_BASE + (x))
86 #define VRC4173_USB_IRQ		VRC4173_IRQ(0)
87 #define VRC4173_PCMCIA2_IRQ	VRC4173_IRQ(1)
88 #define VRC4173_PCMCIA1_IRQ	VRC4173_IRQ(2)
89 #define VRC4173_PS2CH2_IRQ	VRC4173_IRQ(3)
90 #define VRC4173_PS2CH1_IRQ	VRC4173_IRQ(4)
91 #define VRC4173_PIU_IRQ		VRC4173_IRQ(5)
92 #define VRC4173_AIU_IRQ		VRC4173_IRQ(6)
93 #define VRC4173_KIU_IRQ		VRC4173_IRQ(7)
94 #define VRC4173_GIU_IRQ		VRC4173_IRQ(8)
95 #define VRC4173_AC97_IRQ	VRC4173_IRQ(9)
96 #define VRC4173_AC97INT1_IRQ	VRC4173_IRQ(10)
97 /* RFU */
98 #define VRC4173_DOZEPIU_IRQ	VRC4173_IRQ(13)
99 #define VRC4173_IRQ_LAST	VRC4173_DOZEPIU_IRQ
100 
101 #endif /* __NEC_VR41XX_IRQ_H */
102