1 /* 2 * IO mappings for OMAP2+ 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License as published by the 6 * Free Software Foundation; either version 2 of the License, or (at your 7 * option) any later version. 8 * 9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 19 * 20 * You should have received a copy of the GNU General Public License along 21 * with this program; if not, write to the Free Software Foundation, Inc., 22 * 675 Mass Ave, Cambridge, MA 02139, USA. 23 */ 24 25 #define OMAP2_L3_IO_OFFSET 0x90000000 26 #define OMAP2_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */ 27 28 #define OMAP2_L4_IO_OFFSET 0xb2000000 29 #define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */ 30 31 #define OMAP4_L3_IO_OFFSET 0xb4000000 32 #define OMAP4_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_IO_OFFSET) /* L3 */ 33 34 #define AM33XX_L4_WK_IO_OFFSET 0xb5000000 35 #define AM33XX_L4_WK_IO_ADDRESS(pa) IOMEM((pa) + AM33XX_L4_WK_IO_OFFSET) 36 37 #define OMAP4_L3_PER_IO_OFFSET 0xb1100000 38 #define OMAP4_L3_PER_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_PER_IO_OFFSET) 39 40 #define OMAP4_GPMC_IO_OFFSET 0xa9000000 41 #define OMAP4_GPMC_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_GPMC_IO_OFFSET) 42 43 #define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */ 44 #define OMAP2_EMU_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_EMU_IO_OFFSET) 45 46 /* 47 * ---------------------------------------------------------------------------- 48 * Omap2 specific IO mapping 49 * ---------------------------------------------------------------------------- 50 */ 51 52 /* We map both L3 and L4 on OMAP2 */ 53 #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 --> 0xf8000000*/ 54 #define L3_24XX_VIRT (L3_24XX_PHYS + OMAP2_L3_IO_OFFSET) 55 #define L3_24XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */ 56 #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 --> 0xfa000000 */ 57 #define L4_24XX_VIRT (L4_24XX_PHYS + OMAP2_L4_IO_OFFSET) 58 #define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */ 59 60 #define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 --> 0xfb000000 */ 61 #define L4_WK_243X_VIRT (L4_WK_243X_PHYS + OMAP2_L4_IO_OFFSET) 62 #define L4_WK_243X_SIZE SZ_1M 63 #define OMAP243X_GPMC_PHYS OMAP243X_GPMC_BASE 64 #define OMAP243X_GPMC_VIRT (OMAP243X_GPMC_PHYS + OMAP2_L3_IO_OFFSET) 65 /* 0x6e000000 --> 0xfe000000 */ 66 #define OMAP243X_GPMC_SIZE SZ_1M 67 #define OMAP243X_SDRC_PHYS OMAP243X_SDRC_BASE 68 /* 0x6D000000 --> 0xfd000000 */ 69 #define OMAP243X_SDRC_VIRT (OMAP243X_SDRC_PHYS + OMAP2_L3_IO_OFFSET) 70 #define OMAP243X_SDRC_SIZE SZ_1M 71 #define OMAP243X_SMS_PHYS OMAP243X_SMS_BASE 72 /* 0x6c000000 --> 0xfc000000 */ 73 #define OMAP243X_SMS_VIRT (OMAP243X_SMS_PHYS + OMAP2_L3_IO_OFFSET) 74 #define OMAP243X_SMS_SIZE SZ_1M 75 76 /* 2420 IVA */ 77 #define DSP_MEM_2420_PHYS OMAP2420_DSP_MEM_BASE 78 /* 0x58000000 --> 0xfc100000 */ 79 #define DSP_MEM_2420_VIRT 0xfc100000 80 #define DSP_MEM_2420_SIZE 0x28000 81 #define DSP_IPI_2420_PHYS OMAP2420_DSP_IPI_BASE 82 /* 0x59000000 --> 0xfc128000 */ 83 #define DSP_IPI_2420_VIRT 0xfc128000 84 #define DSP_IPI_2420_SIZE SZ_4K 85 #define DSP_MMU_2420_PHYS OMAP2420_DSP_MMU_BASE 86 /* 0x5a000000 --> 0xfc129000 */ 87 #define DSP_MMU_2420_VIRT 0xfc129000 88 #define DSP_MMU_2420_SIZE SZ_4K 89 90 /* 2430 IVA2.1 - currently unmapped */ 91 92 /* 93 * ---------------------------------------------------------------------------- 94 * Omap3 specific IO mapping 95 * ---------------------------------------------------------------------------- 96 */ 97 98 /* We map both L3 and L4 on OMAP3 */ 99 #define L3_34XX_PHYS L3_34XX_BASE /* 0x68000000 --> 0xf8000000 */ 100 #define L3_34XX_VIRT (L3_34XX_PHYS + OMAP2_L3_IO_OFFSET) 101 #define L3_34XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */ 102 103 #define L4_34XX_PHYS L4_34XX_BASE /* 0x48000000 --> 0xfa000000 */ 104 #define L4_34XX_VIRT (L4_34XX_PHYS + OMAP2_L4_IO_OFFSET) 105 #define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */ 106 107 /* 108 * ---------------------------------------------------------------------------- 109 * AM33XX specific IO mapping 110 * ---------------------------------------------------------------------------- 111 */ 112 #define L4_WK_AM33XX_PHYS L4_WK_AM33XX_BASE 113 #define L4_WK_AM33XX_VIRT (L4_WK_AM33XX_PHYS + AM33XX_L4_WK_IO_OFFSET) 114 #define L4_WK_AM33XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */ 115 116 /* 117 * Need to look at the Size 4M for L4. 118 * VPOM3430 was not working for Int controller 119 */ 120 121 #define L4_PER_34XX_PHYS L4_PER_34XX_BASE 122 /* 0x49000000 --> 0xfb000000 */ 123 #define L4_PER_34XX_VIRT (L4_PER_34XX_PHYS + OMAP2_L4_IO_OFFSET) 124 #define L4_PER_34XX_SIZE SZ_1M 125 126 #define L4_EMU_34XX_PHYS L4_EMU_34XX_BASE 127 /* 0x54000000 --> 0xfe800000 */ 128 #define L4_EMU_34XX_VIRT (L4_EMU_34XX_PHYS + OMAP2_EMU_IO_OFFSET) 129 #define L4_EMU_34XX_SIZE SZ_8M 130 131 #define OMAP34XX_GPMC_PHYS OMAP34XX_GPMC_BASE 132 /* 0x6e000000 --> 0xfe000000 */ 133 #define OMAP34XX_GPMC_VIRT (OMAP34XX_GPMC_PHYS + OMAP2_L3_IO_OFFSET) 134 #define OMAP34XX_GPMC_SIZE SZ_1M 135 136 #define OMAP343X_SMS_PHYS OMAP343X_SMS_BASE 137 /* 0x6c000000 --> 0xfc000000 */ 138 #define OMAP343X_SMS_VIRT (OMAP343X_SMS_PHYS + OMAP2_L3_IO_OFFSET) 139 #define OMAP343X_SMS_SIZE SZ_1M 140 141 #define OMAP343X_SDRC_PHYS OMAP343X_SDRC_BASE 142 /* 0x6D000000 --> 0xfd000000 */ 143 #define OMAP343X_SDRC_VIRT (OMAP343X_SDRC_PHYS + OMAP2_L3_IO_OFFSET) 144 #define OMAP343X_SDRC_SIZE SZ_1M 145 146 /* 3430 IVA - currently unmapped */ 147 148 /* 149 * ---------------------------------------------------------------------------- 150 * Omap4 specific IO mapping 151 * ---------------------------------------------------------------------------- 152 */ 153 154 /* We map both L3 and L4 on OMAP4 */ 155 #define L3_44XX_PHYS L3_44XX_BASE /* 0x44000000 --> 0xf8000000 */ 156 #define L3_44XX_VIRT (L3_44XX_PHYS + OMAP4_L3_IO_OFFSET) 157 #define L3_44XX_SIZE SZ_1M 158 159 #define L4_44XX_PHYS L4_44XX_BASE /* 0x4a000000 --> 0xfc000000 */ 160 #define L4_44XX_VIRT (L4_44XX_PHYS + OMAP2_L4_IO_OFFSET) 161 #define L4_44XX_SIZE SZ_4M 162 163 #define L4_PER_44XX_PHYS L4_PER_44XX_BASE 164 /* 0x48000000 --> 0xfa000000 */ 165 #define L4_PER_44XX_VIRT (L4_PER_44XX_PHYS + OMAP2_L4_IO_OFFSET) 166 #define L4_PER_44XX_SIZE SZ_4M 167 168 #define L4_ABE_44XX_PHYS L4_ABE_44XX_BASE 169 /* 0x49000000 --> 0xfb000000 */ 170 #define L4_ABE_44XX_VIRT (L4_ABE_44XX_PHYS + OMAP2_L4_IO_OFFSET) 171 #define L4_ABE_44XX_SIZE SZ_1M 172 173 #define L4_EMU_44XX_PHYS L4_EMU_44XX_BASE 174 /* 0x54000000 --> 0xfe800000 */ 175 #define L4_EMU_44XX_VIRT (L4_EMU_44XX_PHYS + OMAP2_EMU_IO_OFFSET) 176 #define L4_EMU_44XX_SIZE SZ_8M 177 178 #define OMAP44XX_GPMC_PHYS OMAP44XX_GPMC_BASE 179 /* 0x50000000 --> 0xf9000000 */ 180 #define OMAP44XX_GPMC_VIRT (OMAP44XX_GPMC_PHYS + OMAP4_GPMC_IO_OFFSET) 181 #define OMAP44XX_GPMC_SIZE SZ_1M 182 183 184 #define OMAP44XX_EMIF1_PHYS OMAP44XX_EMIF1_BASE 185 /* 0x4c000000 --> 0xfd100000 */ 186 #define OMAP44XX_EMIF1_VIRT (OMAP44XX_EMIF1_PHYS + OMAP4_L3_PER_IO_OFFSET) 187 #define OMAP44XX_EMIF1_SIZE SZ_1M 188 189 #define OMAP44XX_EMIF2_PHYS OMAP44XX_EMIF2_BASE 190 /* 0x4d000000 --> 0xfd200000 */ 191 #define OMAP44XX_EMIF2_SIZE SZ_1M 192 #define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF1_VIRT + OMAP44XX_EMIF1_SIZE) 193 194 #define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE 195 /* 0x4e000000 --> 0xfd300000 */ 196 #define OMAP44XX_DMM_SIZE SZ_1M 197 #define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + OMAP44XX_EMIF2_SIZE) 198