1 /*
2 * linux/kernel/irq/chip.c
3 *
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
6 *
7 * This file contains the core interrupt handling code, for irq-chip
8 * based architectures.
9 *
10 * Detailed information is available in Documentation/DocBook/genericirq
11 */
12
13 #include <linux/irq.h>
14 #include <linux/msi.h>
15 #include <linux/module.h>
16 #include <linux/interrupt.h>
17 #include <linux/kernel_stat.h>
18
19 #include "internals.h"
20
21 /**
22 * irq_set_chip - set the irq chip for an irq
23 * @irq: irq number
24 * @chip: pointer to irq chip description structure
25 */
irq_set_chip(unsigned int irq,struct irq_chip * chip)26 int irq_set_chip(unsigned int irq, struct irq_chip *chip)
27 {
28 unsigned long flags;
29 struct irq_desc *desc = irq_get_desc_lock(irq, &flags);
30
31 if (!desc)
32 return -EINVAL;
33
34 if (!chip)
35 chip = &no_irq_chip;
36
37 desc->irq_data.chip = chip;
38 irq_put_desc_unlock(desc, flags);
39 /*
40 * For !CONFIG_SPARSE_IRQ make the irq show up in
41 * allocated_irqs. For the CONFIG_SPARSE_IRQ case, it is
42 * already marked, and this call is harmless.
43 */
44 irq_reserve_irq(irq);
45 return 0;
46 }
47 EXPORT_SYMBOL(irq_set_chip);
48
49 /**
50 * irq_set_type - set the irq trigger type for an irq
51 * @irq: irq number
52 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
53 */
irq_set_irq_type(unsigned int irq,unsigned int type)54 int irq_set_irq_type(unsigned int irq, unsigned int type)
55 {
56 unsigned long flags;
57 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags);
58 int ret = 0;
59
60 if (!desc)
61 return -EINVAL;
62
63 type &= IRQ_TYPE_SENSE_MASK;
64 if (type != IRQ_TYPE_NONE)
65 ret = __irq_set_trigger(desc, irq, type);
66 irq_put_desc_busunlock(desc, flags);
67 return ret;
68 }
69 EXPORT_SYMBOL(irq_set_irq_type);
70
71 /**
72 * irq_set_handler_data - set irq handler data for an irq
73 * @irq: Interrupt number
74 * @data: Pointer to interrupt specific data
75 *
76 * Set the hardware irq controller data for an irq
77 */
irq_set_handler_data(unsigned int irq,void * data)78 int irq_set_handler_data(unsigned int irq, void *data)
79 {
80 unsigned long flags;
81 struct irq_desc *desc = irq_get_desc_lock(irq, &flags);
82
83 if (!desc)
84 return -EINVAL;
85 desc->irq_data.handler_data = data;
86 irq_put_desc_unlock(desc, flags);
87 return 0;
88 }
89 EXPORT_SYMBOL(irq_set_handler_data);
90
91 /**
92 * irq_set_msi_desc - set MSI descriptor data for an irq
93 * @irq: Interrupt number
94 * @entry: Pointer to MSI descriptor data
95 *
96 * Set the MSI descriptor entry for an irq
97 */
irq_set_msi_desc(unsigned int irq,struct msi_desc * entry)98 int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
99 {
100 unsigned long flags;
101 struct irq_desc *desc = irq_get_desc_lock(irq, &flags);
102
103 if (!desc)
104 return -EINVAL;
105 desc->irq_data.msi_desc = entry;
106 if (entry)
107 entry->irq = irq;
108 irq_put_desc_unlock(desc, flags);
109 return 0;
110 }
111
112 /**
113 * irq_set_chip_data - set irq chip data for an irq
114 * @irq: Interrupt number
115 * @data: Pointer to chip specific data
116 *
117 * Set the hardware irq chip data for an irq
118 */
irq_set_chip_data(unsigned int irq,void * data)119 int irq_set_chip_data(unsigned int irq, void *data)
120 {
121 unsigned long flags;
122 struct irq_desc *desc = irq_get_desc_lock(irq, &flags);
123
124 if (!desc)
125 return -EINVAL;
126 desc->irq_data.chip_data = data;
127 irq_put_desc_unlock(desc, flags);
128 return 0;
129 }
130 EXPORT_SYMBOL(irq_set_chip_data);
131
irq_get_irq_data(unsigned int irq)132 struct irq_data *irq_get_irq_data(unsigned int irq)
133 {
134 struct irq_desc *desc = irq_to_desc(irq);
135
136 return desc ? &desc->irq_data : NULL;
137 }
138 EXPORT_SYMBOL_GPL(irq_get_irq_data);
139
irq_state_clr_disabled(struct irq_desc * desc)140 static void irq_state_clr_disabled(struct irq_desc *desc)
141 {
142 irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
143 }
144
irq_state_set_disabled(struct irq_desc * desc)145 static void irq_state_set_disabled(struct irq_desc *desc)
146 {
147 irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
148 }
149
irq_state_clr_masked(struct irq_desc * desc)150 static void irq_state_clr_masked(struct irq_desc *desc)
151 {
152 irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
153 }
154
irq_state_set_masked(struct irq_desc * desc)155 static void irq_state_set_masked(struct irq_desc *desc)
156 {
157 irqd_set(&desc->irq_data, IRQD_IRQ_MASKED);
158 }
159
irq_startup(struct irq_desc * desc)160 int irq_startup(struct irq_desc *desc)
161 {
162 irq_state_clr_disabled(desc);
163 desc->depth = 0;
164
165 if (desc->irq_data.chip->irq_startup) {
166 int ret = desc->irq_data.chip->irq_startup(&desc->irq_data);
167 irq_state_clr_masked(desc);
168 return ret;
169 }
170
171 irq_enable(desc);
172 return 0;
173 }
174
irq_shutdown(struct irq_desc * desc)175 void irq_shutdown(struct irq_desc *desc)
176 {
177 irq_state_set_disabled(desc);
178 desc->depth = 1;
179 if (desc->irq_data.chip->irq_shutdown)
180 desc->irq_data.chip->irq_shutdown(&desc->irq_data);
181 if (desc->irq_data.chip->irq_disable)
182 desc->irq_data.chip->irq_disable(&desc->irq_data);
183 else
184 desc->irq_data.chip->irq_mask(&desc->irq_data);
185 irq_state_set_masked(desc);
186 }
187
irq_enable(struct irq_desc * desc)188 void irq_enable(struct irq_desc *desc)
189 {
190 irq_state_clr_disabled(desc);
191 if (desc->irq_data.chip->irq_enable)
192 desc->irq_data.chip->irq_enable(&desc->irq_data);
193 else
194 desc->irq_data.chip->irq_unmask(&desc->irq_data);
195 irq_state_clr_masked(desc);
196 }
197
irq_disable(struct irq_desc * desc)198 void irq_disable(struct irq_desc *desc)
199 {
200 irq_state_set_disabled(desc);
201 if (desc->irq_data.chip->irq_disable) {
202 desc->irq_data.chip->irq_disable(&desc->irq_data);
203 irq_state_set_masked(desc);
204 }
205 }
206
mask_ack_irq(struct irq_desc * desc)207 static inline void mask_ack_irq(struct irq_desc *desc)
208 {
209 if (desc->irq_data.chip->irq_mask_ack)
210 desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
211 else {
212 desc->irq_data.chip->irq_mask(&desc->irq_data);
213 if (desc->irq_data.chip->irq_ack)
214 desc->irq_data.chip->irq_ack(&desc->irq_data);
215 }
216 irq_state_set_masked(desc);
217 }
218
mask_irq(struct irq_desc * desc)219 void mask_irq(struct irq_desc *desc)
220 {
221 if (desc->irq_data.chip->irq_mask) {
222 desc->irq_data.chip->irq_mask(&desc->irq_data);
223 irq_state_set_masked(desc);
224 }
225 }
226
unmask_irq(struct irq_desc * desc)227 void unmask_irq(struct irq_desc *desc)
228 {
229 if (desc->irq_data.chip->irq_unmask) {
230 desc->irq_data.chip->irq_unmask(&desc->irq_data);
231 irq_state_clr_masked(desc);
232 }
233 }
234
235 /*
236 * handle_nested_irq - Handle a nested irq from a irq thread
237 * @irq: the interrupt number
238 *
239 * Handle interrupts which are nested into a threaded interrupt
240 * handler. The handler function is called inside the calling
241 * threads context.
242 */
handle_nested_irq(unsigned int irq)243 void handle_nested_irq(unsigned int irq)
244 {
245 struct irq_desc *desc = irq_to_desc(irq);
246 struct irqaction *action;
247 irqreturn_t action_ret;
248
249 might_sleep();
250
251 raw_spin_lock_irq(&desc->lock);
252
253 kstat_incr_irqs_this_cpu(irq, desc);
254
255 action = desc->action;
256 if (unlikely(!action || irqd_irq_disabled(&desc->irq_data)))
257 goto out_unlock;
258
259 irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
260 raw_spin_unlock_irq(&desc->lock);
261
262 action_ret = action->thread_fn(action->irq, action->dev_id);
263 if (!noirqdebug)
264 note_interrupt(irq, desc, action_ret);
265
266 raw_spin_lock_irq(&desc->lock);
267 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
268
269 out_unlock:
270 raw_spin_unlock_irq(&desc->lock);
271 }
272 EXPORT_SYMBOL_GPL(handle_nested_irq);
273
irq_check_poll(struct irq_desc * desc)274 static bool irq_check_poll(struct irq_desc *desc)
275 {
276 if (!(desc->istate & IRQS_POLL_INPROGRESS))
277 return false;
278 return irq_wait_for_poll(desc);
279 }
280
281 /**
282 * handle_simple_irq - Simple and software-decoded IRQs.
283 * @irq: the interrupt number
284 * @desc: the interrupt description structure for this irq
285 *
286 * Simple interrupts are either sent from a demultiplexing interrupt
287 * handler or come from hardware, where no interrupt hardware control
288 * is necessary.
289 *
290 * Note: The caller is expected to handle the ack, clear, mask and
291 * unmask issues if necessary.
292 */
293 void
handle_simple_irq(unsigned int irq,struct irq_desc * desc)294 handle_simple_irq(unsigned int irq, struct irq_desc *desc)
295 {
296 raw_spin_lock(&desc->lock);
297
298 if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
299 if (!irq_check_poll(desc))
300 goto out_unlock;
301
302 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
303 kstat_incr_irqs_this_cpu(irq, desc);
304
305 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data)))
306 goto out_unlock;
307
308 handle_irq_event(desc);
309
310 out_unlock:
311 raw_spin_unlock(&desc->lock);
312 }
313
314 /**
315 * handle_level_irq - Level type irq handler
316 * @irq: the interrupt number
317 * @desc: the interrupt description structure for this irq
318 *
319 * Level type interrupts are active as long as the hardware line has
320 * the active level. This may require to mask the interrupt and unmask
321 * it after the associated handler has acknowledged the device, so the
322 * interrupt line is back to inactive.
323 */
324 void
handle_level_irq(unsigned int irq,struct irq_desc * desc)325 handle_level_irq(unsigned int irq, struct irq_desc *desc)
326 {
327 raw_spin_lock(&desc->lock);
328 mask_ack_irq(desc);
329
330 if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
331 if (!irq_check_poll(desc))
332 goto out_unlock;
333
334 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
335 kstat_incr_irqs_this_cpu(irq, desc);
336
337 /*
338 * If its disabled or no action available
339 * keep it masked and get out of here
340 */
341 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data)))
342 goto out_unlock;
343
344 handle_irq_event(desc);
345
346 if (!irqd_irq_disabled(&desc->irq_data) && !(desc->istate & IRQS_ONESHOT))
347 unmask_irq(desc);
348 out_unlock:
349 raw_spin_unlock(&desc->lock);
350 }
351 EXPORT_SYMBOL_GPL(handle_level_irq);
352
353 #ifdef CONFIG_IRQ_PREFLOW_FASTEOI
preflow_handler(struct irq_desc * desc)354 static inline void preflow_handler(struct irq_desc *desc)
355 {
356 if (desc->preflow_handler)
357 desc->preflow_handler(&desc->irq_data);
358 }
359 #else
preflow_handler(struct irq_desc * desc)360 static inline void preflow_handler(struct irq_desc *desc) { }
361 #endif
362
363 /**
364 * handle_fasteoi_irq - irq handler for transparent controllers
365 * @irq: the interrupt number
366 * @desc: the interrupt description structure for this irq
367 *
368 * Only a single callback will be issued to the chip: an ->eoi()
369 * call when the interrupt has been serviced. This enables support
370 * for modern forms of interrupt handlers, which handle the flow
371 * details in hardware, transparently.
372 */
373 void
handle_fasteoi_irq(unsigned int irq,struct irq_desc * desc)374 handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
375 {
376 raw_spin_lock(&desc->lock);
377
378 if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
379 if (!irq_check_poll(desc))
380 goto out;
381
382 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
383 kstat_incr_irqs_this_cpu(irq, desc);
384
385 /*
386 * If its disabled or no action available
387 * then mask it and get out of here:
388 */
389 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
390 desc->istate |= IRQS_PENDING;
391 mask_irq(desc);
392 goto out;
393 }
394
395 if (desc->istate & IRQS_ONESHOT)
396 mask_irq(desc);
397
398 preflow_handler(desc);
399 handle_irq_event(desc);
400
401 out_eoi:
402 desc->irq_data.chip->irq_eoi(&desc->irq_data);
403 out_unlock:
404 raw_spin_unlock(&desc->lock);
405 return;
406 out:
407 if (!(desc->irq_data.chip->flags & IRQCHIP_EOI_IF_HANDLED))
408 goto out_eoi;
409 goto out_unlock;
410 }
411
412 /**
413 * handle_edge_irq - edge type IRQ handler
414 * @irq: the interrupt number
415 * @desc: the interrupt description structure for this irq
416 *
417 * Interrupt occures on the falling and/or rising edge of a hardware
418 * signal. The occurrence is latched into the irq controller hardware
419 * and must be acked in order to be reenabled. After the ack another
420 * interrupt can happen on the same source even before the first one
421 * is handled by the associated event handler. If this happens it
422 * might be necessary to disable (mask) the interrupt depending on the
423 * controller hardware. This requires to reenable the interrupt inside
424 * of the loop which handles the interrupts which have arrived while
425 * the handler was running. If all pending interrupts are handled, the
426 * loop is left.
427 */
428 void
handle_edge_irq(unsigned int irq,struct irq_desc * desc)429 handle_edge_irq(unsigned int irq, struct irq_desc *desc)
430 {
431 raw_spin_lock(&desc->lock);
432
433 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
434 /*
435 * If we're currently running this IRQ, or its disabled,
436 * we shouldn't process the IRQ. Mark it pending, handle
437 * the necessary masking and go out
438 */
439 if (unlikely(irqd_irq_disabled(&desc->irq_data) ||
440 irqd_irq_inprogress(&desc->irq_data) || !desc->action)) {
441 if (!irq_check_poll(desc)) {
442 desc->istate |= IRQS_PENDING;
443 mask_ack_irq(desc);
444 goto out_unlock;
445 }
446 }
447 kstat_incr_irqs_this_cpu(irq, desc);
448
449 /* Start handling the irq */
450 desc->irq_data.chip->irq_ack(&desc->irq_data);
451
452 do {
453 if (unlikely(!desc->action)) {
454 mask_irq(desc);
455 goto out_unlock;
456 }
457
458 /*
459 * When another irq arrived while we were handling
460 * one, we could have masked the irq.
461 * Renable it, if it was not disabled in meantime.
462 */
463 if (unlikely(desc->istate & IRQS_PENDING)) {
464 if (!irqd_irq_disabled(&desc->irq_data) &&
465 irqd_irq_masked(&desc->irq_data))
466 unmask_irq(desc);
467 }
468
469 handle_irq_event(desc);
470
471 } while ((desc->istate & IRQS_PENDING) &&
472 !irqd_irq_disabled(&desc->irq_data));
473
474 out_unlock:
475 raw_spin_unlock(&desc->lock);
476 }
477
478 #ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
479 /**
480 * handle_edge_eoi_irq - edge eoi type IRQ handler
481 * @irq: the interrupt number
482 * @desc: the interrupt description structure for this irq
483 *
484 * Similar as the above handle_edge_irq, but using eoi and w/o the
485 * mask/unmask logic.
486 */
handle_edge_eoi_irq(unsigned int irq,struct irq_desc * desc)487 void handle_edge_eoi_irq(unsigned int irq, struct irq_desc *desc)
488 {
489 struct irq_chip *chip = irq_desc_get_chip(desc);
490
491 raw_spin_lock(&desc->lock);
492
493 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
494 /*
495 * If we're currently running this IRQ, or its disabled,
496 * we shouldn't process the IRQ. Mark it pending, handle
497 * the necessary masking and go out
498 */
499 if (unlikely(irqd_irq_disabled(&desc->irq_data) ||
500 irqd_irq_inprogress(&desc->irq_data) || !desc->action)) {
501 if (!irq_check_poll(desc)) {
502 desc->istate |= IRQS_PENDING;
503 goto out_eoi;
504 }
505 }
506 kstat_incr_irqs_this_cpu(irq, desc);
507
508 do {
509 if (unlikely(!desc->action))
510 goto out_eoi;
511
512 handle_irq_event(desc);
513
514 } while ((desc->istate & IRQS_PENDING) &&
515 !irqd_irq_disabled(&desc->irq_data));
516
517 out_eoi:
518 chip->irq_eoi(&desc->irq_data);
519 raw_spin_unlock(&desc->lock);
520 }
521 #endif
522
523 /**
524 * handle_percpu_irq - Per CPU local irq handler
525 * @irq: the interrupt number
526 * @desc: the interrupt description structure for this irq
527 *
528 * Per CPU interrupts on SMP machines without locking requirements
529 */
530 void
handle_percpu_irq(unsigned int irq,struct irq_desc * desc)531 handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
532 {
533 struct irq_chip *chip = irq_desc_get_chip(desc);
534
535 kstat_incr_irqs_this_cpu(irq, desc);
536
537 if (chip->irq_ack)
538 chip->irq_ack(&desc->irq_data);
539
540 handle_irq_event_percpu(desc, desc->action);
541
542 if (chip->irq_eoi)
543 chip->irq_eoi(&desc->irq_data);
544 }
545
546 void
__irq_set_handler(unsigned int irq,irq_flow_handler_t handle,int is_chained,const char * name)547 __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
548 const char *name)
549 {
550 unsigned long flags;
551 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags);
552
553 if (!desc)
554 return;
555
556 if (!handle) {
557 handle = handle_bad_irq;
558 } else {
559 if (WARN_ON(desc->irq_data.chip == &no_irq_chip))
560 goto out;
561 }
562
563 /* Uninstall? */
564 if (handle == handle_bad_irq) {
565 if (desc->irq_data.chip != &no_irq_chip)
566 mask_ack_irq(desc);
567 irq_state_set_disabled(desc);
568 desc->depth = 1;
569 }
570 desc->handle_irq = handle;
571 desc->name = name;
572
573 if (handle != handle_bad_irq && is_chained) {
574 irq_settings_set_noprobe(desc);
575 irq_settings_set_norequest(desc);
576 irq_startup(desc);
577 }
578 out:
579 irq_put_desc_busunlock(desc, flags);
580 }
581 EXPORT_SYMBOL_GPL(__irq_set_handler);
582
583 void
irq_set_chip_and_handler_name(unsigned int irq,struct irq_chip * chip,irq_flow_handler_t handle,const char * name)584 irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
585 irq_flow_handler_t handle, const char *name)
586 {
587 irq_set_chip(irq, chip);
588 __irq_set_handler(irq, handle, 0, name);
589 }
590
irq_modify_status(unsigned int irq,unsigned long clr,unsigned long set)591 void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
592 {
593 unsigned long flags;
594 struct irq_desc *desc = irq_get_desc_lock(irq, &flags);
595
596 if (!desc)
597 return;
598 irq_settings_clr_and_set(desc, clr, set);
599
600 irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
601 IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
602 if (irq_settings_has_no_balance_set(desc))
603 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
604 if (irq_settings_is_per_cpu(desc))
605 irqd_set(&desc->irq_data, IRQD_PER_CPU);
606 if (irq_settings_can_move_pcntxt(desc))
607 irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
608 if (irq_settings_is_level(desc))
609 irqd_set(&desc->irq_data, IRQD_LEVEL);
610
611 irqd_set(&desc->irq_data, irq_settings_get_trigger_mask(desc));
612
613 irq_put_desc_unlock(desc, flags);
614 }
615
616 /**
617 * irq_cpu_online - Invoke all irq_cpu_online functions.
618 *
619 * Iterate through all irqs and invoke the chip.irq_cpu_online()
620 * for each.
621 */
irq_cpu_online(void)622 void irq_cpu_online(void)
623 {
624 struct irq_desc *desc;
625 struct irq_chip *chip;
626 unsigned long flags;
627 unsigned int irq;
628
629 for_each_active_irq(irq) {
630 desc = irq_to_desc(irq);
631 if (!desc)
632 continue;
633
634 raw_spin_lock_irqsave(&desc->lock, flags);
635
636 chip = irq_data_get_irq_chip(&desc->irq_data);
637 if (chip && chip->irq_cpu_online &&
638 (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
639 !irqd_irq_disabled(&desc->irq_data)))
640 chip->irq_cpu_online(&desc->irq_data);
641
642 raw_spin_unlock_irqrestore(&desc->lock, flags);
643 }
644 }
645
646 /**
647 * irq_cpu_offline - Invoke all irq_cpu_offline functions.
648 *
649 * Iterate through all irqs and invoke the chip.irq_cpu_offline()
650 * for each.
651 */
irq_cpu_offline(void)652 void irq_cpu_offline(void)
653 {
654 struct irq_desc *desc;
655 struct irq_chip *chip;
656 unsigned long flags;
657 unsigned int irq;
658
659 for_each_active_irq(irq) {
660 desc = irq_to_desc(irq);
661 if (!desc)
662 continue;
663
664 raw_spin_lock_irqsave(&desc->lock, flags);
665
666 chip = irq_data_get_irq_chip(&desc->irq_data);
667 if (chip && chip->irq_cpu_offline &&
668 (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
669 !irqd_irq_disabled(&desc->irq_data)))
670 chip->irq_cpu_offline(&desc->irq_data);
671
672 raw_spin_unlock_irqrestore(&desc->lock, flags);
673 }
674 }
675