1 /* 2 * Copyright (C) 2007-2009 ST-Ericsson AB 3 * License terms: GNU General Public License (GPL) version 2 4 * AB3100 core access functions 5 * Author: Linus Walleij <linus.walleij@stericsson.com> 6 * 7 * ABX500 core access functions. 8 * The abx500 interface is used for the Analog Baseband chip 9 * ab3100, ab3550, ab5500, and ab8500. 10 * 11 * Author: Mattias Wallin <mattias.wallin@stericsson.com> 12 * Author: Mattias Nilsson <mattias.i.nilsson@stericsson.com> 13 * Author: Bengt Jonsson <bengt.g.jonsson@stericsson.com> 14 * Author: Rickard Andersson <rickard.andersson@stericsson.com> 15 */ 16 17 #include <linux/device.h> 18 #include <linux/regulator/machine.h> 19 20 #ifndef MFD_ABX500_H 21 #define MFD_ABX500_H 22 23 #define AB3100_P1A 0xc0 24 #define AB3100_P1B 0xc1 25 #define AB3100_P1C 0xc2 26 #define AB3100_P1D 0xc3 27 #define AB3100_P1E 0xc4 28 #define AB3100_P1F 0xc5 29 #define AB3100_P1G 0xc6 30 #define AB3100_R2A 0xc7 31 #define AB3100_R2B 0xc8 32 #define AB3550_P1A 0x10 33 #define AB5500_1_0 0x20 34 #define AB5500_2_0 0x21 35 #define AB5500_2_1 0x22 36 37 /* 38 * AB3100, EVENTA1, A2 and A3 event register flags 39 * these are catenated into a single 32-bit flag in the code 40 * for event notification broadcasts. 41 */ 42 #define AB3100_EVENTA1_ONSWA (0x01<<16) 43 #define AB3100_EVENTA1_ONSWB (0x02<<16) 44 #define AB3100_EVENTA1_ONSWC (0x04<<16) 45 #define AB3100_EVENTA1_DCIO (0x08<<16) 46 #define AB3100_EVENTA1_OVER_TEMP (0x10<<16) 47 #define AB3100_EVENTA1_SIM_OFF (0x20<<16) 48 #define AB3100_EVENTA1_VBUS (0x40<<16) 49 #define AB3100_EVENTA1_VSET_USB (0x80<<16) 50 51 #define AB3100_EVENTA2_READY_TX (0x01<<8) 52 #define AB3100_EVENTA2_READY_RX (0x02<<8) 53 #define AB3100_EVENTA2_OVERRUN_ERROR (0x04<<8) 54 #define AB3100_EVENTA2_FRAMING_ERROR (0x08<<8) 55 #define AB3100_EVENTA2_CHARG_OVERCURRENT (0x10<<8) 56 #define AB3100_EVENTA2_MIDR (0x20<<8) 57 #define AB3100_EVENTA2_BATTERY_REM (0x40<<8) 58 #define AB3100_EVENTA2_ALARM (0x80<<8) 59 60 #define AB3100_EVENTA3_ADC_TRIG5 (0x01) 61 #define AB3100_EVENTA3_ADC_TRIG4 (0x02) 62 #define AB3100_EVENTA3_ADC_TRIG3 (0x04) 63 #define AB3100_EVENTA3_ADC_TRIG2 (0x08) 64 #define AB3100_EVENTA3_ADC_TRIGVBAT (0x10) 65 #define AB3100_EVENTA3_ADC_TRIGVTX (0x20) 66 #define AB3100_EVENTA3_ADC_TRIG1 (0x40) 67 #define AB3100_EVENTA3_ADC_TRIG0 (0x80) 68 69 /* AB3100, STR register flags */ 70 #define AB3100_STR_ONSWA (0x01) 71 #define AB3100_STR_ONSWB (0x02) 72 #define AB3100_STR_ONSWC (0x04) 73 #define AB3100_STR_DCIO (0x08) 74 #define AB3100_STR_BOOT_MODE (0x10) 75 #define AB3100_STR_SIM_OFF (0x20) 76 #define AB3100_STR_BATT_REMOVAL (0x40) 77 #define AB3100_STR_VBUS (0x80) 78 79 /* 80 * AB3100 contains 8 regulators, one external regulator controller 81 * and a buck converter, further the LDO E and buck converter can 82 * have separate settings if they are in sleep mode, this is 83 * modeled as a separate regulator. 84 */ 85 #define AB3100_NUM_REGULATORS 10 86 87 /** 88 * struct ab3100 89 * @access_mutex: lock out concurrent accesses to the AB3100 registers 90 * @dev: pointer to the containing device 91 * @i2c_client: I2C client for this chip 92 * @testreg_client: secondary client for test registers 93 * @chip_name: name of this chip variant 94 * @chip_id: 8 bit chip ID for this chip variant 95 * @event_subscribers: event subscribers are listed here 96 * @startup_events: a copy of the first reading of the event registers 97 * @startup_events_read: whether the first events have been read 98 * 99 * This struct is PRIVATE and devices using it should NOT 100 * access ANY fields. It is used as a token for calling the 101 * AB3100 functions. 102 */ 103 struct ab3100 { 104 struct mutex access_mutex; 105 struct device *dev; 106 struct i2c_client *i2c_client; 107 struct i2c_client *testreg_client; 108 char chip_name[32]; 109 u8 chip_id; 110 struct blocking_notifier_head event_subscribers; 111 u8 startup_events[3]; 112 bool startup_events_read; 113 }; 114 115 /** 116 * struct ab3100_platform_data 117 * Data supplied to initialize board connections to the AB3100 118 * @reg_constraints: regulator constraints for target board 119 * the order of these constraints are: LDO A, C, D, E, 120 * F, G, H, K, EXT and BUCK. 121 * @reg_initvals: initial values for the regulator registers 122 * plus two sleep settings for LDO E and the BUCK converter. 123 * exactly AB3100_NUM_REGULATORS+2 values must be sent in. 124 * Order: LDO A, C, E, E sleep, F, G, H, K, EXT, BUCK, 125 * BUCK sleep, LDO D. (LDO D need to be initialized last.) 126 * @external_voltage: voltage level of the external regulator. 127 */ 128 struct ab3100_platform_data { 129 struct regulator_init_data reg_constraints[AB3100_NUM_REGULATORS]; 130 u8 reg_initvals[AB3100_NUM_REGULATORS+2]; 131 int external_voltage; 132 }; 133 134 int ab3100_event_register(struct ab3100 *ab3100, 135 struct notifier_block *nb); 136 int ab3100_event_unregister(struct ab3100 *ab3100, 137 struct notifier_block *nb); 138 139 /* AB3550, STR register flags */ 140 #define AB3550_STR_ONSWA (0x01) 141 #define AB3550_STR_ONSWB (0x02) 142 #define AB3550_STR_ONSWC (0x04) 143 #define AB3550_STR_DCIO (0x08) 144 #define AB3550_STR_BOOT_MODE (0x10) 145 #define AB3550_STR_SIM_OFF (0x20) 146 #define AB3550_STR_BATT_REMOVAL (0x40) 147 #define AB3550_STR_VBUS (0x80) 148 149 /* Interrupt mask registers */ 150 #define AB3550_IMR1 0x29 151 #define AB3550_IMR2 0x2a 152 #define AB3550_IMR3 0x2b 153 #define AB3550_IMR4 0x2c 154 #define AB3550_IMR5 0x2d 155 156 enum ab3550_devid { 157 AB3550_DEVID_ADC, 158 AB3550_DEVID_DAC, 159 AB3550_DEVID_LEDS, 160 AB3550_DEVID_POWER, 161 AB3550_DEVID_REGULATORS, 162 AB3550_DEVID_SIM, 163 AB3550_DEVID_UART, 164 AB3550_DEVID_RTC, 165 AB3550_DEVID_CHARGER, 166 AB3550_DEVID_FUELGAUGE, 167 AB3550_DEVID_VIBRATOR, 168 AB3550_DEVID_CODEC, 169 AB3550_NUM_DEVICES, 170 }; 171 172 /** 173 * struct abx500_init_setting 174 * Initial value of the registers for driver to use during setup. 175 */ 176 struct abx500_init_settings { 177 u8 bank; 178 u8 reg; 179 u8 setting; 180 }; 181 182 /** 183 * struct ab3550_platform_data 184 * Data supplied to initialize board connections to the AB3550 185 */ 186 struct ab3550_platform_data { 187 struct {unsigned int base; unsigned int count; } irq; 188 void *dev_data[AB3550_NUM_DEVICES]; 189 struct abx500_init_settings *init_settings; 190 unsigned int init_settings_sz; 191 }; 192 193 int abx500_set_register_interruptible(struct device *dev, u8 bank, u8 reg, 194 u8 value); 195 int abx500_get_register_interruptible(struct device *dev, u8 bank, u8 reg, 196 u8 *value); 197 int abx500_get_register_page_interruptible(struct device *dev, u8 bank, 198 u8 first_reg, u8 *regvals, u8 numregs); 199 int abx500_set_register_page_interruptible(struct device *dev, u8 bank, 200 u8 first_reg, u8 *regvals, u8 numregs); 201 /** 202 * abx500_mask_and_set_register_inerruptible() - Modifies selected bits of a 203 * target register 204 * 205 * @dev: The AB sub device. 206 * @bank: The i2c bank number. 207 * @bitmask: The bit mask to use. 208 * @bitvalues: The new bit values. 209 * 210 * Updates the value of an AB register: 211 * value -> ((value & ~bitmask) | (bitvalues & bitmask)) 212 */ 213 int abx500_mask_and_set_register_interruptible(struct device *dev, u8 bank, 214 u8 reg, u8 bitmask, u8 bitvalues); 215 int abx500_get_chip_id(struct device *dev); 216 int abx500_event_registers_startup_state_get(struct device *dev, u8 *event); 217 int abx500_startup_irq_enabled(struct device *dev, unsigned int irq); 218 219 struct abx500_ops { 220 int (*get_chip_id) (struct device *); 221 int (*get_register) (struct device *, u8, u8, u8 *); 222 int (*set_register) (struct device *, u8, u8, u8); 223 int (*get_register_page) (struct device *, u8, u8, u8 *, u8); 224 int (*set_register_page) (struct device *, u8, u8, u8 *, u8); 225 int (*mask_and_set_register) (struct device *, u8, u8, u8, u8); 226 int (*event_registers_startup_state_get) (struct device *, u8 *); 227 int (*startup_irq_enabled) (struct device *, unsigned int); 228 }; 229 230 int abx500_register_ops(struct device *core_dev, struct abx500_ops *ops); 231 void abx500_remove_ops(struct device *dev); 232 #endif 233