1 /* 2 This is part of rtl8180 OpenSource driver. 3 Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it> 4 Released under the terms of GPL (General Public Licence) 5 6 Parts of this driver are based on the GPL part of the 7 official realtek driver 8 9 Parts of this driver are based on the rtl8180 driver skeleton 10 from Patric Schenke & Andres Salomon 11 12 Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver 13 14 We want to tanks the Authors of those projects and the Ndiswrapper 15 project Authors. 16 */ 17 18 #ifndef R8180H 19 #define R8180H 20 21 22 #define RTL8180_MODULE_NAME "r8180" 23 #define DMESG(x,a...) printk(KERN_INFO RTL8180_MODULE_NAME ": " x "\n", ## a) 24 #define DMESGW(x,a...) printk(KERN_WARNING RTL8180_MODULE_NAME ": WW:" x "\n", ## a) 25 #define DMESGE(x,a...) printk(KERN_WARNING RTL8180_MODULE_NAME ": EE:" x "\n", ## a) 26 27 #include <linux/module.h> 28 #include <linux/kernel.h> 29 //#include <linux/config.h> 30 #include <linux/init.h> 31 #include <linux/ioport.h> 32 #include <linux/sched.h> 33 #include <linux/types.h> 34 #include <linux/slab.h> 35 #include <linux/netdevice.h> 36 #include <linux/pci.h> 37 #include <linux/etherdevice.h> 38 #include <linux/delay.h> 39 #include <linux/rtnetlink.h> //for rtnl_lock() 40 #include <linux/wireless.h> 41 #include <linux/timer.h> 42 #include <linux/proc_fs.h> // Necessary because we use the proc fs 43 #include <linux/if_arp.h> 44 #include "ieee80211/ieee80211.h" 45 #include <asm/io.h> 46 //#include <asm/semaphore.h> 47 48 #define EPROM_93c46 0 49 #define EPROM_93c56 1 50 51 #define RTL_IOCTL_WPA_SUPPLICANT SIOCIWFIRSTPRIV+30 52 53 #define DEFAULT_FRAG_THRESHOLD 2342U 54 #define MIN_FRAG_THRESHOLD 256U 55 #define DEFAULT_RTS_THRESHOLD 2342U 56 #define MIN_RTS_THRESHOLD 0U 57 #define MAX_RTS_THRESHOLD 2342U 58 #define DEFAULT_BEACONINTERVAL 0x64U 59 60 #define DEFAULT_RETRY_RTS 7 61 #define DEFAULT_RETRY_DATA 7 62 63 #define BEACON_QUEUE 6 64 65 #define aSifsTime 10 66 67 #define sCrcLng 4 68 #define sAckCtsLng 112 // bits in ACK and CTS frames 69 //+by amy 080312 70 #define RATE_ADAPTIVE_TIMER_PERIOD 300 71 72 typedef enum _WIRELESS_MODE { 73 WIRELESS_MODE_UNKNOWN = 0x00, 74 WIRELESS_MODE_A = 0x01, 75 WIRELESS_MODE_B = 0x02, 76 WIRELESS_MODE_G = 0x04, 77 WIRELESS_MODE_AUTO = 0x08, 78 } WIRELESS_MODE; 79 80 typedef struct ChnlAccessSetting { 81 u16 SIFS_Timer; 82 u16 DIFS_Timer; 83 u16 SlotTimeTimer; 84 u16 EIFS_Timer; 85 u16 CWminIndex; 86 u16 CWmaxIndex; 87 }*PCHANNEL_ACCESS_SETTING,CHANNEL_ACCESS_SETTING; 88 89 typedef enum{ 90 NIC_8185 = 1, 91 NIC_8185B 92 } nic_t; 93 94 typedef u32 AC_CODING; 95 #define AC0_BE 0 // ACI: 0x00 // Best Effort 96 #define AC1_BK 1 // ACI: 0x01 // Background 97 #define AC2_VI 2 // ACI: 0x10 // Video 98 #define AC3_VO 3 // ACI: 0x11 // Voice 99 #define AC_MAX 4 // Max: define total number; Should not to be used as a real enum. 100 101 // 102 // ECWmin/ECWmax field. 103 // Ref: WMM spec 2.2.2: WME Parameter Element, p.13. 104 // 105 typedef union _ECW{ 106 u8 charData; 107 struct 108 { 109 u8 ECWmin:4; 110 u8 ECWmax:4; 111 }f; // Field 112 }ECW, *PECW; 113 114 // 115 // ACI/AIFSN Field. 116 // Ref: WMM spec 2.2.2: WME Parameter Element, p.12. 117 // 118 typedef union _ACI_AIFSN{ 119 u8 charData; 120 121 struct 122 { 123 u8 AIFSN:4; 124 u8 ACM:1; 125 u8 ACI:2; 126 u8 Reserved:1; 127 }f; // Field 128 }ACI_AIFSN, *PACI_AIFSN; 129 130 // 131 // AC Parameters Record Format. 132 // Ref: WMM spec 2.2.2: WME Parameter Element, p.12. 133 // 134 typedef union _AC_PARAM{ 135 u32 longData; 136 u8 charData[4]; 137 138 struct 139 { 140 ACI_AIFSN AciAifsn; 141 ECW Ecw; 142 u16 TXOPLimit; 143 }f; // Field 144 }AC_PARAM, *PAC_PARAM; 145 146 /* it is a wrong definition. -xiong-2006-11-17 147 typedef struct ThreeWireReg { 148 u16 longData; 149 struct { 150 u8 enableB; 151 u8 data; 152 u8 clk; 153 u8 read_write; 154 } struc; 155 } ThreeWireReg; 156 */ 157 158 typedef union _ThreeWire{ 159 struct _ThreeWireStruc{ 160 u16 data:1; 161 u16 clk:1; 162 u16 enableB:1; 163 u16 read_write:1; 164 u16 resv1:12; 165 // u2Byte resv2:14; 166 // u2Byte ThreeWireEnable:1; 167 // u2Byte resv3:1; 168 }struc; 169 u16 longData; 170 }ThreeWireReg; 171 172 173 typedef struct buffer 174 { 175 struct buffer *next; 176 u32 *buf; 177 dma_addr_t dma; 178 } buffer; 179 180 //YJ,modified,080828 181 typedef struct Stats 182 { 183 unsigned long txrdu; 184 unsigned long rxrdu; 185 unsigned long rxnolast; 186 unsigned long rxnodata; 187 // unsigned long rxreset; 188 // unsigned long rxwrkaround; 189 unsigned long rxnopointer; 190 unsigned long txnperr; 191 unsigned long txresumed; 192 unsigned long rxerr; 193 unsigned long rxoverflow; 194 unsigned long rxint; 195 unsigned long txbkpokint; 196 unsigned long txbepoking; 197 unsigned long txbkperr; 198 unsigned long txbeperr; 199 unsigned long txnpokint; 200 unsigned long txhpokint; 201 unsigned long txhperr; 202 unsigned long ints; 203 unsigned long shints; 204 unsigned long txoverflow; 205 unsigned long rxdmafail; 206 unsigned long txbeacon; 207 unsigned long txbeaconerr; 208 unsigned long txlpokint; 209 unsigned long txlperr; 210 unsigned long txretry;//retry number tony 20060601 211 unsigned long rxcrcerrmin;//crc error (0-500) 212 unsigned long rxcrcerrmid;//crc error (500-1000) 213 unsigned long rxcrcerrmax;//crc error (>1000) 214 unsigned long rxicverr;//ICV error 215 } Stats; 216 217 #define MAX_LD_SLOT_NUM 10 218 #define KEEP_ALIVE_INTERVAL 20 // in seconds. 219 #define CHECK_FOR_HANG_PERIOD 2 //be equal to watchdog check time 220 #define DEFAULT_KEEP_ALIVE_LEVEL 1 221 #define DEFAULT_SLOT_NUM 2 222 #define POWER_PROFILE_AC 0 223 #define POWER_PROFILE_BATTERY 1 224 225 typedef struct _link_detect_t 226 { 227 u32 RxFrameNum[MAX_LD_SLOT_NUM]; // number of Rx Frame / CheckForHang_period to determine link status 228 u16 SlotNum; // number of CheckForHang period to determine link status, default is 2 229 u16 SlotIndex; 230 231 u32 NumTxOkInPeriod; //number of packet transmitted during CheckForHang 232 u32 NumRxOkInPeriod; //number of packet received during CheckForHang 233 234 u8 IdleCount; // (KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD) 235 u32 LastNumTxUnicast; 236 u32 LastNumRxUnicast; 237 238 bool bBusyTraffic; //when it is set to 1, UI cann't scan at will. 239 }link_detect_t, *plink_detect_t; 240 241 //YJ,modified,080828,end 242 243 //by amy for led 244 //================================================================================ 245 // LED customization. 246 //================================================================================ 247 248 typedef enum _LED_STRATEGY_8185{ 249 SW_LED_MODE0, // 250 SW_LED_MODE1, // 251 HW_LED, // HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes) 252 }LED_STRATEGY_8185, *PLED_STRATEGY_8185; 253 //by amy for led 254 //by amy for power save 255 typedef enum _LED_CTL_MODE{ 256 LED_CTL_POWER_ON = 1, 257 LED_CTL_LINK = 2, 258 LED_CTL_NO_LINK = 3, 259 LED_CTL_TX = 4, 260 LED_CTL_RX = 5, 261 LED_CTL_SITE_SURVEY = 6, 262 LED_CTL_POWER_OFF = 7 263 }LED_CTL_MODE; 264 265 typedef enum _RT_RF_POWER_STATE 266 { 267 eRfOn, 268 eRfSleep, 269 eRfOff 270 }RT_RF_POWER_STATE; 271 272 enum _ReasonCode{ 273 unspec_reason = 0x1, 274 auth_not_valid = 0x2, 275 deauth_lv_ss = 0x3, 276 inactivity = 0x4, 277 ap_overload = 0x5, 278 class2_err = 0x6, 279 class3_err = 0x7, 280 disas_lv_ss = 0x8, 281 asoc_not_auth = 0x9, 282 283 //----MIC_CHECK 284 mic_failure = 0xe, 285 //----END MIC_CHECK 286 287 // Reason code defined in 802.11i D10.0 p.28. 288 invalid_IE = 0x0d, 289 four_way_tmout = 0x0f, 290 two_way_tmout = 0x10, 291 IE_dismatch = 0x11, 292 invalid_Gcipher = 0x12, 293 invalid_Pcipher = 0x13, 294 invalid_AKMP = 0x14, 295 unsup_RSNIEver = 0x15, 296 invalid_RSNIE = 0x16, 297 auth_802_1x_fail= 0x17, 298 ciper_reject = 0x18, 299 300 // Reason code defined in 7.3.1.7, 802.1e D13.0, p.42. Added by Annie, 2005-11-15. 301 QoS_unspec = 0x20, // 32 302 QAP_bandwidth = 0x21, // 33 303 poor_condition = 0x22, // 34 304 no_facility = 0x23, // 35 305 // Where is 36??? 306 req_declined = 0x25, // 37 307 invalid_param = 0x26, // 38 308 req_not_honored= 0x27, // 39 309 TS_not_created = 0x2F, // 47 310 DL_not_allowed = 0x30, // 48 311 dest_not_exist = 0x31, // 49 312 dest_not_QSTA = 0x32, // 50 313 }; 314 typedef enum _RT_PS_MODE 315 { 316 eActive, // Active/Continuous access. 317 eMaxPs, // Max power save mode. 318 eFastPs // Fast power save mode. 319 }RT_PS_MODE; 320 //by amy for power save 321 typedef struct r8180_priv 322 { 323 struct pci_dev *pdev; 324 325 short epromtype; 326 int irq; 327 struct ieee80211_device *ieee80211; 328 329 short phy_ver; /* meaningful for rtl8225 1:A 2:B 3:C */ 330 short enable_gpio0; 331 short hw_plcp_len; 332 short plcp_preamble_mode; // 0:auto 1:short 2:long 333 334 spinlock_t irq_lock; 335 spinlock_t irq_th_lock; 336 spinlock_t tx_lock; 337 spinlock_t ps_lock; 338 spinlock_t rf_ps_lock; 339 340 u16 irq_mask; 341 short irq_enabled; 342 struct net_device *dev; 343 short chan; 344 short sens; 345 short max_sens; 346 u8 chtxpwr[15]; //channels from 1 to 14, 0 not used 347 u8 chtxpwr_ofdm[15]; //channels from 1 to 14, 0 not used 348 //u8 challow[15]; //channels from 1 to 14, 0 not used 349 u8 channel_plan; // it's the channel plan index 350 short up; 351 short crcmon; //if 1 allow bad crc frame reception in monitor mode 352 short prism_hdr; 353 354 struct timer_list scan_timer; 355 /*short scanpending; 356 short stopscan;*/ 357 spinlock_t scan_lock; 358 u8 active_probe; 359 //u8 active_scan_num; 360 struct semaphore wx_sem; 361 struct semaphore rf_state; 362 short hw_wep; 363 364 short digphy; 365 short antb; 366 short diversity; 367 u8 cs_treshold; 368 short rcr_csense; 369 u32 key0[4]; 370 short (*rf_set_sens)(struct net_device *dev,short sens); 371 void (*rf_set_chan)(struct net_device *dev,short ch); 372 void (*rf_close)(struct net_device *dev); 373 void (*rf_init)(struct net_device *dev); 374 void (*rf_sleep)(struct net_device *dev); 375 void (*rf_wakeup)(struct net_device *dev); 376 //short rate; 377 short promisc; 378 /*stats*/ 379 struct Stats stats; 380 struct _link_detect_t link_detect; //YJ,add,080828 381 struct iw_statistics wstats; 382 struct proc_dir_entry *dir_dev; 383 384 /*RX stuff*/ 385 u32 *rxring; 386 u32 *rxringtail; 387 dma_addr_t rxringdma; 388 struct buffer *rxbuffer; 389 struct buffer *rxbufferhead; 390 int rxringcount; 391 u16 rxbuffersize; 392 393 struct sk_buff *rx_skb; 394 395 short rx_skb_complete; 396 397 u32 rx_prevlen; 398 399 /*TX stuff*/ 400 /* 401 u32 *txlpring; 402 u32 *txhpring; 403 u32 *txnpring; 404 dma_addr_t txlpringdma; 405 dma_addr_t txhpringdma; 406 dma_addr_t txnpringdma; 407 u32 *txlpringtail; 408 u32 *txhpringtail; 409 u32 *txnpringtail; 410 u32 *txlpringhead; 411 u32 *txhpringhead; 412 u32 *txnpringhead; 413 struct buffer *txlpbufs; 414 struct buffer *txhpbufs; 415 struct buffer *txnpbufs; 416 struct buffer *txlpbufstail; 417 struct buffer *txhpbufstail; 418 struct buffer *txnpbufstail; 419 */ 420 u32 *txmapring; 421 u32 *txbkpring; 422 u32 *txbepring; 423 u32 *txvipring; 424 u32 *txvopring; 425 u32 *txhpring; 426 dma_addr_t txmapringdma; 427 dma_addr_t txbkpringdma; 428 dma_addr_t txbepringdma; 429 dma_addr_t txvipringdma; 430 dma_addr_t txvopringdma; 431 dma_addr_t txhpringdma; 432 u32 *txmapringtail; 433 u32 *txbkpringtail; 434 u32 *txbepringtail; 435 u32 *txvipringtail; 436 u32 *txvopringtail; 437 u32 *txhpringtail; 438 u32 *txmapringhead; 439 u32 *txbkpringhead; 440 u32 *txbepringhead; 441 u32 *txvipringhead; 442 u32 *txvopringhead; 443 u32 *txhpringhead; 444 struct buffer *txmapbufs; 445 struct buffer *txbkpbufs; 446 struct buffer *txbepbufs; 447 struct buffer *txvipbufs; 448 struct buffer *txvopbufs; 449 struct buffer *txhpbufs; 450 struct buffer *txmapbufstail; 451 struct buffer *txbkpbufstail; 452 struct buffer *txbepbufstail; 453 struct buffer *txvipbufstail; 454 struct buffer *txvopbufstail; 455 struct buffer *txhpbufstail; 456 457 int txringcount; 458 int txbuffsize; 459 //struct tx_pendingbuf txnp_pending; 460 //struct tasklet_struct irq_tx_tasklet; 461 struct tasklet_struct irq_rx_tasklet; 462 u8 dma_poll_mask; 463 //short tx_suspend; 464 465 /* adhoc/master mode stuff */ 466 u32 *txbeaconringtail; 467 dma_addr_t txbeaconringdma; 468 u32 *txbeaconring; 469 int txbeaconcount; 470 struct buffer *txbeaconbufs; 471 struct buffer *txbeaconbufstail; 472 //char *master_essid; 473 //u16 master_beaconinterval; 474 //u32 master_beaconsize; 475 //u16 beacon_interval; 476 477 u8 retry_data; 478 u8 retry_rts; 479 u16 rts; 480 481 //by amy for led 482 LED_STRATEGY_8185 LedStrategy; 483 //by amy for led 484 485 //by amy for power save 486 struct timer_list watch_dog_timer; 487 bool bInactivePs; 488 bool bSwRfProcessing; 489 RT_RF_POWER_STATE eInactivePowerState; 490 RT_RF_POWER_STATE eRFPowerState; 491 u32 RfOffReason; 492 bool RFChangeInProgress; 493 bool bInHctTest; 494 bool SetRFPowerStateInProgress; 495 u8 RFProgType; 496 bool bLeisurePs; 497 RT_PS_MODE dot11PowerSaveMode; 498 //u32 NumRxOkInPeriod; //YJ,del,080828 499 //u32 NumTxOkInPeriod; //YJ,del,080828 500 u8 TxPollingTimes; 501 502 bool bApBufOurFrame;// TRUE if AP buffer our unicast data , we will keep eAwake until receive data or timeout. 503 u8 WaitBufDataBcnCount; 504 u8 WaitBufDataTimeOut; 505 506 //by amy for power save 507 //by amy for antenna 508 u8 EEPROMSwAntennaDiversity; 509 bool EEPROMDefaultAntenna1; 510 u8 RegSwAntennaDiversityMechanism; 511 bool bSwAntennaDiverity; 512 u8 RegDefaultAntenna; 513 bool bDefaultAntenna1; 514 u8 SignalStrength; 515 long Stats_SignalStrength; 516 long LastSignalStrengthInPercent; // In percentange, used for smoothing, e.g. Moving Average. 517 u8 SignalQuality; // in 0-100 index. 518 long Stats_SignalQuality; 519 long RecvSignalPower; // in dBm. 520 long Stats_RecvSignalPower; 521 u8 LastRxPktAntenna; // +by amy 080312 Antenn which received the lasted packet. 0: Aux, 1:Main. Added by Roger, 2008.01.25. 522 u32 AdRxOkCnt; 523 long AdRxSignalStrength; 524 u8 CurrAntennaIndex; // Index to current Antenna (both Tx and Rx). 525 u8 AdTickCount; // Times of SwAntennaDiversityTimer happened. 526 u8 AdCheckPeriod; // # of period SwAntennaDiversityTimer to check Rx signal strength for SW Antenna Diversity. 527 u8 AdMinCheckPeriod; // Min value of AdCheckPeriod. 528 u8 AdMaxCheckPeriod; // Max value of AdCheckPeriod. 529 long AdRxSsThreshold; // Signal strength threshold to switch antenna. 530 long AdMaxRxSsThreshold; // Max value of AdRxSsThreshold. 531 bool bAdSwitchedChecking; // TRUE if we shall shall check Rx signal strength for last time switching antenna. 532 long AdRxSsBeforeSwitched; // Rx signal strength before we swithed antenna. 533 struct timer_list SwAntennaDiversityTimer; 534 //by amy for antenna 535 //{by amy 080312 536 // 537 // Crystal calibration. 538 // Added by Roger, 2007.12.11. 539 // 540 bool bXtalCalibration; // Crystal calibration. 541 u8 XtalCal_Xin; // Crystal calibration for Xin. 0~7.5pF 542 u8 XtalCal_Xout; // Crystal calibration for Xout. 0~7.5pF 543 // 544 // Tx power tracking with thermal meter indication. 545 // Added by Roger, 2007.12.11. 546 // 547 bool bTxPowerTrack; // Tx Power tracking. 548 u8 ThermalMeter; // Thermal meter reference indication. 549 // 550 // Dynamic Initial Gain Adjustment Mechanism. Added by Bruce, 2007-02-14. 551 // 552 bool bDigMechanism; // TRUE if DIG is enabled, FALSE ow. 553 bool bRegHighPowerMechanism; // For High Power Mechanism. 061010, by rcnjko. 554 u32 FalseAlarmRegValue; 555 u8 RegDigOfdmFaUpTh; // Upper threhold of OFDM false alarm, which is used in DIG. 556 u8 DIG_NumberFallbackVote; 557 u8 DIG_NumberUpgradeVote; 558 // For HW antenna diversity, added by Roger, 2008.01.30. 559 u32 AdMainAntennaRxOkCnt; // Main antenna Rx OK count. 560 u32 AdAuxAntennaRxOkCnt; // Aux antenna Rx OK count. 561 bool bHWAdSwitched; // TRUE if we has switched default antenna by HW evaluation. 562 // RF High Power upper/lower threshold. 563 u8 RegHiPwrUpperTh; 564 u8 RegHiPwrLowerTh; 565 // RF RSSI High Power upper/lower Threshold. 566 u8 RegRSSIHiPwrUpperTh; 567 u8 RegRSSIHiPwrLowerTh; 568 // Current CCK RSSI value to determine CCK high power, asked by SD3 DZ, by Bruce, 2007-04-12. 569 u8 CurCCKRSSI; 570 bool bCurCCKPkt; 571 // 572 // High Power Mechanism. Added by amy, 080312. 573 // 574 bool bToUpdateTxPwr; 575 long UndecoratedSmoothedSS; 576 long UndercorateSmoothedRxPower; 577 u8 RSSI; 578 char RxPower; 579 u8 InitialGain; 580 //For adjust Dig Threshold during Legacy/Leisure Power Save Mode 581 u32 DozePeriodInPast2Sec; 582 // Don't access BB/RF under disable PLL situation. 583 u8 InitialGainBackUp; 584 u8 RegBModeGainStage; 585 //by amy for rate adaptive 586 struct timer_list rateadapter_timer; 587 u32 RateAdaptivePeriod; 588 bool bEnhanceTxPwr; 589 bool bUpdateARFR; 590 int ForcedDataRate; // Force Data Rate. 0: Auto, 0x02: 1M ~ 0x6C: 54M.) 591 u32 NumTxUnicast; //YJ,add,080828,for keep alive 592 u8 keepAliveLevel; //YJ,add,080828,for KeepAlive 593 unsigned long NumTxOkTotal; 594 u16 LastRetryCnt; 595 u16 LastRetryRate; 596 unsigned long LastTxokCnt; 597 unsigned long LastRxokCnt; 598 u16 CurrRetryCnt; 599 unsigned long LastTxOKBytes; 600 unsigned long NumTxOkBytesTotal; 601 u8 LastFailTxRate; 602 long LastFailTxRateSS; 603 u8 FailTxRateCount; 604 u32 LastTxThroughput; 605 //for up rate 606 unsigned short bTryuping; 607 u8 CurrTxRate; //the rate before up 608 u16 CurrRetryRate; 609 u16 TryupingCount; 610 u8 TryDownCountLowData; 611 u8 TryupingCountNoData; 612 613 u8 CurrentOperaRate; 614 //by amy for rate adaptive 615 //by amy 080312} 616 // short wq_hurryup; 617 // struct workqueue_struct *workqueue; 618 struct work_struct reset_wq; 619 struct work_struct watch_dog_wq; 620 struct work_struct tx_irq_wq; 621 short ack_tx_to_ieee; 622 623 u8 PowerProfile; 624 u32 CSMethod; 625 u8 cck_txpwr_base; 626 u8 ofdm_txpwr_base; 627 u8 dma_poll_stop_mask; 628 629 //u8 RegThreeWireMode; 630 u8 MWIEnable; 631 u16 ShortRetryLimit; 632 u16 LongRetryLimit; 633 u16 EarlyRxThreshold; 634 u32 TransmitConfig; 635 u32 ReceiveConfig; 636 u32 IntrMask; 637 638 struct ChnlAccessSetting ChannelAccessSetting; 639 }r8180_priv; 640 641 #define MANAGE_PRIORITY 0 642 #define BK_PRIORITY 1 643 #define BE_PRIORITY 2 644 #define VI_PRIORITY 3 645 #define VO_PRIORITY 4 646 #define HI_PRIORITY 5 647 #define BEACON_PRIORITY 6 648 649 #define LOW_PRIORITY VI_PRIORITY 650 #define NORM_PRIORITY VO_PRIORITY 651 //AC2Queue mapping 652 #define AC2Q(_ac) (((_ac) == WME_AC_VO) ? VO_PRIORITY : \ 653 ((_ac) == WME_AC_VI) ? VI_PRIORITY : \ 654 ((_ac) == WME_AC_BK) ? BK_PRIORITY : \ 655 BE_PRIORITY) 656 657 short rtl8180_tx(struct net_device *dev,u8* skbuf, int len,int priority, 658 short morefrag,short fragdesc,int rate); 659 660 u8 read_nic_byte(struct net_device *dev, int x); 661 u32 read_nic_dword(struct net_device *dev, int x); 662 u16 read_nic_word(struct net_device *dev, int x) ; 663 void write_nic_byte(struct net_device *dev, int x,u8 y); 664 void write_nic_word(struct net_device *dev, int x,u16 y); 665 void write_nic_dword(struct net_device *dev, int x,u32 y); 666 void force_pci_posting(struct net_device *dev); 667 668 void rtl8180_rtx_disable(struct net_device *); 669 void rtl8180_rx_enable(struct net_device *); 670 void rtl8180_tx_enable(struct net_device *); 671 void rtl8180_start_scanning(struct net_device *dev); 672 void rtl8180_start_scanning_s(struct net_device *dev); 673 void rtl8180_stop_scanning(struct net_device *dev); 674 void rtl8180_disassociate(struct net_device *dev); 675 //void fix_rx_fifo(struct net_device *dev); 676 void rtl8180_set_anaparam(struct net_device *dev,u32 a); 677 void rtl8185_set_anaparam2(struct net_device *dev,u32 a); 678 void rtl8180_set_hw_wep(struct net_device *dev); 679 void rtl8180_no_hw_wep(struct net_device *dev); 680 void rtl8180_update_msr(struct net_device *dev); 681 //void rtl8180_BSS_create(struct net_device *dev); 682 void rtl8180_beacon_tx_disable(struct net_device *dev); 683 void rtl8180_beacon_rx_disable(struct net_device *dev); 684 void rtl8180_conttx_enable(struct net_device *dev); 685 void rtl8180_conttx_disable(struct net_device *dev); 686 int rtl8180_down(struct net_device *dev); 687 int rtl8180_up(struct net_device *dev); 688 void rtl8180_commit(struct net_device *dev); 689 void rtl8180_set_chan(struct net_device *dev,short ch); 690 void rtl8180_set_master_essid(struct net_device *dev,char *essid); 691 void rtl8180_update_beacon_security(struct net_device *dev); 692 void write_phy(struct net_device *dev, u8 adr, u8 data); 693 void write_phy_cck(struct net_device *dev, u8 adr, u32 data); 694 void write_phy_ofdm(struct net_device *dev, u8 adr, u32 data); 695 void rtl8185_tx_antenna(struct net_device *dev, u8 ant); 696 void rtl8185_rf_pins_enable(struct net_device *dev); 697 void IBSS_randomize_cell(struct net_device *dev); 698 void IPSEnter(struct net_device *dev); 699 void IPSLeave(struct net_device *dev); 700 int get_curr_tx_free_desc(struct net_device *dev, int priority); 701 void UpdateInitialGain(struct net_device *dev); 702 bool SetAntennaConfig87SE(struct net_device *dev, u8 DefaultAnt, bool bAntDiversity); 703 704 //#ifdef CONFIG_RTL8185B 705 void rtl8185b_adapter_start(struct net_device *dev); 706 void rtl8185b_rx_enable(struct net_device *dev); 707 void rtl8185b_tx_enable(struct net_device *dev); 708 void rtl8180_reset(struct net_device *dev); 709 void rtl8185b_irq_enable(struct net_device *dev); 710 void fix_rx_fifo(struct net_device *dev); 711 void fix_tx_fifo(struct net_device *dev); 712 void rtl8225z2_SetTXPowerLevel(struct net_device *dev, short ch); 713 void rtl8180_rate_adapter(struct work_struct * work); 714 //#endif 715 bool MgntActSet_RF_State(struct net_device *dev, RT_RF_POWER_STATE StateToSet, u32 ChangeSource); 716 717 #endif 718