1 /*
2 * driver/s390/cio/qdio_setup.c
3 *
4 * qdio queue initialization
5 *
6 * Copyright (C) IBM Corp. 2008
7 * Author(s): Jan Glauber <jang@linux.vnet.ibm.com>
8 */
9 #include <linux/kernel.h>
10 #include <linux/slab.h>
11 #include <asm/qdio.h>
12
13 #include "cio.h"
14 #include "css.h"
15 #include "device.h"
16 #include "ioasm.h"
17 #include "chsc.h"
18 #include "qdio.h"
19 #include "qdio_debug.h"
20
21 static struct kmem_cache *qdio_q_cache;
22
23 /*
24 * qebsm is only available under 64bit but the adapter sets the feature
25 * flag anyway, so we manually override it.
26 */
qebsm_possible(void)27 static inline int qebsm_possible(void)
28 {
29 #ifdef CONFIG_64BIT
30 return css_general_characteristics.qebsm;
31 #endif
32 return 0;
33 }
34
35 /*
36 * qib_param_field: pointer to 128 bytes or NULL, if no param field
37 * nr_input_qs: pointer to nr_queues*128 words of data or NULL
38 */
set_impl_params(struct qdio_irq * irq_ptr,unsigned int qib_param_field_format,unsigned char * qib_param_field,unsigned long * input_slib_elements,unsigned long * output_slib_elements)39 static void set_impl_params(struct qdio_irq *irq_ptr,
40 unsigned int qib_param_field_format,
41 unsigned char *qib_param_field,
42 unsigned long *input_slib_elements,
43 unsigned long *output_slib_elements)
44 {
45 struct qdio_q *q;
46 int i, j;
47
48 if (!irq_ptr)
49 return;
50
51 irq_ptr->qib.pfmt = qib_param_field_format;
52 if (qib_param_field)
53 memcpy(irq_ptr->qib.parm, qib_param_field,
54 QDIO_MAX_BUFFERS_PER_Q);
55
56 if (!input_slib_elements)
57 goto output;
58
59 for_each_input_queue(irq_ptr, q, i) {
60 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
61 q->slib->slibe[j].parms =
62 input_slib_elements[i * QDIO_MAX_BUFFERS_PER_Q + j];
63 }
64 output:
65 if (!output_slib_elements)
66 return;
67
68 for_each_output_queue(irq_ptr, q, i) {
69 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
70 q->slib->slibe[j].parms =
71 output_slib_elements[i * QDIO_MAX_BUFFERS_PER_Q + j];
72 }
73 }
74
__qdio_allocate_qs(struct qdio_q ** irq_ptr_qs,int nr_queues)75 static int __qdio_allocate_qs(struct qdio_q **irq_ptr_qs, int nr_queues)
76 {
77 struct qdio_q *q;
78 int i;
79
80 for (i = 0; i < nr_queues; i++) {
81 q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL);
82 if (!q)
83 return -ENOMEM;
84
85 q->slib = (struct slib *) __get_free_page(GFP_KERNEL);
86 if (!q->slib) {
87 kmem_cache_free(qdio_q_cache, q);
88 return -ENOMEM;
89 }
90 irq_ptr_qs[i] = q;
91 }
92 return 0;
93 }
94
qdio_allocate_qs(struct qdio_irq * irq_ptr,int nr_input_qs,int nr_output_qs)95 int qdio_allocate_qs(struct qdio_irq *irq_ptr, int nr_input_qs, int nr_output_qs)
96 {
97 int rc;
98
99 rc = __qdio_allocate_qs(irq_ptr->input_qs, nr_input_qs);
100 if (rc)
101 return rc;
102 rc = __qdio_allocate_qs(irq_ptr->output_qs, nr_output_qs);
103 return rc;
104 }
105
setup_queues_misc(struct qdio_q * q,struct qdio_irq * irq_ptr,qdio_handler_t * handler,int i)106 static void setup_queues_misc(struct qdio_q *q, struct qdio_irq *irq_ptr,
107 qdio_handler_t *handler, int i)
108 {
109 struct slib *slib = q->slib;
110
111 /* queue must be cleared for qdio_establish */
112 memset(q, 0, sizeof(*q));
113 memset(slib, 0, PAGE_SIZE);
114 q->slib = slib;
115 q->irq_ptr = irq_ptr;
116 q->mask = 1 << (31 - i);
117 q->nr = i;
118 q->handler = handler;
119 }
120
setup_storage_lists(struct qdio_q * q,struct qdio_irq * irq_ptr,void ** sbals_array,int i)121 static void setup_storage_lists(struct qdio_q *q, struct qdio_irq *irq_ptr,
122 void **sbals_array, int i)
123 {
124 struct qdio_q *prev;
125 int j;
126
127 DBF_HEX(&q, sizeof(void *));
128 q->sl = (struct sl *)((char *)q->slib + PAGE_SIZE / 2);
129
130 /* fill in sbal */
131 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) {
132 q->sbal[j] = *sbals_array++;
133 BUG_ON((unsigned long)q->sbal[j] & 0xff);
134 }
135
136 /* fill in slib */
137 if (i > 0) {
138 prev = (q->is_input_q) ? irq_ptr->input_qs[i - 1]
139 : irq_ptr->output_qs[i - 1];
140 prev->slib->nsliba = (unsigned long)q->slib;
141 }
142
143 q->slib->sla = (unsigned long)q->sl;
144 q->slib->slsba = (unsigned long)&q->slsb.val[0];
145
146 /* fill in sl */
147 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
148 q->sl->element[j].sbal = (unsigned long)q->sbal[j];
149 }
150
setup_queues(struct qdio_irq * irq_ptr,struct qdio_initialize * qdio_init)151 static void setup_queues(struct qdio_irq *irq_ptr,
152 struct qdio_initialize *qdio_init)
153 {
154 struct qdio_q *q;
155 void **input_sbal_array = qdio_init->input_sbal_addr_array;
156 void **output_sbal_array = qdio_init->output_sbal_addr_array;
157 int i;
158
159 for_each_input_queue(irq_ptr, q, i) {
160 DBF_EVENT("in-q:%1d", i);
161 setup_queues_misc(q, irq_ptr, qdio_init->input_handler, i);
162
163 q->is_input_q = 1;
164 q->u.in.queue_start_poll = qdio_init->queue_start_poll;
165 setup_storage_lists(q, irq_ptr, input_sbal_array, i);
166 input_sbal_array += QDIO_MAX_BUFFERS_PER_Q;
167
168 if (is_thinint_irq(irq_ptr))
169 tasklet_init(&q->tasklet, tiqdio_inbound_processing,
170 (unsigned long) q);
171 else
172 tasklet_init(&q->tasklet, qdio_inbound_processing,
173 (unsigned long) q);
174 }
175
176 for_each_output_queue(irq_ptr, q, i) {
177 DBF_EVENT("outq:%1d", i);
178 setup_queues_misc(q, irq_ptr, qdio_init->output_handler, i);
179
180 q->is_input_q = 0;
181 q->u.out.scan_threshold = qdio_init->scan_threshold;
182 setup_storage_lists(q, irq_ptr, output_sbal_array, i);
183 output_sbal_array += QDIO_MAX_BUFFERS_PER_Q;
184
185 tasklet_init(&q->tasklet, qdio_outbound_processing,
186 (unsigned long) q);
187 setup_timer(&q->u.out.timer, (void(*)(unsigned long))
188 &qdio_outbound_timer, (unsigned long)q);
189 }
190 }
191
process_ac_flags(struct qdio_irq * irq_ptr,unsigned char qdioac)192 static void process_ac_flags(struct qdio_irq *irq_ptr, unsigned char qdioac)
193 {
194 if (qdioac & AC1_SIGA_INPUT_NEEDED)
195 irq_ptr->siga_flag.input = 1;
196 if (qdioac & AC1_SIGA_OUTPUT_NEEDED)
197 irq_ptr->siga_flag.output = 1;
198 if (qdioac & AC1_SIGA_SYNC_NEEDED)
199 irq_ptr->siga_flag.sync = 1;
200 if (!(qdioac & AC1_AUTOMATIC_SYNC_ON_THININT))
201 irq_ptr->siga_flag.sync_after_ai = 1;
202 if (!(qdioac & AC1_AUTOMATIC_SYNC_ON_OUT_PCI))
203 irq_ptr->siga_flag.sync_out_after_pci = 1;
204 }
205
check_and_setup_qebsm(struct qdio_irq * irq_ptr,unsigned char qdioac,unsigned long token)206 static void check_and_setup_qebsm(struct qdio_irq *irq_ptr,
207 unsigned char qdioac, unsigned long token)
208 {
209 if (!(irq_ptr->qib.rflags & QIB_RFLAGS_ENABLE_QEBSM))
210 goto no_qebsm;
211 if (!(qdioac & AC1_SC_QEBSM_AVAILABLE) ||
212 (!(qdioac & AC1_SC_QEBSM_ENABLED)))
213 goto no_qebsm;
214
215 irq_ptr->sch_token = token;
216
217 DBF_EVENT("V=V:1");
218 DBF_EVENT("%8lx", irq_ptr->sch_token);
219 return;
220
221 no_qebsm:
222 irq_ptr->sch_token = 0;
223 irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM;
224 DBF_EVENT("noV=V");
225 }
226
227 /*
228 * If there is a qdio_irq we use the chsc_page and store the information
229 * in the qdio_irq, otherwise we copy it to the specified structure.
230 */
qdio_setup_get_ssqd(struct qdio_irq * irq_ptr,struct subchannel_id * schid,struct qdio_ssqd_desc * data)231 int qdio_setup_get_ssqd(struct qdio_irq *irq_ptr,
232 struct subchannel_id *schid,
233 struct qdio_ssqd_desc *data)
234 {
235 struct chsc_ssqd_area *ssqd;
236 int rc;
237
238 DBF_EVENT("getssqd:%4x", schid->sch_no);
239 if (irq_ptr != NULL)
240 ssqd = (struct chsc_ssqd_area *)irq_ptr->chsc_page;
241 else
242 ssqd = (struct chsc_ssqd_area *)__get_free_page(GFP_KERNEL);
243 memset(ssqd, 0, PAGE_SIZE);
244
245 ssqd->request = (struct chsc_header) {
246 .length = 0x0010,
247 .code = 0x0024,
248 };
249 ssqd->first_sch = schid->sch_no;
250 ssqd->last_sch = schid->sch_no;
251 ssqd->ssid = schid->ssid;
252
253 if (chsc(ssqd))
254 return -EIO;
255 rc = chsc_error_from_response(ssqd->response.code);
256 if (rc)
257 return rc;
258
259 if (!(ssqd->qdio_ssqd.flags & CHSC_FLAG_QDIO_CAPABILITY) ||
260 !(ssqd->qdio_ssqd.flags & CHSC_FLAG_VALIDITY) ||
261 (ssqd->qdio_ssqd.sch != schid->sch_no))
262 return -EINVAL;
263
264 if (irq_ptr != NULL)
265 memcpy(&irq_ptr->ssqd_desc, &ssqd->qdio_ssqd,
266 sizeof(struct qdio_ssqd_desc));
267 else {
268 memcpy(data, &ssqd->qdio_ssqd,
269 sizeof(struct qdio_ssqd_desc));
270 free_page((unsigned long)ssqd);
271 }
272 return 0;
273 }
274
qdio_setup_ssqd_info(struct qdio_irq * irq_ptr)275 void qdio_setup_ssqd_info(struct qdio_irq *irq_ptr)
276 {
277 unsigned char qdioac;
278 int rc;
279
280 rc = qdio_setup_get_ssqd(irq_ptr, &irq_ptr->schid, NULL);
281 if (rc) {
282 DBF_ERROR("%4x ssqd ERR", irq_ptr->schid.sch_no);
283 DBF_ERROR("rc:%x", rc);
284 /* all flags set, worst case */
285 qdioac = AC1_SIGA_INPUT_NEEDED | AC1_SIGA_OUTPUT_NEEDED |
286 AC1_SIGA_SYNC_NEEDED;
287 } else
288 qdioac = irq_ptr->ssqd_desc.qdioac1;
289
290 check_and_setup_qebsm(irq_ptr, qdioac, irq_ptr->ssqd_desc.sch_token);
291 process_ac_flags(irq_ptr, qdioac);
292 DBF_EVENT("qdioac:%4x", qdioac);
293 }
294
qdio_release_memory(struct qdio_irq * irq_ptr)295 void qdio_release_memory(struct qdio_irq *irq_ptr)
296 {
297 struct qdio_q *q;
298 int i;
299
300 /*
301 * Must check queue array manually since irq_ptr->nr_input_queues /
302 * irq_ptr->nr_input_queues may not yet be set.
303 */
304 for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) {
305 q = irq_ptr->input_qs[i];
306 if (q) {
307 free_page((unsigned long) q->slib);
308 kmem_cache_free(qdio_q_cache, q);
309 }
310 }
311 for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) {
312 q = irq_ptr->output_qs[i];
313 if (q) {
314 free_page((unsigned long) q->slib);
315 kmem_cache_free(qdio_q_cache, q);
316 }
317 }
318 free_page((unsigned long) irq_ptr->qdr);
319 free_page(irq_ptr->chsc_page);
320 free_page((unsigned long) irq_ptr);
321 }
322
__qdio_allocate_fill_qdr(struct qdio_irq * irq_ptr,struct qdio_q ** irq_ptr_qs,int i,int nr)323 static void __qdio_allocate_fill_qdr(struct qdio_irq *irq_ptr,
324 struct qdio_q **irq_ptr_qs,
325 int i, int nr)
326 {
327 irq_ptr->qdr->qdf0[i + nr].sliba =
328 (unsigned long)irq_ptr_qs[i]->slib;
329
330 irq_ptr->qdr->qdf0[i + nr].sla =
331 (unsigned long)irq_ptr_qs[i]->sl;
332
333 irq_ptr->qdr->qdf0[i + nr].slsba =
334 (unsigned long)&irq_ptr_qs[i]->slsb.val[0];
335
336 irq_ptr->qdr->qdf0[i + nr].akey = PAGE_DEFAULT_KEY >> 4;
337 irq_ptr->qdr->qdf0[i + nr].bkey = PAGE_DEFAULT_KEY >> 4;
338 irq_ptr->qdr->qdf0[i + nr].ckey = PAGE_DEFAULT_KEY >> 4;
339 irq_ptr->qdr->qdf0[i + nr].dkey = PAGE_DEFAULT_KEY >> 4;
340 }
341
setup_qdr(struct qdio_irq * irq_ptr,struct qdio_initialize * qdio_init)342 static void setup_qdr(struct qdio_irq *irq_ptr,
343 struct qdio_initialize *qdio_init)
344 {
345 int i;
346
347 irq_ptr->qdr->qfmt = qdio_init->q_format;
348 irq_ptr->qdr->iqdcnt = qdio_init->no_input_qs;
349 irq_ptr->qdr->oqdcnt = qdio_init->no_output_qs;
350 irq_ptr->qdr->iqdsz = sizeof(struct qdesfmt0) / 4; /* size in words */
351 irq_ptr->qdr->oqdsz = sizeof(struct qdesfmt0) / 4;
352 irq_ptr->qdr->qiba = (unsigned long)&irq_ptr->qib;
353 irq_ptr->qdr->qkey = PAGE_DEFAULT_KEY >> 4;
354
355 for (i = 0; i < qdio_init->no_input_qs; i++)
356 __qdio_allocate_fill_qdr(irq_ptr, irq_ptr->input_qs, i, 0);
357
358 for (i = 0; i < qdio_init->no_output_qs; i++)
359 __qdio_allocate_fill_qdr(irq_ptr, irq_ptr->output_qs, i,
360 qdio_init->no_input_qs);
361 }
362
setup_qib(struct qdio_irq * irq_ptr,struct qdio_initialize * init_data)363 static void setup_qib(struct qdio_irq *irq_ptr,
364 struct qdio_initialize *init_data)
365 {
366 if (qebsm_possible())
367 irq_ptr->qib.rflags |= QIB_RFLAGS_ENABLE_QEBSM;
368
369 irq_ptr->qib.rflags |= init_data->qib_rflags;
370
371 irq_ptr->qib.qfmt = init_data->q_format;
372 if (init_data->no_input_qs)
373 irq_ptr->qib.isliba =
374 (unsigned long)(irq_ptr->input_qs[0]->slib);
375 if (init_data->no_output_qs)
376 irq_ptr->qib.osliba =
377 (unsigned long)(irq_ptr->output_qs[0]->slib);
378 memcpy(irq_ptr->qib.ebcnam, init_data->adapter_name, 8);
379 }
380
qdio_setup_irq(struct qdio_initialize * init_data)381 int qdio_setup_irq(struct qdio_initialize *init_data)
382 {
383 struct ciw *ciw;
384 struct qdio_irq *irq_ptr = init_data->cdev->private->qdio_data;
385 int rc;
386
387 memset(&irq_ptr->qib, 0, sizeof(irq_ptr->qib));
388 memset(&irq_ptr->siga_flag, 0, sizeof(irq_ptr->siga_flag));
389 memset(&irq_ptr->ccw, 0, sizeof(irq_ptr->ccw));
390 memset(&irq_ptr->ssqd_desc, 0, sizeof(irq_ptr->ssqd_desc));
391 memset(&irq_ptr->perf_stat, 0, sizeof(irq_ptr->perf_stat));
392
393 irq_ptr->debugfs_dev = irq_ptr->debugfs_perf = NULL;
394 irq_ptr->sch_token = irq_ptr->state = irq_ptr->perf_stat_enabled = 0;
395
396 /* wipes qib.ac, required by ar7063 */
397 memset(irq_ptr->qdr, 0, sizeof(struct qdr));
398
399 irq_ptr->int_parm = init_data->int_parm;
400 irq_ptr->nr_input_qs = init_data->no_input_qs;
401 irq_ptr->nr_output_qs = init_data->no_output_qs;
402
403 irq_ptr->schid = ccw_device_get_subchannel_id(init_data->cdev);
404 irq_ptr->cdev = init_data->cdev;
405 setup_queues(irq_ptr, init_data);
406
407 setup_qib(irq_ptr, init_data);
408 qdio_setup_thinint(irq_ptr);
409 set_impl_params(irq_ptr, init_data->qib_param_field_format,
410 init_data->qib_param_field,
411 init_data->input_slib_elements,
412 init_data->output_slib_elements);
413
414 /* fill input and output descriptors */
415 setup_qdr(irq_ptr, init_data);
416
417 /* qdr, qib, sls, slsbs, slibs, sbales are filled now */
418
419 /* get qdio commands */
420 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_EQUEUE);
421 if (!ciw) {
422 DBF_ERROR("%4x NO EQ", irq_ptr->schid.sch_no);
423 rc = -EINVAL;
424 goto out_err;
425 }
426 irq_ptr->equeue = *ciw;
427
428 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_AQUEUE);
429 if (!ciw) {
430 DBF_ERROR("%4x NO AQ", irq_ptr->schid.sch_no);
431 rc = -EINVAL;
432 goto out_err;
433 }
434 irq_ptr->aqueue = *ciw;
435
436 /* set new interrupt handler */
437 irq_ptr->orig_handler = init_data->cdev->handler;
438 init_data->cdev->handler = qdio_int_handler;
439 return 0;
440 out_err:
441 qdio_release_memory(irq_ptr);
442 return rc;
443 }
444
qdio_print_subchannel_info(struct qdio_irq * irq_ptr,struct ccw_device * cdev)445 void qdio_print_subchannel_info(struct qdio_irq *irq_ptr,
446 struct ccw_device *cdev)
447 {
448 char s[80];
449
450 snprintf(s, 80, "qdio: %s %s on SC %x using "
451 "AI:%d QEBSM:%d PCI:%d TDD:%d SIGA:%s%s%s%s%s\n",
452 dev_name(&cdev->dev),
453 (irq_ptr->qib.qfmt == QDIO_QETH_QFMT) ? "OSA" :
454 ((irq_ptr->qib.qfmt == QDIO_ZFCP_QFMT) ? "ZFCP" : "HS"),
455 irq_ptr->schid.sch_no,
456 is_thinint_irq(irq_ptr),
457 (irq_ptr->sch_token) ? 1 : 0,
458 (irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED) ? 1 : 0,
459 css_general_characteristics.aif_tdd,
460 (irq_ptr->siga_flag.input) ? "R" : " ",
461 (irq_ptr->siga_flag.output) ? "W" : " ",
462 (irq_ptr->siga_flag.sync) ? "S" : " ",
463 (irq_ptr->siga_flag.sync_after_ai) ? "A" : " ",
464 (irq_ptr->siga_flag.sync_out_after_pci) ? "P" : " ");
465 printk(KERN_INFO "%s", s);
466 }
467
qdio_setup_init(void)468 int __init qdio_setup_init(void)
469 {
470 qdio_q_cache = kmem_cache_create("qdio_q", sizeof(struct qdio_q),
471 256, 0, NULL);
472 if (!qdio_q_cache)
473 return -ENOMEM;
474
475 /* Check for OSA/FCP thin interrupts (bit 67). */
476 DBF_EVENT("thinint:%1d",
477 (css_general_characteristics.aif_osa) ? 1 : 0);
478
479 /* Check for QEBSM support in general (bit 58). */
480 DBF_EVENT("cssQEBSM:%1d", (qebsm_possible()) ? 1 : 0);
481 return 0;
482 }
483
qdio_setup_exit(void)484 void qdio_setup_exit(void)
485 {
486 kmem_cache_destroy(qdio_q_cache);
487 }
488