1 /*
2  * Regulator Driver for Freescale MC13783 PMIC
3  *
4  * Copyright 2010 Yong Shen <yong.shen@linaro.org>
5  * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
6  * Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12 
13 #include <linux/mfd/mc13783.h>
14 #include <linux/regulator/machine.h>
15 #include <linux/regulator/driver.h>
16 #include <linux/platform_device.h>
17 #include <linux/kernel.h>
18 #include <linux/mfd/core.h>
19 #include <linux/slab.h>
20 #include <linux/init.h>
21 #include <linux/err.h>
22 #include "mc13xxx.h"
23 
24 #define MC13783_REG_SWITCHERS5			29
25 #define MC13783_REG_SWITCHERS5_SW3EN			(1 << 20)
26 #define MC13783_REG_SWITCHERS5_SW3VSEL			18
27 #define MC13783_REG_SWITCHERS5_SW3VSEL_M		(3 << 18)
28 
29 #define MC13783_REG_REGULATORSETTING0		30
30 #define MC13783_REG_REGULATORSETTING0_VIOLOVSEL		2
31 #define MC13783_REG_REGULATORSETTING0_VDIGVSEL		4
32 #define MC13783_REG_REGULATORSETTING0_VGENVSEL		6
33 #define MC13783_REG_REGULATORSETTING0_VRFDIGVSEL	9
34 #define MC13783_REG_REGULATORSETTING0_VRFREFVSEL	11
35 #define MC13783_REG_REGULATORSETTING0_VRFCPVSEL		13
36 #define MC13783_REG_REGULATORSETTING0_VSIMVSEL		14
37 #define MC13783_REG_REGULATORSETTING0_VESIMVSEL		15
38 #define MC13783_REG_REGULATORSETTING0_VCAMVSEL		16
39 
40 #define MC13783_REG_REGULATORSETTING0_VIOLOVSEL_M	(3 << 2)
41 #define MC13783_REG_REGULATORSETTING0_VDIGVSEL_M	(3 << 4)
42 #define MC13783_REG_REGULATORSETTING0_VGENVSEL_M	(7 << 6)
43 #define MC13783_REG_REGULATORSETTING0_VRFDIGVSEL_M	(3 << 9)
44 #define MC13783_REG_REGULATORSETTING0_VRFREFVSEL_M	(3 << 11)
45 #define MC13783_REG_REGULATORSETTING0_VRFCPVSEL_M	(1 << 13)
46 #define MC13783_REG_REGULATORSETTING0_VSIMVSEL_M	(1 << 14)
47 #define MC13783_REG_REGULATORSETTING0_VESIMVSEL_M	(1 << 15)
48 #define MC13783_REG_REGULATORSETTING0_VCAMVSEL_M	(7 << 16)
49 
50 #define MC13783_REG_REGULATORSETTING1		31
51 #define MC13783_REG_REGULATORSETTING1_VVIBVSEL		0
52 #define MC13783_REG_REGULATORSETTING1_VRF1VSEL		2
53 #define MC13783_REG_REGULATORSETTING1_VRF2VSEL		4
54 #define MC13783_REG_REGULATORSETTING1_VMMC1VSEL		6
55 #define MC13783_REG_REGULATORSETTING1_VMMC2VSEL		9
56 
57 #define MC13783_REG_REGULATORSETTING1_VVIBVSEL_M	(3 << 0)
58 #define MC13783_REG_REGULATORSETTING1_VRF1VSEL_M	(3 << 2)
59 #define MC13783_REG_REGULATORSETTING1_VRF2VSEL_M	(3 << 4)
60 #define MC13783_REG_REGULATORSETTING1_VMMC1VSEL_M	(7 << 6)
61 #define MC13783_REG_REGULATORSETTING1_VMMC2VSEL_M	(7 << 9)
62 
63 #define MC13783_REG_REGULATORMODE0		32
64 #define MC13783_REG_REGULATORMODE0_VAUDIOEN		(1 << 0)
65 #define MC13783_REG_REGULATORMODE0_VIOHIEN		(1 << 3)
66 #define MC13783_REG_REGULATORMODE0_VIOLOEN		(1 << 6)
67 #define MC13783_REG_REGULATORMODE0_VDIGEN		(1 << 9)
68 #define MC13783_REG_REGULATORMODE0_VGENEN		(1 << 12)
69 #define MC13783_REG_REGULATORMODE0_VRFDIGEN		(1 << 15)
70 #define MC13783_REG_REGULATORMODE0_VRFREFEN		(1 << 18)
71 #define MC13783_REG_REGULATORMODE0_VRFCPEN		(1 << 21)
72 
73 #define MC13783_REG_REGULATORMODE1		33
74 #define MC13783_REG_REGULATORMODE1_VSIMEN		(1 << 0)
75 #define MC13783_REG_REGULATORMODE1_VESIMEN		(1 << 3)
76 #define MC13783_REG_REGULATORMODE1_VCAMEN		(1 << 6)
77 #define MC13783_REG_REGULATORMODE1_VRFBGEN		(1 << 9)
78 #define MC13783_REG_REGULATORMODE1_VVIBEN		(1 << 11)
79 #define MC13783_REG_REGULATORMODE1_VRF1EN		(1 << 12)
80 #define MC13783_REG_REGULATORMODE1_VRF2EN		(1 << 15)
81 #define MC13783_REG_REGULATORMODE1_VMMC1EN		(1 << 18)
82 #define MC13783_REG_REGULATORMODE1_VMMC2EN		(1 << 21)
83 
84 #define MC13783_REG_POWERMISC			34
85 #define MC13783_REG_POWERMISC_GPO1EN			(1 << 6)
86 #define MC13783_REG_POWERMISC_GPO2EN			(1 << 8)
87 #define MC13783_REG_POWERMISC_GPO3EN			(1 << 10)
88 #define MC13783_REG_POWERMISC_GPO4EN			(1 << 12)
89 #define MC13783_REG_POWERMISC_PWGT1SPIEN		(1 << 15)
90 #define MC13783_REG_POWERMISC_PWGT2SPIEN		(1 << 16)
91 
92 #define MC13783_REG_POWERMISC_PWGTSPI_M			(3 << 15)
93 
94 
95 /* Voltage Values */
96 static const int mc13783_sw3_val[] = {
97 	5000000, 5000000, 5000000, 5500000,
98 };
99 
100 static const int mc13783_vaudio_val[] = {
101 	2775000,
102 };
103 
104 static const int mc13783_viohi_val[] = {
105 	2775000,
106 };
107 
108 static const int mc13783_violo_val[] = {
109 	1200000, 1300000, 1500000, 1800000,
110 };
111 
112 static const int mc13783_vdig_val[] = {
113 	1200000, 1300000, 1500000, 1800000,
114 };
115 
116 static const int mc13783_vgen_val[] = {
117 	1200000, 1300000, 1500000, 1800000,
118 	1100000, 2000000, 2775000, 2400000,
119 };
120 
121 static const int mc13783_vrfdig_val[] = {
122 	1200000, 1500000, 1800000, 1875000,
123 };
124 
125 static const int mc13783_vrfref_val[] = {
126 	2475000, 2600000, 2700000, 2775000,
127 };
128 
129 static const int mc13783_vrfcp_val[] = {
130 	2700000, 2775000,
131 };
132 
133 static const int mc13783_vsim_val[] = {
134 	1800000, 2900000, 3000000,
135 };
136 
137 static const int mc13783_vesim_val[] = {
138 	1800000, 2900000,
139 };
140 
141 static const int mc13783_vcam_val[] = {
142 	1500000, 1800000, 2500000, 2550000,
143 	2600000, 2750000, 2800000, 3000000,
144 };
145 
146 static const int mc13783_vrfbg_val[] = {
147 	1250000,
148 };
149 
150 static const int mc13783_vvib_val[] = {
151 	1300000, 1800000, 2000000, 3000000,
152 };
153 
154 static const int mc13783_vmmc_val[] = {
155 	1600000, 1800000, 2000000, 2600000,
156 	2700000, 2800000, 2900000, 3000000,
157 };
158 
159 static const int mc13783_vrf_val[] = {
160 	1500000, 1875000, 2700000, 2775000,
161 };
162 
163 static const int mc13783_gpo_val[] = {
164 	3100000,
165 };
166 
167 static const int mc13783_pwgtdrv_val[] = {
168 	5500000,
169 };
170 
171 static struct regulator_ops mc13783_gpo_regulator_ops;
172 
173 #define MC13783_DEFINE(prefix, name, reg, vsel_reg, voltages)	\
174 	MC13xxx_DEFINE(MC13783_REG_, name, reg, vsel_reg, voltages, \
175 			mc13xxx_regulator_ops)
176 
177 #define MC13783_FIXED_DEFINE(prefix, name, reg, voltages)		\
178 	MC13xxx_FIXED_DEFINE(MC13783_REG_, name, reg, voltages, \
179 			mc13xxx_fixed_regulator_ops)
180 
181 #define MC13783_GPO_DEFINE(prefix, name, reg, voltages)		\
182 	MC13xxx_GPO_DEFINE(MC13783_REG_, name, reg, voltages, \
183 			mc13783_gpo_regulator_ops)
184 
185 #define MC13783_DEFINE_SW(_name, _reg, _vsel_reg, _voltages)		\
186 	MC13783_DEFINE(REG, _name, _reg, _vsel_reg, _voltages)
187 #define MC13783_DEFINE_REGU(_name, _reg, _vsel_reg, _voltages)		\
188 	MC13783_DEFINE(REG, _name, _reg, _vsel_reg, _voltages)
189 
190 static struct mc13xxx_regulator mc13783_regulators[] = {
191 	MC13783_DEFINE_SW(SW3, SWITCHERS5, SWITCHERS5, mc13783_sw3_val),
192 
193 	MC13783_FIXED_DEFINE(REG, VAUDIO, REGULATORMODE0, mc13783_vaudio_val),
194 	MC13783_FIXED_DEFINE(REG, VIOHI, REGULATORMODE0, mc13783_viohi_val),
195 	MC13783_DEFINE_REGU(VIOLO, REGULATORMODE0, REGULATORSETTING0,	\
196 			    mc13783_violo_val),
197 	MC13783_DEFINE_REGU(VDIG, REGULATORMODE0, REGULATORSETTING0,	\
198 			    mc13783_vdig_val),
199 	MC13783_DEFINE_REGU(VGEN, REGULATORMODE0, REGULATORSETTING0,	\
200 			    mc13783_vgen_val),
201 	MC13783_DEFINE_REGU(VRFDIG, REGULATORMODE0, REGULATORSETTING0,	\
202 			    mc13783_vrfdig_val),
203 	MC13783_DEFINE_REGU(VRFREF, REGULATORMODE0, REGULATORSETTING0,	\
204 			    mc13783_vrfref_val),
205 	MC13783_DEFINE_REGU(VRFCP, REGULATORMODE0, REGULATORSETTING0,	\
206 			    mc13783_vrfcp_val),
207 	MC13783_DEFINE_REGU(VSIM, REGULATORMODE1, REGULATORSETTING0,	\
208 			    mc13783_vsim_val),
209 	MC13783_DEFINE_REGU(VESIM, REGULATORMODE1, REGULATORSETTING0,	\
210 			    mc13783_vesim_val),
211 	MC13783_DEFINE_REGU(VCAM, REGULATORMODE1, REGULATORSETTING0,	\
212 			    mc13783_vcam_val),
213 	MC13783_FIXED_DEFINE(REG, VRFBG, REGULATORMODE1, mc13783_vrfbg_val),
214 	MC13783_DEFINE_REGU(VVIB, REGULATORMODE1, REGULATORSETTING1,	\
215 			    mc13783_vvib_val),
216 	MC13783_DEFINE_REGU(VRF1, REGULATORMODE1, REGULATORSETTING1,	\
217 			    mc13783_vrf_val),
218 	MC13783_DEFINE_REGU(VRF2, REGULATORMODE1, REGULATORSETTING1,	\
219 			    mc13783_vrf_val),
220 	MC13783_DEFINE_REGU(VMMC1, REGULATORMODE1, REGULATORSETTING1,	\
221 			    mc13783_vmmc_val),
222 	MC13783_DEFINE_REGU(VMMC2, REGULATORMODE1, REGULATORSETTING1,	\
223 			    mc13783_vmmc_val),
224 	MC13783_GPO_DEFINE(REG, GPO1, POWERMISC, mc13783_gpo_val),
225 	MC13783_GPO_DEFINE(REG, GPO2, POWERMISC, mc13783_gpo_val),
226 	MC13783_GPO_DEFINE(REG, GPO3, POWERMISC, mc13783_gpo_val),
227 	MC13783_GPO_DEFINE(REG, GPO4, POWERMISC, mc13783_gpo_val),
228 	MC13783_GPO_DEFINE(REG, PWGT1SPI, POWERMISC, mc13783_pwgtdrv_val),
229 	MC13783_GPO_DEFINE(REG, PWGT2SPI, POWERMISC, mc13783_pwgtdrv_val),
230 };
231 
mc13783_powermisc_rmw(struct mc13xxx_regulator_priv * priv,u32 mask,u32 val)232 static int mc13783_powermisc_rmw(struct mc13xxx_regulator_priv *priv, u32 mask,
233 		u32 val)
234 {
235 	struct mc13xxx *mc13783 = priv->mc13xxx;
236 	int ret;
237 	u32 valread;
238 
239 	BUG_ON(val & ~mask);
240 
241 	ret = mc13xxx_reg_read(mc13783, MC13783_REG_POWERMISC, &valread);
242 	if (ret)
243 		return ret;
244 
245 	/* Update the stored state for Power Gates. */
246 	priv->powermisc_pwgt_state =
247 				(priv->powermisc_pwgt_state & ~mask) | val;
248 	priv->powermisc_pwgt_state &= MC13783_REG_POWERMISC_PWGTSPI_M;
249 
250 	/* Construct the new register value */
251 	valread = (valread & ~mask) | val;
252 	/* Overwrite the PWGTxEN with the stored version */
253 	valread = (valread & ~MC13783_REG_POWERMISC_PWGTSPI_M) |
254 						priv->powermisc_pwgt_state;
255 
256 	return mc13xxx_reg_write(mc13783, MC13783_REG_POWERMISC, valread);
257 }
258 
mc13783_gpo_regulator_enable(struct regulator_dev * rdev)259 static int mc13783_gpo_regulator_enable(struct regulator_dev *rdev)
260 {
261 	struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
262 	struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
263 	int id = rdev_get_id(rdev);
264 	int ret;
265 	u32 en_val = mc13xxx_regulators[id].enable_bit;
266 
267 	dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
268 
269 	/* Power Gate enable value is 0 */
270 	if (id == MC13783_REG_PWGT1SPI ||
271 	    id == MC13783_REG_PWGT2SPI)
272 		en_val = 0;
273 
274 	mc13xxx_lock(priv->mc13xxx);
275 	ret = mc13783_powermisc_rmw(priv, mc13xxx_regulators[id].enable_bit,
276 					en_val);
277 	mc13xxx_unlock(priv->mc13xxx);
278 
279 	return ret;
280 }
281 
mc13783_gpo_regulator_disable(struct regulator_dev * rdev)282 static int mc13783_gpo_regulator_disable(struct regulator_dev *rdev)
283 {
284 	struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
285 	struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
286 	int id = rdev_get_id(rdev);
287 	int ret;
288 	u32 dis_val = 0;
289 
290 	dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
291 
292 	/* Power Gate disable value is 1 */
293 	if (id == MC13783_REG_PWGT1SPI ||
294 	    id == MC13783_REG_PWGT2SPI)
295 		dis_val = mc13xxx_regulators[id].enable_bit;
296 
297 	mc13xxx_lock(priv->mc13xxx);
298 	ret = mc13783_powermisc_rmw(priv, mc13xxx_regulators[id].enable_bit,
299 					dis_val);
300 	mc13xxx_unlock(priv->mc13xxx);
301 
302 	return ret;
303 }
304 
mc13783_gpo_regulator_is_enabled(struct regulator_dev * rdev)305 static int mc13783_gpo_regulator_is_enabled(struct regulator_dev *rdev)
306 {
307 	struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
308 	struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
309 	int ret, id = rdev_get_id(rdev);
310 	unsigned int val;
311 
312 	mc13xxx_lock(priv->mc13xxx);
313 	ret = mc13xxx_reg_read(priv->mc13xxx, mc13xxx_regulators[id].reg, &val);
314 	mc13xxx_unlock(priv->mc13xxx);
315 
316 	if (ret)
317 		return ret;
318 
319 	/* Power Gates state is stored in powermisc_pwgt_state
320 	 * where the meaning of bits is negated */
321 	val = (val & ~MC13783_REG_POWERMISC_PWGTSPI_M) |
322 	      (priv->powermisc_pwgt_state ^ MC13783_REG_POWERMISC_PWGTSPI_M);
323 
324 	return (val & mc13xxx_regulators[id].enable_bit) != 0;
325 }
326 
327 static struct regulator_ops mc13783_gpo_regulator_ops = {
328 	.enable = mc13783_gpo_regulator_enable,
329 	.disable = mc13783_gpo_regulator_disable,
330 	.is_enabled = mc13783_gpo_regulator_is_enabled,
331 	.list_voltage = mc13xxx_regulator_list_voltage,
332 	.set_voltage = mc13xxx_fixed_regulator_set_voltage,
333 	.get_voltage = mc13xxx_fixed_regulator_get_voltage,
334 };
335 
mc13783_regulator_probe(struct platform_device * pdev)336 static int __devinit mc13783_regulator_probe(struct platform_device *pdev)
337 {
338 	struct mc13xxx_regulator_priv *priv;
339 	struct mc13xxx *mc13783 = dev_get_drvdata(pdev->dev.parent);
340 	struct mc13783_regulator_platform_data *pdata = mfd_get_data(pdev);
341 	struct mc13783_regulator_init_data *init_data;
342 	int i, ret;
343 
344 	dev_dbg(&pdev->dev, "mc13783_regulator_probe id %d\n", pdev->id);
345 
346 	priv = kzalloc(sizeof(*priv) +
347 			pdata->num_regulators * sizeof(priv->regulators[0]),
348 			GFP_KERNEL);
349 	if (!priv)
350 		return -ENOMEM;
351 
352 	priv->mc13xxx_regulators = mc13783_regulators;
353 	priv->mc13xxx = mc13783;
354 
355 	for (i = 0; i < pdata->num_regulators; i++) {
356 		init_data = &pdata->regulators[i];
357 		priv->regulators[i] = regulator_register(
358 				&mc13783_regulators[init_data->id].desc,
359 				&pdev->dev, init_data->init_data, priv);
360 
361 		if (IS_ERR(priv->regulators[i])) {
362 			dev_err(&pdev->dev, "failed to register regulator %s\n",
363 				mc13783_regulators[i].desc.name);
364 			ret = PTR_ERR(priv->regulators[i]);
365 			goto err;
366 		}
367 	}
368 
369 	platform_set_drvdata(pdev, priv);
370 
371 	return 0;
372 err:
373 	while (--i >= 0)
374 		regulator_unregister(priv->regulators[i]);
375 
376 	kfree(priv);
377 
378 	return ret;
379 }
380 
mc13783_regulator_remove(struct platform_device * pdev)381 static int __devexit mc13783_regulator_remove(struct platform_device *pdev)
382 {
383 	struct mc13xxx_regulator_priv *priv = platform_get_drvdata(pdev);
384 	struct mc13783_regulator_platform_data *pdata = mfd_get_data(pdev);
385 	int i;
386 
387 	platform_set_drvdata(pdev, NULL);
388 
389 	for (i = 0; i < pdata->num_regulators; i++)
390 		regulator_unregister(priv->regulators[i]);
391 
392 	kfree(priv);
393 	return 0;
394 }
395 
396 static struct platform_driver mc13783_regulator_driver = {
397 	.driver	= {
398 		.name	= "mc13783-regulator",
399 		.owner	= THIS_MODULE,
400 	},
401 	.remove		= __devexit_p(mc13783_regulator_remove),
402 	.probe		= mc13783_regulator_probe,
403 };
404 
mc13783_regulator_init(void)405 static int __init mc13783_regulator_init(void)
406 {
407 	return platform_driver_register(&mc13783_regulator_driver);
408 }
409 subsys_initcall(mc13783_regulator_init);
410 
mc13783_regulator_exit(void)411 static void __exit mc13783_regulator_exit(void)
412 {
413 	platform_driver_unregister(&mc13783_regulator_driver);
414 }
415 module_exit(mc13783_regulator_exit);
416 
417 MODULE_LICENSE("GPL v2");
418 MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
419 MODULE_DESCRIPTION("Regulator Driver for Freescale MC13783 PMIC");
420 MODULE_ALIAS("platform:mc13783-regulator");
421