1 #ifndef _ASM_X86_AMD_NB_H
2 #define _ASM_X86_AMD_NB_H
3 
4 #include <linux/pci.h>
5 
6 struct amd_nb_bus_dev_range {
7 	u8 bus;
8 	u8 dev_base;
9 	u8 dev_limit;
10 };
11 
12 extern const struct pci_device_id amd_nb_misc_ids[];
13 extern const struct amd_nb_bus_dev_range amd_nb_bus_dev_ranges[];
14 struct bootnode;
15 
16 extern bool early_is_amd_nb(u32 value);
17 extern int amd_cache_northbridges(void);
18 extern void amd_flush_garts(void);
19 extern int amd_numa_init(void);
20 extern int amd_get_subcaches(int);
21 extern int amd_set_subcaches(int, int);
22 
23 struct amd_northbridge {
24 	struct pci_dev *misc;
25 	struct pci_dev *link;
26 };
27 
28 struct amd_northbridge_info {
29 	u16 num;
30 	u64 flags;
31 	struct amd_northbridge *nb;
32 };
33 extern struct amd_northbridge_info amd_northbridges;
34 
35 #define AMD_NB_GART			BIT(0)
36 #define AMD_NB_L3_INDEX_DISABLE		BIT(1)
37 #define AMD_NB_L3_PARTITIONING		BIT(2)
38 
39 #ifdef CONFIG_AMD_NB
40 
amd_nb_num(void)41 static inline u16 amd_nb_num(void)
42 {
43 	return amd_northbridges.num;
44 }
45 
amd_nb_has_feature(unsigned feature)46 static inline bool amd_nb_has_feature(unsigned feature)
47 {
48 	return ((amd_northbridges.flags & feature) == feature);
49 }
50 
node_to_amd_nb(int node)51 static inline struct amd_northbridge *node_to_amd_nb(int node)
52 {
53 	return (node < amd_northbridges.num) ? &amd_northbridges.nb[node] : NULL;
54 }
55 
56 #else
57 
58 #define amd_nb_num(x)		0
59 #define amd_nb_has_feature(x)	false
60 #define node_to_amd_nb(x)	NULL
61 
62 #endif
63 
64 
65 #endif /* _ASM_X86_AMD_NB_H */
66