1 /* 2 * Copyright 2010 Tilera Corporation. All Rights Reserved. 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * as published by the Free Software Foundation, version 2. 7 * 8 * This program is distributed in the hope that it will be useful, but 9 * WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 11 * NON INFRINGEMENT. See the GNU General Public License for 12 * more details. 13 */ 14 15 #ifndef _ASM_TILE_PTRACE_H 16 #define _ASM_TILE_PTRACE_H 17 18 #include <arch/chip.h> 19 #include <arch/abi.h> 20 21 /* These must match struct pt_regs, below. */ 22 #if CHIP_WORD_SIZE() == 32 23 #define PTREGS_OFFSET_REG(n) ((n)*4) 24 #else 25 #define PTREGS_OFFSET_REG(n) ((n)*8) 26 #endif 27 #define PTREGS_OFFSET_BASE 0 28 #define PTREGS_OFFSET_TP PTREGS_OFFSET_REG(53) 29 #define PTREGS_OFFSET_SP PTREGS_OFFSET_REG(54) 30 #define PTREGS_OFFSET_LR PTREGS_OFFSET_REG(55) 31 #define PTREGS_NR_GPRS 56 32 #define PTREGS_OFFSET_PC PTREGS_OFFSET_REG(56) 33 #define PTREGS_OFFSET_EX1 PTREGS_OFFSET_REG(57) 34 #define PTREGS_OFFSET_FAULTNUM PTREGS_OFFSET_REG(58) 35 #define PTREGS_OFFSET_ORIG_R0 PTREGS_OFFSET_REG(59) 36 #define PTREGS_OFFSET_FLAGS PTREGS_OFFSET_REG(60) 37 #if CHIP_HAS_CMPEXCH() 38 #define PTREGS_OFFSET_CMPEXCH PTREGS_OFFSET_REG(61) 39 #endif 40 #define PTREGS_SIZE PTREGS_OFFSET_REG(64) 41 42 #ifndef __ASSEMBLY__ 43 44 #ifdef __KERNEL__ 45 /* Benefit from consistent use of "long" on all chips. */ 46 typedef unsigned long pt_reg_t; 47 #else 48 /* Provide appropriate length type to userspace regardless of -m32/-m64. */ 49 typedef uint_reg_t pt_reg_t; 50 #endif 51 52 /* 53 * This struct defines the way the registers are stored on the stack during a 54 * system call or exception. "struct sigcontext" has the same shape. 55 */ 56 struct pt_regs { 57 /* Saved main processor registers; 56..63 are special. */ 58 /* tp, sp, and lr must immediately follow regs[] for aliasing. */ 59 pt_reg_t regs[53]; 60 pt_reg_t tp; /* aliases regs[TREG_TP] */ 61 pt_reg_t sp; /* aliases regs[TREG_SP] */ 62 pt_reg_t lr; /* aliases regs[TREG_LR] */ 63 64 /* Saved special registers. */ 65 pt_reg_t pc; /* stored in EX_CONTEXT_K_0 */ 66 pt_reg_t ex1; /* stored in EX_CONTEXT_K_1 (PL and ICS bit) */ 67 pt_reg_t faultnum; /* fault number (INT_SWINT_1 for syscall) */ 68 pt_reg_t orig_r0; /* r0 at syscall entry, else zero */ 69 pt_reg_t flags; /* flags (see below) */ 70 #if !CHIP_HAS_CMPEXCH() 71 pt_reg_t pad[3]; 72 #else 73 pt_reg_t cmpexch; /* value of CMPEXCH_VALUE SPR at interrupt */ 74 pt_reg_t pad[2]; 75 #endif 76 }; 77 78 #endif /* __ASSEMBLY__ */ 79 80 #define PTRACE_GETREGS 12 81 #define PTRACE_SETREGS 13 82 #define PTRACE_GETFPREGS 14 83 #define PTRACE_SETFPREGS 15 84 85 /* Support TILE-specific ptrace options, with events starting at 16. */ 86 #define PTRACE_O_TRACEMIGRATE 0x00010000 87 #define PTRACE_EVENT_MIGRATE 16 88 #ifdef __KERNEL__ 89 #define PTRACE_O_MASK_TILE (PTRACE_O_TRACEMIGRATE) 90 #define PT_TRACE_MIGRATE 0x00080000 91 #define PT_TRACE_MASK_TILE (PT_TRACE_MIGRATE) 92 #endif 93 94 #ifdef __KERNEL__ 95 96 /* Flag bits in pt_regs.flags */ 97 #define PT_FLAGS_DISABLE_IRQ 1 /* on return to kernel, disable irqs */ 98 #define PT_FLAGS_CALLER_SAVES 2 /* caller-save registers are valid */ 99 #define PT_FLAGS_RESTORE_REGS 4 /* restore callee-save regs on return */ 100 101 #ifndef __ASSEMBLY__ 102 103 #define instruction_pointer(regs) ((regs)->pc) 104 #define profile_pc(regs) instruction_pointer(regs) 105 106 /* Does the process account for user or for system time? */ 107 #define user_mode(regs) (EX1_PL((regs)->ex1) == USER_PL) 108 109 /* Fill in a struct pt_regs with the current kernel registers. */ 110 struct pt_regs *get_pt_regs(struct pt_regs *); 111 112 /* Trace the current syscall. */ 113 extern void do_syscall_trace(void); 114 115 extern void show_regs(struct pt_regs *); 116 117 #define arch_has_single_step() (1) 118 119 /* 120 * A structure for all single-stepper state. 121 * 122 * Also update defines in assembler section if it changes 123 */ 124 struct single_step_state { 125 /* the page to which we will write hacked-up bundles */ 126 void __user *buffer; 127 128 union { 129 int flags; 130 struct { 131 unsigned long is_enabled:1, update:1, update_reg:6; 132 }; 133 }; 134 135 unsigned long orig_pc; /* the original PC */ 136 unsigned long next_pc; /* return PC if no branch (PC + 1) */ 137 unsigned long branch_next_pc; /* return PC if we did branch/jump */ 138 unsigned long update_value; /* value to restore to update_target */ 139 }; 140 141 /* Single-step the instruction at regs->pc */ 142 extern void single_step_once(struct pt_regs *regs); 143 144 /* Clean up after execve(). */ 145 extern void single_step_execve(void); 146 147 struct task_struct; 148 149 extern void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs, 150 int error_code); 151 152 #ifdef __tilegx__ 153 /* We need this since sigval_t has a user pointer in it, for GETSIGINFO etc. */ 154 #define __ARCH_WANT_COMPAT_SYS_PTRACE 155 #endif 156 157 #endif /* !__ASSEMBLY__ */ 158 159 #define SINGLESTEP_STATE_MASK_IS_ENABLED 0x1 160 #define SINGLESTEP_STATE_MASK_UPDATE 0x2 161 #define SINGLESTEP_STATE_TARGET_LB 2 162 #define SINGLESTEP_STATE_TARGET_UB 7 163 164 #endif /* !__KERNEL__ */ 165 166 #endif /* _ASM_TILE_PTRACE_H */ 167