1 /* 2 * omap_hwmod macros, structures 3 * 4 * Copyright (C) 2009-2011 Nokia Corporation 5 * Paul Walmsley 6 * 7 * Created in collaboration with (alphabetical order): Benoît Cousson, 8 * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari 9 * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License version 2 as 13 * published by the Free Software Foundation. 14 * 15 * These headers and macros are used to define OMAP on-chip module 16 * data and their integration with other OMAP modules and Linux. 17 * Copious documentation and references can also be found in the 18 * omap_hwmod code, in arch/arm/mach-omap2/omap_hwmod.c (as of this 19 * writing). 20 * 21 * To do: 22 * - add interconnect error log structures 23 * - add pinmuxing 24 * - init_conn_id_bit (CONNID_BIT_VECTOR) 25 * - implement default hwmod SMS/SDRC flags? 26 * - move Linux-specific data ("non-ROM data") out 27 * 28 */ 29 #ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H 30 #define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H 31 32 #include <linux/kernel.h> 33 #include <linux/init.h> 34 #include <linux/list.h> 35 #include <linux/ioport.h> 36 #include <linux/spinlock.h> 37 #include <plat/cpu.h> 38 39 struct omap_device; 40 41 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type1; 42 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2; 43 44 /* 45 * OCP SYSCONFIG bit shifts/masks TYPE1. These are for IPs compliant 46 * with the original PRCM protocol defined for OMAP2420 47 */ 48 #define SYSC_TYPE1_MIDLEMODE_SHIFT 12 49 #define SYSC_TYPE1_MIDLEMODE_MASK (0x3 << SYSC_MIDLEMODE_SHIFT) 50 #define SYSC_TYPE1_CLOCKACTIVITY_SHIFT 8 51 #define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3 << SYSC_CLOCKACTIVITY_SHIFT) 52 #define SYSC_TYPE1_SIDLEMODE_SHIFT 3 53 #define SYSC_TYPE1_SIDLEMODE_MASK (0x3 << SYSC_SIDLEMODE_SHIFT) 54 #define SYSC_TYPE1_ENAWAKEUP_SHIFT 2 55 #define SYSC_TYPE1_ENAWAKEUP_MASK (1 << SYSC_ENAWAKEUP_SHIFT) 56 #define SYSC_TYPE1_SOFTRESET_SHIFT 1 57 #define SYSC_TYPE1_SOFTRESET_MASK (1 << SYSC_SOFTRESET_SHIFT) 58 #define SYSC_TYPE1_AUTOIDLE_SHIFT 0 59 #define SYSC_TYPE1_AUTOIDLE_MASK (1 << SYSC_AUTOIDLE_SHIFT) 60 61 /* 62 * OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant 63 * with the new PRCM protocol defined for new OMAP4 IPs. 64 */ 65 #define SYSC_TYPE2_SOFTRESET_SHIFT 0 66 #define SYSC_TYPE2_SOFTRESET_MASK (1 << SYSC_TYPE2_SOFTRESET_SHIFT) 67 #define SYSC_TYPE2_SIDLEMODE_SHIFT 2 68 #define SYSC_TYPE2_SIDLEMODE_MASK (0x3 << SYSC_TYPE2_SIDLEMODE_SHIFT) 69 #define SYSC_TYPE2_MIDLEMODE_SHIFT 4 70 #define SYSC_TYPE2_MIDLEMODE_MASK (0x3 << SYSC_TYPE2_MIDLEMODE_SHIFT) 71 72 /* OCP SYSSTATUS bit shifts/masks */ 73 #define SYSS_RESETDONE_SHIFT 0 74 #define SYSS_RESETDONE_MASK (1 << SYSS_RESETDONE_SHIFT) 75 76 /* Master standby/slave idle mode flags */ 77 #define HWMOD_IDLEMODE_FORCE (1 << 0) 78 #define HWMOD_IDLEMODE_NO (1 << 1) 79 #define HWMOD_IDLEMODE_SMART (1 << 2) 80 /* Slave idle mode flag only */ 81 #define HWMOD_IDLEMODE_SMART_WKUP (1 << 3) 82 83 /** 84 * struct omap_hwmod_mux_info - hwmod specific mux configuration 85 * @pads: array of omap_device_pad entries 86 * @nr_pads: number of omap_device_pad entries 87 * 88 * Note that this is currently built during init as needed. 89 */ 90 struct omap_hwmod_mux_info { 91 int nr_pads; 92 struct omap_device_pad *pads; 93 int nr_pads_dynamic; 94 struct omap_device_pad **pads_dynamic; 95 bool enabled; 96 }; 97 98 /** 99 * struct omap_hwmod_irq_info - MPU IRQs used by the hwmod 100 * @name: name of the IRQ channel (module local name) 101 * @irq_ch: IRQ channel ID 102 * 103 * @name should be something short, e.g., "tx" or "rx". It is for use 104 * by platform_get_resource_byname(). It is defined locally to the 105 * hwmod. 106 */ 107 struct omap_hwmod_irq_info { 108 const char *name; 109 u16 irq; 110 }; 111 112 /** 113 * struct omap_hwmod_dma_info - DMA channels used by the hwmod 114 * @name: name of the DMA channel (module local name) 115 * @dma_req: DMA request ID 116 * 117 * @name should be something short, e.g., "tx" or "rx". It is for use 118 * by platform_get_resource_byname(). It is defined locally to the 119 * hwmod. 120 */ 121 struct omap_hwmod_dma_info { 122 const char *name; 123 u16 dma_req; 124 }; 125 126 /** 127 * struct omap_hwmod_rst_info - IPs reset lines use by hwmod 128 * @name: name of the reset line (module local name) 129 * @rst_shift: Offset of the reset bit 130 * @st_shift: Offset of the reset status bit (OMAP2/3 only) 131 * 132 * @name should be something short, e.g., "cpu0" or "rst". It is defined 133 * locally to the hwmod. 134 */ 135 struct omap_hwmod_rst_info { 136 const char *name; 137 u8 rst_shift; 138 u8 st_shift; 139 }; 140 141 /** 142 * struct omap_hwmod_opt_clk - optional clocks used by this hwmod 143 * @role: "sys", "32k", "tv", etc -- for use in clk_get() 144 * @clk: opt clock: OMAP clock name 145 * @_clk: pointer to the struct clk (filled in at runtime) 146 * 147 * The module's interface clock and main functional clock should not 148 * be added as optional clocks. 149 */ 150 struct omap_hwmod_opt_clk { 151 const char *role; 152 const char *clk; 153 struct clk *_clk; 154 }; 155 156 157 /* omap_hwmod_omap2_firewall.flags bits */ 158 #define OMAP_FIREWALL_L3 (1 << 0) 159 #define OMAP_FIREWALL_L4 (1 << 1) 160 161 /** 162 * struct omap_hwmod_omap2_firewall - OMAP2/3 device firewall data 163 * @l3_perm_bit: bit shift for L3_PM_*_PERMISSION_* 164 * @l4_fw_region: L4 firewall region ID 165 * @l4_prot_group: L4 protection group ID 166 * @flags: (see omap_hwmod_omap2_firewall.flags macros above) 167 */ 168 struct omap_hwmod_omap2_firewall { 169 u8 l3_perm_bit; 170 u8 l4_fw_region; 171 u8 l4_prot_group; 172 u8 flags; 173 }; 174 175 176 /* 177 * omap_hwmod_addr_space.flags bits 178 * 179 * ADDR_MAP_ON_INIT: Map this address space during omap_hwmod init. 180 * ADDR_TYPE_RT: Address space contains module register target data. 181 */ 182 #define ADDR_MAP_ON_INIT (1 << 0) /* XXX does not belong */ 183 #define ADDR_TYPE_RT (1 << 1) 184 185 /** 186 * struct omap_hwmod_addr_space - address space handled by the hwmod 187 * @name: name of the address space 188 * @pa_start: starting physical address 189 * @pa_end: ending physical address 190 * @flags: (see omap_hwmod_addr_space.flags macros above) 191 * 192 * Address space doesn't necessarily follow physical interconnect 193 * structure. GPMC is one example. 194 */ 195 struct omap_hwmod_addr_space { 196 const char *name; 197 u32 pa_start; 198 u32 pa_end; 199 u8 flags; 200 }; 201 202 203 /* 204 * omap_hwmod_ocp_if.user bits: these indicate the initiators that use this 205 * interface to interact with the hwmod. Used to add sleep dependencies 206 * when the module is enabled or disabled. 207 */ 208 #define OCP_USER_MPU (1 << 0) 209 #define OCP_USER_SDMA (1 << 1) 210 211 /* omap_hwmod_ocp_if.flags bits */ 212 #define OCPIF_SWSUP_IDLE (1 << 0) 213 #define OCPIF_CAN_BURST (1 << 1) 214 215 /** 216 * struct omap_hwmod_ocp_if - OCP interface data 217 * @master: struct omap_hwmod that initiates OCP transactions on this link 218 * @slave: struct omap_hwmod that responds to OCP transactions on this link 219 * @addr: address space associated with this link 220 * @clk: interface clock: OMAP clock name 221 * @_clk: pointer to the interface struct clk (filled in at runtime) 222 * @fw: interface firewall data 223 * @addr_cnt: ARRAY_SIZE(@addr) 224 * @width: OCP data width 225 * @user: initiators using this interface (see OCP_USER_* macros above) 226 * @flags: OCP interface flags (see OCPIF_* macros above) 227 * 228 * It may also be useful to add a tag_cnt field for OCP2.x devices. 229 * 230 * Parameter names beginning with an underscore are managed internally by 231 * the omap_hwmod code and should not be set during initialization. 232 */ 233 struct omap_hwmod_ocp_if { 234 struct omap_hwmod *master; 235 struct omap_hwmod *slave; 236 struct omap_hwmod_addr_space *addr; 237 const char *clk; 238 struct clk *_clk; 239 union { 240 struct omap_hwmod_omap2_firewall omap2; 241 } fw; 242 u8 addr_cnt; 243 u8 width; 244 u8 user; 245 u8 flags; 246 }; 247 248 249 /* Macros for use in struct omap_hwmod_sysconfig */ 250 251 /* Flags for use in omap_hwmod_sysconfig.idlemodes */ 252 #define MASTER_STANDBY_SHIFT 4 253 #define SLAVE_IDLE_SHIFT 0 254 #define SIDLE_FORCE (HWMOD_IDLEMODE_FORCE << SLAVE_IDLE_SHIFT) 255 #define SIDLE_NO (HWMOD_IDLEMODE_NO << SLAVE_IDLE_SHIFT) 256 #define SIDLE_SMART (HWMOD_IDLEMODE_SMART << SLAVE_IDLE_SHIFT) 257 #define SIDLE_SMART_WKUP (HWMOD_IDLEMODE_SMART_WKUP << SLAVE_IDLE_SHIFT) 258 #define MSTANDBY_FORCE (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT) 259 #define MSTANDBY_NO (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT) 260 #define MSTANDBY_SMART (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT) 261 262 /* omap_hwmod_sysconfig.sysc_flags capability flags */ 263 #define SYSC_HAS_AUTOIDLE (1 << 0) 264 #define SYSC_HAS_SOFTRESET (1 << 1) 265 #define SYSC_HAS_ENAWAKEUP (1 << 2) 266 #define SYSC_HAS_EMUFREE (1 << 3) 267 #define SYSC_HAS_CLOCKACTIVITY (1 << 4) 268 #define SYSC_HAS_SIDLEMODE (1 << 5) 269 #define SYSC_HAS_MIDLEMODE (1 << 6) 270 #define SYSS_HAS_RESET_STATUS (1 << 7) 271 #define SYSC_NO_CACHE (1 << 8) /* XXX SW flag, belongs elsewhere */ 272 #define SYSC_HAS_RESET_STATUS (1 << 9) 273 274 /* omap_hwmod_sysconfig.clockact flags */ 275 #define CLOCKACT_TEST_BOTH 0x0 276 #define CLOCKACT_TEST_MAIN 0x1 277 #define CLOCKACT_TEST_ICLK 0x2 278 #define CLOCKACT_TEST_NONE 0x3 279 280 /** 281 * struct omap_hwmod_sysc_fields - hwmod OCP_SYSCONFIG register field offsets. 282 * @midle_shift: Offset of the midle bit 283 * @clkact_shift: Offset of the clockactivity bit 284 * @sidle_shift: Offset of the sidle bit 285 * @enwkup_shift: Offset of the enawakeup bit 286 * @srst_shift: Offset of the softreset bit 287 * @autoidle_shift: Offset of the autoidle bit 288 */ 289 struct omap_hwmod_sysc_fields { 290 u8 midle_shift; 291 u8 clkact_shift; 292 u8 sidle_shift; 293 u8 enwkup_shift; 294 u8 srst_shift; 295 u8 autoidle_shift; 296 }; 297 298 /** 299 * struct omap_hwmod_class_sysconfig - hwmod class OCP_SYS* data 300 * @rev_offs: IP block revision register offset (from module base addr) 301 * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr) 302 * @syss_offs: OCP_SYSSTATUS register offset (from module base addr) 303 * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART} 304 * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported 305 * @clockact: the default value of the module CLOCKACTIVITY bits 306 * 307 * @clockact describes to the module which clocks are likely to be 308 * disabled when the PRCM issues its idle request to the module. Some 309 * modules have separate clockdomains for the interface clock and main 310 * functional clock, and can check whether they should acknowledge the 311 * idle request based on the internal module functionality that has 312 * been associated with the clocks marked in @clockact. This field is 313 * only used if HWMOD_SET_DEFAULT_CLOCKACT is set (see below) 314 * 315 * @sysc_fields: structure containing the offset positions of various bits in 316 * SYSCONFIG register. This can be populated using omap_hwmod_sysc_type1 or 317 * omap_hwmod_sysc_type2 defined in omap_hwmod_common_data.c depending on 318 * whether the device ip is compliant with the original PRCM protocol 319 * defined for OMAP2420 or the new PRCM protocol for new OMAP4 IPs. 320 * If the device follows a different scheme for the sysconfig register , 321 * then this field has to be populated with the correct offset structure. 322 */ 323 struct omap_hwmod_class_sysconfig { 324 u16 rev_offs; 325 u16 sysc_offs; 326 u16 syss_offs; 327 u16 sysc_flags; 328 u8 idlemodes; 329 u8 clockact; 330 struct omap_hwmod_sysc_fields *sysc_fields; 331 }; 332 333 /** 334 * struct omap_hwmod_omap2_prcm - OMAP2/3-specific PRCM data 335 * @module_offs: PRCM submodule offset from the start of the PRM/CM 336 * @prcm_reg_id: PRCM register ID (e.g., 3 for CM_AUTOIDLE3) 337 * @module_bit: register bit shift for AUTOIDLE, WKST, WKEN, GRPSEL regs 338 * @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3) 339 * @idlest_idle_bit: register bit shift for CM_IDLEST slave idle bit 340 * @idlest_stdby_bit: register bit shift for CM_IDLEST master standby bit 341 * 342 * @prcm_reg_id and @module_bit are specific to the AUTOIDLE, WKST, 343 * WKEN, GRPSEL registers. In an ideal world, no extra information 344 * would be needed for IDLEST information, but alas, there are some 345 * exceptions, so @idlest_reg_id, @idlest_idle_bit, @idlest_stdby_bit 346 * are needed for the IDLEST registers (c.f. 2430 I2CHS, 3430 USBHOST) 347 */ 348 struct omap_hwmod_omap2_prcm { 349 s16 module_offs; 350 u8 prcm_reg_id; 351 u8 module_bit; 352 u8 idlest_reg_id; 353 u8 idlest_idle_bit; 354 u8 idlest_stdby_bit; 355 }; 356 357 358 /** 359 * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data 360 * @clkctrl_reg: PRCM address of the clock control register 361 * @rstctrl_reg: address of the XXX_RSTCTRL register located in the PRM 362 * @submodule_wkdep_bit: bit shift of the WKDEP range 363 */ 364 struct omap_hwmod_omap4_prcm { 365 void __iomem *clkctrl_reg; 366 void __iomem *rstctrl_reg; 367 u8 submodule_wkdep_bit; 368 }; 369 370 371 /* 372 * omap_hwmod.flags definitions 373 * 374 * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out 375 * of idle, rather than relying on module smart-idle 376 * HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out 377 * of standby, rather than relying on module smart-standby 378 * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for 379 * SDRAM controller, etc. XXX probably belongs outside the main hwmod file 380 * XXX Should be HWMOD_SETUP_NO_RESET 381 * HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM 382 * controller, etc. XXX probably belongs outside the main hwmod file 383 * XXX Should be HWMOD_SETUP_NO_IDLE 384 * HWMOD_NO_OCP_AUTOIDLE: disable module autoidle (OCP_SYSCONFIG.AUTOIDLE) 385 * when module is enabled, rather than the default, which is to 386 * enable autoidle 387 * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup 388 * HWMOD_NO_IDLEST: this module does not have idle status - this is the case 389 * only for few initiator modules on OMAP2 & 3. 390 * HWMOD_CONTROL_OPT_CLKS_IN_RESET: Enable all optional clocks during reset. 391 * This is needed for devices like DSS that require optional clocks enabled 392 * in order to complete the reset. Optional clocks will be disabled 393 * again after the reset. 394 * HWMOD_16BIT_REG: Module has 16bit registers 395 */ 396 #define HWMOD_SWSUP_SIDLE (1 << 0) 397 #define HWMOD_SWSUP_MSTANDBY (1 << 1) 398 #define HWMOD_INIT_NO_RESET (1 << 2) 399 #define HWMOD_INIT_NO_IDLE (1 << 3) 400 #define HWMOD_NO_OCP_AUTOIDLE (1 << 4) 401 #define HWMOD_SET_DEFAULT_CLOCKACT (1 << 5) 402 #define HWMOD_NO_IDLEST (1 << 6) 403 #define HWMOD_CONTROL_OPT_CLKS_IN_RESET (1 << 7) 404 #define HWMOD_16BIT_REG (1 << 8) 405 406 /* 407 * omap_hwmod._int_flags definitions 408 * These are for internal use only and are managed by the omap_hwmod code. 409 * 410 * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module 411 * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP 412 * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached 413 */ 414 #define _HWMOD_NO_MPU_PORT (1 << 0) 415 #define _HWMOD_WAKEUP_ENABLED (1 << 1) 416 #define _HWMOD_SYSCONFIG_LOADED (1 << 2) 417 418 /* 419 * omap_hwmod._state definitions 420 * 421 * INITIALIZED: reset (optionally), initialized, enabled, disabled 422 * (optionally) 423 * 424 * 425 */ 426 #define _HWMOD_STATE_UNKNOWN 0 427 #define _HWMOD_STATE_REGISTERED 1 428 #define _HWMOD_STATE_CLKS_INITED 2 429 #define _HWMOD_STATE_INITIALIZED 3 430 #define _HWMOD_STATE_ENABLED 4 431 #define _HWMOD_STATE_IDLE 5 432 #define _HWMOD_STATE_DISABLED 6 433 434 /** 435 * struct omap_hwmod_class - the type of an IP block 436 * @name: name of the hwmod_class 437 * @sysc: device SYSCONFIG/SYSSTATUS register data 438 * @rev: revision of the IP class 439 * @pre_shutdown: ptr to fn to be executed immediately prior to device shutdown 440 * @reset: ptr to fn to be executed in place of the standard hwmod reset fn 441 * 442 * Represent the class of a OMAP hardware "modules" (e.g. timer, 443 * smartreflex, gpio, uart...) 444 * 445 * @pre_shutdown is a function that will be run immediately before 446 * hwmod clocks are disabled, etc. It is intended for use for hwmods 447 * like the MPU watchdog, which cannot be disabled with the standard 448 * omap_hwmod_shutdown(). The function should return 0 upon success, 449 * or some negative error upon failure. Returning an error will cause 450 * omap_hwmod_shutdown() to abort the device shutdown and return an 451 * error. 452 * 453 * If @reset is defined, then the function it points to will be 454 * executed in place of the standard hwmod _reset() code in 455 * mach-omap2/omap_hwmod.c. This is needed for IP blocks which have 456 * unusual reset sequences - usually processor IP blocks like the IVA. 457 */ 458 struct omap_hwmod_class { 459 const char *name; 460 struct omap_hwmod_class_sysconfig *sysc; 461 u32 rev; 462 int (*pre_shutdown)(struct omap_hwmod *oh); 463 int (*reset)(struct omap_hwmod *oh); 464 }; 465 466 /** 467 * struct omap_hwmod - integration data for OMAP hardware "modules" (IP blocks) 468 * @name: name of the hwmod 469 * @class: struct omap_hwmod_class * to the class of this hwmod 470 * @od: struct omap_device currently associated with this hwmod (internal use) 471 * @mpu_irqs: ptr to an array of MPU IRQs (see also mpu_irqs_cnt) 472 * @sdma_reqs: ptr to an array of System DMA request IDs (see sdma_reqs_cnt) 473 * @prcm: PRCM data pertaining to this hwmod 474 * @main_clk: main clock: OMAP clock name 475 * @_clk: pointer to the main struct clk (filled in at runtime) 476 * @opt_clks: other device clocks that drivers can request (0..*) 477 * @vdd_name: voltage domain name 478 * @voltdm: pointer to voltage domain (filled in at runtime) 479 * @masters: ptr to array of OCP ifs that this hwmod can initiate on 480 * @slaves: ptr to array of OCP ifs that this hwmod can respond on 481 * @dev_attr: arbitrary device attributes that can be passed to the driver 482 * @_sysc_cache: internal-use hwmod flags 483 * @_mpu_rt_va: cached register target start address (internal use) 484 * @_mpu_port_index: cached MPU register target slave ID (internal use) 485 * @mpu_irqs_cnt: number of @mpu_irqs 486 * @sdma_reqs_cnt: number of @sdma_reqs 487 * @opt_clks_cnt: number of @opt_clks 488 * @master_cnt: number of @master entries 489 * @slaves_cnt: number of @slave entries 490 * @response_lat: device OCP response latency (in interface clock cycles) 491 * @_int_flags: internal-use hwmod flags 492 * @_state: internal-use hwmod state 493 * @_postsetup_state: internal-use state to leave the hwmod in after _setup() 494 * @flags: hwmod flags (documented below) 495 * @omap_chip: OMAP chips this hwmod is present on 496 * @_lock: spinlock serializing operations on this hwmod 497 * @node: list node for hwmod list (internal use) 498 * 499 * @main_clk refers to this module's "main clock," which for our 500 * purposes is defined as "the functional clock needed for register 501 * accesses to complete." Modules may not have a main clock if the 502 * interface clock also serves as a main clock. 503 * 504 * Parameter names beginning with an underscore are managed internally by 505 * the omap_hwmod code and should not be set during initialization. 506 */ 507 struct omap_hwmod { 508 const char *name; 509 struct omap_hwmod_class *class; 510 struct omap_device *od; 511 struct omap_hwmod_mux_info *mux; 512 struct omap_hwmod_irq_info *mpu_irqs; 513 struct omap_hwmod_dma_info *sdma_reqs; 514 struct omap_hwmod_rst_info *rst_lines; 515 union { 516 struct omap_hwmod_omap2_prcm omap2; 517 struct omap_hwmod_omap4_prcm omap4; 518 } prcm; 519 const char *main_clk; 520 struct clk *_clk; 521 struct omap_hwmod_opt_clk *opt_clks; 522 char *vdd_name; 523 struct voltagedomain *voltdm; 524 struct omap_hwmod_ocp_if **masters; /* connect to *_IA */ 525 struct omap_hwmod_ocp_if **slaves; /* connect to *_TA */ 526 void *dev_attr; 527 u32 _sysc_cache; 528 void __iomem *_mpu_rt_va; 529 spinlock_t _lock; 530 struct list_head node; 531 u16 flags; 532 u8 _mpu_port_index; 533 u8 response_lat; 534 u8 mpu_irqs_cnt; 535 u8 sdma_reqs_cnt; 536 u8 rst_lines_cnt; 537 u8 opt_clks_cnt; 538 u8 masters_cnt; 539 u8 slaves_cnt; 540 u8 hwmods_cnt; 541 u8 _int_flags; 542 u8 _state; 543 u8 _postsetup_state; 544 const struct omap_chip_id omap_chip; 545 }; 546 547 int omap_hwmod_register(struct omap_hwmod **ohs); 548 struct omap_hwmod *omap_hwmod_lookup(const char *name); 549 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data), 550 void *data); 551 552 int __init omap_hwmod_setup_one(const char *name); 553 554 int omap_hwmod_enable(struct omap_hwmod *oh); 555 int _omap_hwmod_enable(struct omap_hwmod *oh); 556 int omap_hwmod_idle(struct omap_hwmod *oh); 557 int _omap_hwmod_idle(struct omap_hwmod *oh); 558 int omap_hwmod_shutdown(struct omap_hwmod *oh); 559 560 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name); 561 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name); 562 int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name); 563 564 int omap_hwmod_enable_clocks(struct omap_hwmod *oh); 565 int omap_hwmod_disable_clocks(struct omap_hwmod *oh); 566 567 int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode); 568 int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle); 569 570 int omap_hwmod_reset(struct omap_hwmod *oh); 571 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh); 572 573 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs); 574 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs); 575 576 int omap_hwmod_count_resources(struct omap_hwmod *oh); 577 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res); 578 579 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh); 580 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh); 581 582 int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh, 583 struct omap_hwmod *init_oh); 584 int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh, 585 struct omap_hwmod *init_oh); 586 587 int omap_hwmod_set_clockact_both(struct omap_hwmod *oh); 588 int omap_hwmod_set_clockact_main(struct omap_hwmod *oh); 589 int omap_hwmod_set_clockact_iclk(struct omap_hwmod *oh); 590 int omap_hwmod_set_clockact_none(struct omap_hwmod *oh); 591 592 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh); 593 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh); 594 595 int omap_hwmod_for_each_by_class(const char *classname, 596 int (*fn)(struct omap_hwmod *oh, 597 void *user), 598 void *user); 599 600 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state); 601 u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh); 602 603 int omap_hwmod_no_setup_reset(struct omap_hwmod *oh); 604 605 /* 606 * Chip variant-specific hwmod init routines - XXX should be converted 607 * to use initcalls once the initial boot ordering is straightened out 608 */ 609 extern int omap2420_hwmod_init(void); 610 extern int omap2430_hwmod_init(void); 611 extern int omap3xxx_hwmod_init(void); 612 extern int omap44xx_hwmod_init(void); 613 614 #endif 615