1 /* linux/arch/arm/mach-exynos4/include/mach/irqs.h
2  *
3  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4  *		http://www.samsung.com
5  *
6  * EXYNOS4 - IRQ definitions
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11 */
12 
13 #ifndef __ASM_ARCH_IRQS_H
14 #define __ASM_ARCH_IRQS_H __FILE__
15 
16 #include <plat/irqs.h>
17 
18 /* PPI: Private Peripheral Interrupt */
19 
20 #define IRQ_PPI(x)		S5P_IRQ(x+16)
21 
22 #define IRQ_LOCALTIMER		IRQ_PPI(13)
23 
24 /* SPI: Shared Peripheral Interrupt */
25 
26 #define IRQ_SPI(x)		S5P_IRQ(x+32)
27 
28 #define IRQ_MCT1		IRQ_SPI(35)
29 
30 #define IRQ_EINT0		IRQ_SPI(40)
31 #define IRQ_EINT1		IRQ_SPI(41)
32 #define IRQ_EINT2		IRQ_SPI(42)
33 #define IRQ_EINT3		IRQ_SPI(43)
34 #define IRQ_USB_HSOTG		IRQ_SPI(44)
35 #define IRQ_USB_HOST		IRQ_SPI(45)
36 #define IRQ_MODEM_IF		IRQ_SPI(46)
37 #define IRQ_ROTATOR		IRQ_SPI(47)
38 #define IRQ_JPEG		IRQ_SPI(48)
39 #define IRQ_2D			IRQ_SPI(49)
40 #define IRQ_PCIE		IRQ_SPI(50)
41 #define IRQ_MCT0		IRQ_SPI(51)
42 #define IRQ_MFC			IRQ_SPI(52)
43 #define IRQ_AUDIO_SS		IRQ_SPI(54)
44 #define IRQ_AC97		IRQ_SPI(55)
45 #define IRQ_SPDIF		IRQ_SPI(56)
46 #define IRQ_KEYPAD		IRQ_SPI(57)
47 #define IRQ_INTFEEDCTRL_SSS	IRQ_SPI(58)
48 #define IRQ_SLIMBUS		IRQ_SPI(59)
49 #define IRQ_PMU			IRQ_SPI(60)
50 #define IRQ_TSI			IRQ_SPI(61)
51 #define IRQ_SATA		IRQ_SPI(62)
52 #define IRQ_GPS			IRQ_SPI(63)
53 
54 #define MAX_IRQ_IN_COMBINER	8
55 #define COMBINER_GROUP(x)	((x) * MAX_IRQ_IN_COMBINER + IRQ_SPI(64))
56 #define COMBINER_IRQ(x, y)	(COMBINER_GROUP(x) + y)
57 
58 #define IRQ_SYSMMU_MDMA0_0	COMBINER_IRQ(4, 0)
59 #define IRQ_SYSMMU_SSS_0	COMBINER_IRQ(4, 1)
60 #define IRQ_SYSMMU_FIMC0_0	COMBINER_IRQ(4, 2)
61 #define IRQ_SYSMMU_FIMC1_0	COMBINER_IRQ(4, 3)
62 #define IRQ_SYSMMU_FIMC2_0	COMBINER_IRQ(4, 4)
63 #define IRQ_SYSMMU_FIMC3_0	COMBINER_IRQ(4, 5)
64 #define IRQ_SYSMMU_JPEG_0	COMBINER_IRQ(4, 6)
65 #define IRQ_SYSMMU_2D_0		COMBINER_IRQ(4, 7)
66 
67 #define IRQ_SYSMMU_ROTATOR_0	COMBINER_IRQ(5, 0)
68 #define IRQ_SYSMMU_MDMA1_0	COMBINER_IRQ(5, 1)
69 #define IRQ_SYSMMU_LCD0_M0_0	COMBINER_IRQ(5, 2)
70 #define IRQ_SYSMMU_LCD1_M1_0	COMBINER_IRQ(5, 3)
71 #define IRQ_SYSMMU_TV_M0_0	COMBINER_IRQ(5, 4)
72 #define IRQ_SYSMMU_MFC_M0_0	COMBINER_IRQ(5, 5)
73 #define IRQ_SYSMMU_MFC_M1_0	COMBINER_IRQ(5, 6)
74 #define IRQ_SYSMMU_PCIE_0	COMBINER_IRQ(5, 7)
75 
76 #define IRQ_PDMA0		COMBINER_IRQ(21, 0)
77 #define IRQ_PDMA1		COMBINER_IRQ(21, 1)
78 
79 #define IRQ_TIMER0_VIC		COMBINER_IRQ(22, 0)
80 #define IRQ_TIMER1_VIC		COMBINER_IRQ(22, 1)
81 #define IRQ_TIMER2_VIC		COMBINER_IRQ(22, 2)
82 #define IRQ_TIMER3_VIC		COMBINER_IRQ(22, 3)
83 #define IRQ_TIMER4_VIC		COMBINER_IRQ(22, 4)
84 
85 #define IRQ_RTC_ALARM		COMBINER_IRQ(23, 0)
86 #define IRQ_RTC_TIC		COMBINER_IRQ(23, 1)
87 
88 #define IRQ_GPIO_XB		COMBINER_IRQ(24, 0)
89 #define IRQ_GPIO_XA		COMBINER_IRQ(24, 1)
90 
91 #define IRQ_UART0		COMBINER_IRQ(26, 0)
92 #define IRQ_UART1		COMBINER_IRQ(26, 1)
93 #define IRQ_UART2		COMBINER_IRQ(26, 2)
94 #define IRQ_UART3		COMBINER_IRQ(26, 3)
95 #define IRQ_UART4		COMBINER_IRQ(26, 4)
96 
97 #define IRQ_IIC			COMBINER_IRQ(27, 0)
98 #define IRQ_IIC1		COMBINER_IRQ(27, 1)
99 #define IRQ_IIC2		COMBINER_IRQ(27, 2)
100 #define IRQ_IIC3		COMBINER_IRQ(27, 3)
101 #define IRQ_IIC4		COMBINER_IRQ(27, 4)
102 #define IRQ_IIC5		COMBINER_IRQ(27, 5)
103 #define IRQ_IIC6		COMBINER_IRQ(27, 6)
104 #define IRQ_IIC7		COMBINER_IRQ(27, 7)
105 
106 #define IRQ_HSMMC0		COMBINER_IRQ(29, 0)
107 #define IRQ_HSMMC1		COMBINER_IRQ(29, 1)
108 #define IRQ_HSMMC2		COMBINER_IRQ(29, 2)
109 #define IRQ_HSMMC3		COMBINER_IRQ(29, 3)
110 
111 #define IRQ_MIPI_CSIS0		COMBINER_IRQ(30, 0)
112 #define IRQ_MIPI_CSIS1		COMBINER_IRQ(30, 1)
113 
114 #define IRQ_FIMC0		COMBINER_IRQ(32, 0)
115 #define IRQ_FIMC1		COMBINER_IRQ(32, 1)
116 #define IRQ_FIMC2		COMBINER_IRQ(33, 0)
117 #define IRQ_FIMC3		COMBINER_IRQ(33, 1)
118 
119 #define IRQ_ONENAND_AUDI	COMBINER_IRQ(34, 0)
120 
121 #define IRQ_MCT_L1		COMBINER_IRQ(35, 3)
122 
123 #define IRQ_EINT4		COMBINER_IRQ(37, 0)
124 #define IRQ_EINT5		COMBINER_IRQ(37, 1)
125 #define IRQ_EINT6		COMBINER_IRQ(37, 2)
126 #define IRQ_EINT7		COMBINER_IRQ(37, 3)
127 #define IRQ_EINT8		COMBINER_IRQ(38, 0)
128 
129 #define IRQ_EINT9		COMBINER_IRQ(38, 1)
130 #define IRQ_EINT10		COMBINER_IRQ(38, 2)
131 #define IRQ_EINT11		COMBINER_IRQ(38, 3)
132 #define IRQ_EINT12		COMBINER_IRQ(38, 4)
133 #define IRQ_EINT13		COMBINER_IRQ(38, 5)
134 #define IRQ_EINT14		COMBINER_IRQ(38, 6)
135 #define IRQ_EINT15		COMBINER_IRQ(38, 7)
136 
137 #define IRQ_EINT16_31		COMBINER_IRQ(39, 0)
138 
139 #define IRQ_MCT_L0		COMBINER_IRQ(51, 0)
140 
141 #define IRQ_WDT			COMBINER_IRQ(53, 0)
142 #define IRQ_MCT_G0		COMBINER_IRQ(53, 4)
143 
144 #define MAX_COMBINER_NR		54
145 
146 #define S5P_IRQ_EINT_BASE	COMBINER_IRQ(MAX_COMBINER_NR, 0)
147 
148 #define S5P_EINT_BASE1		(S5P_IRQ_EINT_BASE + 0)
149 #define S5P_EINT_BASE2		(S5P_IRQ_EINT_BASE + 16)
150 
151 /* optional GPIO interrupts */
152 #define S5P_GPIOINT_BASE	(S5P_IRQ_EINT_BASE + 32)
153 #define IRQ_GPIO1_NR_GROUPS	16
154 #define IRQ_GPIO2_NR_GROUPS	9
155 #define IRQ_GPIO_END		(S5P_GPIOINT_BASE + S5P_GPIOINT_COUNT)
156 
157 /* Set the default NR_IRQS */
158 #define NR_IRQS			(IRQ_GPIO_END)
159 
160 #endif /* __ASM_ARCH_IRQS_H */
161