1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Derived from IRIX <sys/SN/SN0/IP27.h>.
7  *
8  * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc.
9  * Copyright (C) 1999 by Ralf Baechle
10  */
11 #ifndef _ASM_SN_SN0_IP27_H
12 #define _ASM_SN_SN0_IP27_H
13 
14 #include <asm/mipsregs.h>
15 
16 /*
17  * Simple definitions for the masks which remove SW bits from pte.
18  */
19 
20 #define TLBLO_HWBITSHIFT	0		/* Shift value, for masking */
21 
22 #ifndef __ASSEMBLY__
23 
24 #define CAUSE_BERRINTR 		IE_IRQ5
25 
26 #define ECCF_CACHE_ERR  0
27 #define ECCF_TAGLO      1
28 #define ECCF_ECC        2
29 #define ECCF_ERROREPC   3
30 #define ECCF_PADDR      4
31 #define ECCF_SIZE       (5 * sizeof(long))
32 
33 #endif /* !__ASSEMBLY__ */
34 
35 #ifdef __ASSEMBLY__
36 
37 /*
38  * KL_GET_CPUNUM (similar to EV_GET_SPNUM for EVEREST platform) reads
39  * the processor number of the calling processor.  The proc parameters
40  * must be a register.
41  */
42 #define KL_GET_CPUNUM(proc) 				\
43 	dli	proc, LOCAL_HUB(0); 			\
44 	ld	proc, PI_CPU_NUM(proc)
45 
46 #endif /* __ASSEMBLY__ */
47 
48 /*
49  * R10000 status register interrupt bit mask usage for IP27.
50  */
51 #define SRB_SWTIMO	IE_SW0		/* 0x0100 */
52 #define SRB_NET		IE_SW1		/* 0x0200 */
53 #define SRB_DEV0	IE_IRQ0		/* 0x0400 */
54 #define SRB_DEV1	IE_IRQ1		/* 0x0800 */
55 #define SRB_TIMOCLK	IE_IRQ2		/* 0x1000 */
56 #define SRB_PROFCLK	IE_IRQ3		/* 0x2000 */
57 #define SRB_ERR		IE_IRQ4		/* 0x4000 */
58 #define SRB_SCHEDCLK	IE_IRQ5		/* 0x8000 */
59 
60 #define SR_IBIT_HI	SRB_DEV0
61 #define SR_IBIT_PROF	SRB_PROFCLK
62 
63 #define SRB_SWTIMO_IDX		0
64 #define SRB_NET_IDX		1
65 #define SRB_DEV0_IDX		2
66 #define SRB_DEV1_IDX		3
67 #define SRB_TIMOCLK_IDX		4
68 #define SRB_PROFCLK_IDX		5
69 #define SRB_ERR_IDX		6
70 #define SRB_SCHEDCLK_IDX	7
71 
72 #define NUM_CAUSE_INTRS		8
73 
74 #define SCACHE_LINESIZE	128
75 #define SCACHE_LINEMASK	(SCACHE_LINESIZE - 1)
76 
77 #include <asm/sn/addrs.h>
78 
79 #define LED_CYCLE_MASK  0x0f
80 #define LED_CYCLE_SHFT  4
81 
82 #define SEND_NMI(_nasid, _slice)	\
83           REMOTE_HUB_S((_nasid),  (PI_NMI_A + ((_slice) * PI_NMI_OFFSET)), 1)
84 
85 /* Sanity hazzard ...  Below all the Origin hacks are following.  */
86 
87 #define CPU_RESCHED_A_IRQ	0
88 #define CPU_RESCHED_B_IRQ	1
89 #define CPU_CALL_A_IRQ		2
90 #define CPU_CALL_B_IRQ		3
91 #define BASE_PCI_IRQ		4
92 
93 #define SN00_BRIDGE		0x9200000008000000
94 #define SN00I_BRIDGE0		0x920000000b000000
95 #define SN00I_BRIDGE1		0x920000000e000000
96 #define SN00I_BRIDGE2		0x920000000f000000
97 #endif /* _ASM_SN_SN0_IP27_H */
98