1 /*
2  * vic.h: Various VIC controller defines.  The VIC is an interrupt controller
3  *        used in Baget/MIPS series.
4  *
5  * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
6  */
7 #ifndef _ASM_BAGET_VIC_H
8 #define _ASM_BAGET_VIC_H
9 
10 #define VIC_VME_II       0x3
11 #define VIC_VME_INT1     0x7
12 #define VIC_VME_INT2     0xB
13 #define VIC_VME_INT3     0xF
14 #define VIC_VME_INT4     0x13
15 #define VIC_VME_INT5     0x17
16 #define VIC_VME_INT6     0x1B
17 #define VIC_VME_INT7     0x1F
18 #define VIC_DMA_INT      0x23
19 #define VIC_LINT1        0x27
20 #define VIC_LINT2        0x2B
21 #define VIC_LINT3        0x2F
22 #define VIC_LINT4        0x33
23 #define VIC_LINT5        0x37
24 #define VIC_LINT6        0x3B
25 #define VIC_LINT7        0x3F
26 #define VIC_ICGS_INT     0x43
27 #define VIC_ICMS_INT     0x47
28 #define    VIC_INT_IPL(lev)  ((~(lev))&0x7)
29 #define    VIC_INT_ACTIVE    (1<<3)
30 #define    VIC_INT_AUTO      (0<<4)
31 #define    VIC_INT_NOAUTO    (1<<4)
32 #define    VIC_INT_LEVEL     (0<<5)
33 #define    VIC_INT_EDGE      (1<<5)
34 #define    VIC_INT_LOW       (0<<6)
35 #define    VIC_INT_HIGH      (1<<6)
36 #define    VIC_INT_ENABLE    (0<<7)
37 #define    VIC_INT_DISABLE   (1<<7)
38 #define    VIC_INT_SWITCH(x) (1<<(((x)&0x3)+4))
39 #define VIC_ERR_INT      0x4B
40 #define    VIC_ERR_INT_SYSFAIL_ACTIVE  (1<<3)
41 #define    VIC_ERR_INT_SYSFAIL  (1<<4)
42 #define    VIC_ERR_INT_TIMO     (1<<5)
43 #define    VIC_ERR_INT_WRPOST   (1<<6)
44 #define    VIC_ERR_INT_ACFAIL   (1<<7)
45 #define VIC_ICGS_BASE    0x4F
46 #define VIC_ICMS_BASE    0x53
47 #define    VIC_ICxS_BASE_GSWITCH_MASK 0x3
48 #define    VIC_ICxS_BASE_ID(x)  (((x)&0x3f)<<2)
49 #define VIC_LOCAL_BASE   0x57
50 #define    VIC_LOCAL_BASE_LINT_MASK 0x7
51 #define    VIC_LOCAL_BASE_ID(x)  (((x)&0x1f)<<3)
52 #define VIC_ERR_BASE     0x5B
53 #define    VIC_ERR_BASE_ACFAIL   0
54 #define    VIC_ERR_BASE_WRPOST   1
55 #define    VIC_ERR_BASE_TIMO     2
56 #define    VIC_ERR_BASE_SYSFAIL  3
57 #define    VIC_ERR_BASE_VMEACK   4
58 #define    VIC_ERR_BASE_DMA      5
59 #define    VIC_ERR_BASE_ID(x)  (((x)&0x1f)<<3)
60 #define VIC_ICS          0x5F
61 #define VIC_IC0          0x63
62 #define VIC_IC1          0x67
63 #define VIC_IC2          0x6B
64 #define VIC_IC3          0x6F
65 #define VIC_IC4          0x73
66 #define VIC_ID           0x77
67 #define VIC_IC6          0x7B
68 #define    VIC_IC6_IRESET_STATUS (1<<7)
69 #define    VIC_IC6_HALT_STATUS   (1<<6)
70 #define    VIC_IC6_SYSRESET   (3<<0)
71 #define    VIC_IC6_RESET      (2<<0)
72 #define    VIC_IC6_HALT       (1<<0)
73 #define    VIC_IC6_RUN        (0<<0)
74 #define VIC_IC7          0x7F
75 #define    VIC_IC7_SYSFAIL     (1<<7)
76 #define    VIC_IC7_RESET       (1<<6)
77 #define    VIC_IC7_VME_MASTER  (1<<5)
78 #define    VIC_IC7_SEMSET(x)   ((1<<(x))&0x1f)
79 #define VIC_VME_REQ      0x83
80 #define VIC_VME_BASE1    0x87
81 #define VIC_VME_BASE2    0x8B
82 #define VIC_VME_BASE3    0x8F
83 #define VIC_VME_BASE4    0x93
84 #define VIC_VME_BASE5    0x97
85 #define VIC_VME_BASE6    0x9B
86 #define VIC_VME_BASE7    0x9F
87 #define VIC_XFER_TIMO    0xA3
88 #define    VIC_XFER_TIMO_VME_PERIOD_INF (7<<5)
89 #define    VIC_XFER_TIMO_VME_PERIOD_512 (6<<5)
90 #define    VIC_XFER_TIMO_VME_PERIOD_256 (5<<5)
91 #define    VIC_XFER_TIMO_VME_PERIOD_128 (4<<5)
92 #define    VIC_XFER_TIMO_VME_PERIOD_64 (3<<5)
93 #define    VIC_XFER_TIMO_VME_PERIOD_32 (2<<5)
94 #define    VIC_XFER_TIMO_VME_PERIOD_16 (1<<5)
95 #define    VIC_XFER_TIMO_VME_PERIOD_4  (0<<5)
96 #define    VIC_XFER_TIMO_VME_PERIOD_VAL(x) (((x)>>5)&7)
97 #define    VIC_XFER_TIMO_LOCAL_PERIOD_INF (7<<2)
98 #define    VIC_XFER_TIMO_LOCAL_PERIOD_512 (6<<2)
99 #define    VIC_XFER_TIMO_LOCAL_PERIOD_256 (5<<2)
100 #define    VIC_XFER_TIMO_LOCAL_PERIOD_128 (4<<2)
101 #define    VIC_XFER_TIMO_LOCAL_PERIOD_64 (3<<2)
102 #define    VIC_XFER_TIMO_LOCAL_PERIOD_32 (2<<2)
103 #define    VIC_XFER_TIMO_LOCAL_PERIOD_16 (1<<2)
104 #define    VIC_XFER_TIMO_LOCAL_PERIOD_4  (0<<2)
105 #define    VIC_XFER_TIMO_LOCAL_PERIOD_VAL(x) (((x)>>2)&7)
106 #define    VIC_XFER_TIMO_ARB  (1<<1)
107 #define    VIC_XFER_TIMO_VME  (1<<0)
108 #define VIC_LOCAL_TIM    0xA7
109 #define    VIC_LOCAL_TIM_PAS_ASSERT(x)   (((x)-2)&0xf)
110 #define    VIC_LOCAL_TIM_PAS_ASSERT_VAL(x) (((x)&0xf)+2)
111 #define    VIC_LOCAT_TIM_DS_DEASSERT(x)  ((((x)-1)&1)<<4)
112 #define    VIC_LOCAT_TIM_DS_DEASSERT_VAL(x)  ((((x)>>4)&1)+1)
113 #define    VIC_LOCAL_TIM_PAS_DEASSERT(x) ((((x)-1)&0x7)<<5)
114 #define    VIC_LOCAL_TIM_PAS_DEASSERT_VAL(x) ((((x)>>5)&0x7)+1)
115 #define VIC_BXFER_DEF    0xAB
116 #define    VIC_BXFER_DEF_VME_CROSS    (1<<3)
117 #define    VIC_BXFER_DEF_LOCAL_CROSS  (1<<2)
118 #define    VIC_BXFER_DEF_AMSR   (1<<1)
119 #define    VIC_BXFER_DEF_DUAL   (1<<0)
120 #define VIC_IFACE_CFG    0xAF
121 #define    VIC_IFACE_CFG_RMC3    (1<<7)
122 #define    VIC_IFACE_CFG_RMC2    (1<<6)
123 #define    VIC_IFACE_CFG_RMC1    (1<<5)
124 #define    VIC_IFACE_CFG_HALT    (1<<4)
125 #define    VIC_IFACE_CFG_NOHALT  (0<<4)
126 #define    VIC_IFACE_CFG_NORMC   (1<<3)
127 #define    VIC_IFACE_CFG_DEADLOCK_VAL(x) (((x)>>3)&3)
128 #define    VIC_IFACE_CFG_MSTAB   (1<<2)
129 #define    VIC_IFACE_CFG_TURBO   (1<<1)
130 #define    VIC_IFACE_CFG_NOTURBO (0<<1)
131 #define    VIC_IFACE_CFG_VME     (1<<0)
132 #define VIC_REQ_CFG      0xB3
133 #define    VIC_REQ_CFG_FAIRNESS_DISABLED  0
134 #define    VIC_REQ_CFG_FAIRNESS_ENABLED   1
135 #define    VIC_REQ_CFG_TIMO_DISABLED      0xf
136 #define    VIC_REQ_CFG_DRAM_REFRESH       (1<<4)
137 #define    VIC_REQ_CFG_LEVEL(x)           (((x)&3)<<5)
138 #define    VIC_REQ_CFG_PRIO_ARBITRATION   (1<<7)
139 #define    VIC_REQ_CFG_RR_ARBITRATION     (0<<7)
140 #define VIC_AMS          0xB7
141 #define    VIC_AMS_AM_2_0   (1<<7)
142 #define    VIC_AMS_AM_5_3   (1<<6)
143 #define    VIC_AMS_CODE(x)  ((x)&0x1f)
144 #define VIC_BERR_STATUS  0xBB
145 #define VIC_DMA_STATUS   0xBF
146 #define VIC_SS0CR0       0xC3
147 #define VIC_SS1CR0       0xCB
148 #define    VIC_SSxCR0_LOCAL_XFER_ACCEL  (2)
149 #define    VIC_SSxCR0_LOCAL_XFER_SINGLE (1)
150 #define    VIC_SSxCR0_LOCAL_XFER_NONE   (0)
151 #define    VIC_SSxCR0_A32       (0<<2)
152 #define    VIC_SSxCR0_A24       (1<<2)
153 #define    VIC_SSxCR0_A16       (2<<2)
154 #define    VIC_SSxCR0_USER      (3<<2)
155 #define    VIC_SSxCR0_D32       (1<<4)
156 #define    VIC_SSxCR0_SUPER     (1<<5)
157 #define    VIC_SS0CR0_TIMER_FREQ_MASK   (3<<6)
158 #define    VIC_SS0CR0_TIMER_FREQ_NONE   (0<<6)
159 #define    VIC_SS0CR0_TIMER_FREQ_50HZ   (1<<6)
160 #define    VIC_SS0CR0_TIMER_FREQ_1000HZ (2<<6)
161 #define    VIC_SS0CR0_TIMER_FREQ_100HZ  (3<<6)
162 #define    VIC_SS1CR0_MASTER_WRPOST (1<<6)
163 #define    VIC_SS1CR0_SLAVE_WRPOST  (1<<7)
164 #define VIC_SS0CR1       0xC7
165 #define VIC_SS1CR1       0xCF
166 #define    VIC_SSxCR1_TF2(x)  (((x)&0xf)<<4)
167 #define    VIC_SSxCR1_TF1(x)  ((x)&0xf)
168 #define VIC_RELEASE      0xD3
169 #define    VIC_RELEASE_BLKXFER_BLEN(x) ((x)&0x1f)
170 #define    VIC_RELEASE_ROR             (0<<6)
171 #define    VIC_RELEASE_RWD             (1<<6)
172 #define    VIC_RELEASE_ROC             (2<<6)
173 #define    VIC_RELEASE_BCAP            (3<<6)
174 #define VIC_BXFER_CTRL   0xD7
175 #define    VIC_BXFER_CTRL_MODULE     (1<<7)
176 #define    VIC_BXFER_CTRL_LOCAL      (1<<6)
177 #define    VIC_BXFER_CTRL_MOVEM      (1<<5)
178 #define    VIC_BXFER_CTRL_READ       (1<<4)
179 #define    VIC_BXFER_CTRL_WRITE      (0<<4)
180 #define    VIC_BXFER_CTRL_INTERLEAVE(x)  ((x)&0xf)
181 #define VIC_BXFER_LEN_LO    0xDB
182 #define VIC_BXFER_LEN_HI    0xDF
183 #define VIC_SYS_RESET    0xE3
184 
185 #ifndef __ASSEMBLY__
186 
187 #define vic_inb(p)    (*(volatile unsigned char *)(VIC_BASE + (p)))
188 #define vic_outb(v,p) (*((volatile unsigned char *)(VIC_BASE + (p))) = v)
189 
190 #endif /* !__ASSEMBLY__ */
191 
192 #endif /* _ASM_BAGET_VIC_H */
193