1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Specification Revision 2.0 Tables 4 * 5 *****************************************************************************/ 6 7 /* 8 * Copyright (C) 2000 - 2004, R. Byron Moore 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions, and the following disclaimer, 16 * without modification. 17 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 18 * substantially similar to the "NO WARRANTY" disclaimer below 19 * ("Disclaimer") and any redistribution must be conditioned upon 20 * including a substantially similar Disclaimer requirement for further 21 * binary redistribution. 22 * 3. Neither the names of the above-listed copyright holders nor the names 23 * of any contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * Alternatively, this software may be distributed under the terms of the 27 * GNU General Public License ("GPL") version 2 as published by the Free 28 * Software Foundation. 29 * 30 * NO WARRANTY 31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 32 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 33 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 34 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 35 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 40 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 * POSSIBILITY OF SUCH DAMAGES. 42 */ 43 44 #ifndef __ACTBL2_H__ 45 #define __ACTBL2_H__ 46 47 /* 48 * Prefered Power Management Profiles 49 */ 50 #define PM_UNSPECIFIED 0 51 #define PM_DESKTOP 1 52 #define PM_MOBILE 2 53 #define PM_WORKSTATION 3 54 #define PM_ENTERPRISE_SERVER 4 55 #define PM_SOHO_SERVER 5 56 #define PM_APPLIANCE_PC 6 57 58 /* 59 * ACPI Boot Arch Flags 60 */ 61 #define BAF_LEGACY_DEVICES 0x0001 62 #define BAF_8042_KEYBOARD_CONTROLLER 0x0002 63 64 #define FADT2_REVISION_ID 3 65 66 67 #pragma pack(1) 68 69 /* 70 * ACPI 2.0 Root System Description Table (RSDT) 71 */ 72 struct rsdt_descriptor_rev2 73 { 74 ACPI_TABLE_HEADER_DEF /* ACPI common table header */ 75 u32 table_offset_entry [1]; /* Array of pointers to */ 76 /* ACPI table headers */ 77 }; 78 79 80 /* 81 * ACPI 2.0 Extended System Description Table (XSDT) 82 */ 83 struct xsdt_descriptor_rev2 84 { 85 ACPI_TABLE_HEADER_DEF /* ACPI common table header */ 86 u64 table_offset_entry [1]; /* Array of pointers to */ 87 /* ACPI table headers */ 88 }; 89 90 91 /* 92 * ACPI 2.0 Firmware ACPI Control Structure (FACS) 93 */ 94 struct facs_descriptor_rev2 95 { 96 char signature[4]; /* ACPI signature */ 97 u32 length; /* Length of structure, in bytes */ 98 u32 hardware_signature; /* Hardware configuration signature */ 99 u32 firmware_waking_vector; /* 32bit physical address of the Firmware Waking Vector. */ 100 u32 global_lock; /* Global Lock used to synchronize access to shared hardware resources */ 101 u32 S4bios_f : 1; /* S4Bios_f - Indicates if S4BIOS support is present */ 102 u32 reserved1 : 31; /* Must be 0 */ 103 u64 xfirmware_waking_vector; /* 64bit physical address of the Firmware Waking Vector. */ 104 u8 version; /* Version of this table */ 105 u8 reserved3 [31]; /* Reserved - must be zero */ 106 }; 107 108 109 /* 110 * ACPI 2.0 Generic Address Structure (GAS) 111 */ 112 struct acpi_generic_address 113 { 114 u8 address_space_id; /* Address space where struct or register exists. */ 115 u8 register_bit_width; /* Size in bits of given register */ 116 u8 register_bit_offset; /* Bit offset within the register */ 117 u8 reserved; /* Must be 0 */ 118 u64 address; /* 64-bit address of struct or register */ 119 }; 120 121 122 /* 123 * ACPI 2.0 Fixed ACPI Description Table (FADT) 124 */ 125 struct fadt_descriptor_rev2 126 { 127 ACPI_TABLE_HEADER_DEF /* ACPI common table header */ 128 u32 V1_firmware_ctrl; /* 32-bit physical address of FACS */ 129 u32 V1_dsdt; /* 32-bit physical address of DSDT */ 130 u8 reserved1; /* System Interrupt Model isn't used in ACPI 2.0*/ 131 u8 prefer_PM_profile; /* Conveys preferred power management profile to OSPM. */ 132 u16 sci_int; /* System vector of SCI interrupt */ 133 u32 smi_cmd; /* Port address of SMI command port */ 134 u8 acpi_enable; /* Value to write to smi_cmd to enable ACPI */ 135 u8 acpi_disable; /* Value to write to smi_cmd to disable ACPI */ 136 u8 S4bios_req; /* Value to write to SMI CMD to enter S4BIOS state */ 137 u8 pstate_cnt; /* Processor performance state control*/ 138 u32 V1_pm1a_evt_blk; /* Port address of Power Mgt 1a acpi_event Reg Blk */ 139 u32 V1_pm1b_evt_blk; /* Port address of Power Mgt 1b acpi_event Reg Blk */ 140 u32 V1_pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */ 141 u32 V1_pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg Blk */ 142 u32 V1_pm2_cnt_blk; /* Port address of Power Mgt 2 Control Reg Blk */ 143 u32 V1_pm_tmr_blk; /* Port address of Power Mgt Timer Ctrl Reg Blk */ 144 u32 V1_gpe0_blk; /* Port addr of General Purpose acpi_event 0 Reg Blk */ 145 u32 V1_gpe1_blk; /* Port addr of General Purpose acpi_event 1 Reg Blk */ 146 u8 pm1_evt_len; /* Byte length of ports at pm1_x_evt_blk */ 147 u8 pm1_cnt_len; /* Byte length of ports at pm1_x_cnt_blk */ 148 u8 pm2_cnt_len; /* Byte Length of ports at pm2_cnt_blk */ 149 u8 pm_tm_len; /* Byte Length of ports at pm_tm_blk */ 150 u8 gpe0_blk_len; /* Byte Length of ports at gpe0_blk */ 151 u8 gpe1_blk_len; /* Byte Length of ports at gpe1_blk */ 152 u8 gpe1_base; /* Offset in gpe model where gpe1 events start */ 153 u8 cst_cnt; /* Support for the _CST object and C States change notification.*/ 154 u16 plvl2_lat; /* Worst case HW latency to enter/exit C2 state */ 155 u16 plvl3_lat; /* Worst case HW latency to enter/exit C3 state */ 156 u16 flush_size; /* Number of flush strides that need to be read */ 157 u16 flush_stride; /* Processor's memory cache line width, in bytes */ 158 u8 duty_offset; /* Processor's duty cycle index in processor's P_CNT reg*/ 159 u8 duty_width; /* Processor's duty cycle value bit width in P_CNT register.*/ 160 u8 day_alrm; /* Index to day-of-month alarm in RTC CMOS RAM */ 161 u8 mon_alrm; /* Index to month-of-year alarm in RTC CMOS RAM */ 162 u8 century; /* Index to century in RTC CMOS RAM */ 163 u16 iapc_boot_arch; /* IA-PC Boot Architecture Flags. See Table 5-10 for description*/ 164 u8 reserved2; /* Reserved */ 165 u32 wb_invd : 1; /* The wbinvd instruction works properly */ 166 u32 wb_invd_flush : 1; /* The wbinvd flushes but does not invalidate */ 167 u32 proc_c1 : 1; /* All processors support C1 state */ 168 u32 plvl2_up : 1; /* C2 state works on MP system */ 169 u32 pwr_button : 1; /* Power button is handled as a generic feature */ 170 u32 sleep_button : 1; /* Sleep button is handled as a generic feature, or not present */ 171 u32 fixed_rTC : 1; /* RTC wakeup stat not in fixed register space */ 172 u32 rtcs4 : 1; /* RTC wakeup stat not possible from S4 */ 173 u32 tmr_val_ext : 1; /* Indicates tmr_val is 32 bits 0=24-bits*/ 174 u32 dock_cap : 1; /* Supports Docking */ 175 u32 reset_reg_sup : 1; /* Indicates system supports system reset via the FADT RESET_REG*/ 176 u32 sealed_case : 1; /* Indicates system has no internal expansion capabilities and case is sealed. */ 177 u32 headless : 1; /* Indicates system does not have local video capabilities or local input devices.*/ 178 u32 cpu_sw_sleep : 1; /* Indicates to OSPM that a processor native instruction */ 179 /* Must be executed after writing the SLP_TYPx register. */ 180 u32 reserved6 : 18; /* Reserved - must be zero */ 181 182 struct acpi_generic_address reset_register; /* Reset register address in GAS format */ 183 u8 reset_value; /* Value to write to the reset_register port to reset the system. */ 184 u8 reserved7[3]; /* These three bytes must be zero */ 185 u64 xfirmware_ctrl; /* 64-bit physical address of FACS */ 186 u64 Xdsdt; /* 64-bit physical address of DSDT */ 187 struct acpi_generic_address xpm1a_evt_blk; /* Extended Power Mgt 1a acpi_event Reg Blk address */ 188 struct acpi_generic_address xpm1b_evt_blk; /* Extended Power Mgt 1b acpi_event Reg Blk address */ 189 struct acpi_generic_address xpm1a_cnt_blk; /* Extended Power Mgt 1a Control Reg Blk address */ 190 struct acpi_generic_address xpm1b_cnt_blk; /* Extended Power Mgt 1b Control Reg Blk address */ 191 struct acpi_generic_address xpm2_cnt_blk; /* Extended Power Mgt 2 Control Reg Blk address */ 192 struct acpi_generic_address xpm_tmr_blk; /* Extended Power Mgt Timer Ctrl Reg Blk address */ 193 struct acpi_generic_address xgpe0_blk; /* Extended General Purpose acpi_event 0 Reg Blk address */ 194 struct acpi_generic_address xgpe1_blk; /* Extended General Purpose acpi_event 1 Reg Blk address */ 195 }; 196 197 198 /* Embedded Controller */ 199 200 struct ec_boot_resources 201 { 202 ACPI_TABLE_HEADER_DEF 203 struct acpi_generic_address ec_control; /* Address of EC command/status register */ 204 struct acpi_generic_address ec_data; /* Address of EC data register */ 205 u32 uid; /* Unique ID - must be same as the EC _UID method */ 206 u8 gpe_bit; /* The GPE for the EC */ 207 u8 ec_id[1]; /* Full namepath of the EC in the ACPI namespace */ 208 }; 209 210 211 #pragma pack() 212 213 #endif /* __ACTBL2_H__ */ 214 215