1 /*-------------------------------------------------------------------------*/
2 /*-------------------------------------------------------------------------*
3 * SL811HS USB HCD for Linux Version 0.1 (10/28/2001) 0.3 (11/23/2003)
4 *
5 * requires (includes) hc_simple.[hc] simple generic HCD frontend
6 *
7 * COPYRIGHT(C) 2001 by CYPRESS SEMICONDUCTOR INC.
8 *
9 * ! This driver have end of live! Please use hcd/sl811.c instand !
10 *
11 * 05.06.2003 HNE
12 * Support x86 architecture now.
13 * Set "bus->bus_name" at init.
14 * hc_reset,regTest: Don't load driver, if pattern-Test failed (better error returns)
15 *
16 * 06.06.2003 HNE
17 * Moved regTest from hc_reset to hc_found_hci. So we check registers
18 * only at start, and not at unload. Only all Register show, if full Debug.
19 *
20 * 22.09.2003 HNE
21 * Do not write SL11H_INTSTATREG in loop, use delay instand.
22 * If device disconnected, wait only for next insert interrupt (no Idle-Interrpts).
23 *
24 * 29.09.2003 HNE
25 * Moving hc_sl811-arm.h and hc_sl811-x86.h to include/asm-.../hc_sl811-hw.h
26 *
27 * 03.10.2003 HNE
28 * Low level only for port io into hardware-include.
29 * GPRD as parameter (ARM only).
30
31 * ToDo:
32 * Separate IO-Base for second controller (see sl811.c)
33 * Only as module tested! Compiled in Version not tested!
34 *
35 *-------------------------------------------------------------------------*
36 * This program is free software; you can redistribute it and/or modify
37 * it under the terms of the GNU General Public License as published by
38 * the Free Software Foundation; either version 2 of the License, or
39 * (at your option) any later version.
40 *
41 * This program is distributed in the hope that it will be useful,
42 * but WITHOUT ANY WARRANTY; without even the implied warranty of
43 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
44 * GNU General Public License for more details.
45 *
46 * You should have received a copy of the GNU General Public License
47 * along with this program; if not, write to the Free Software
48 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
49 *
50 *-------------------------------------------------------------------------*/
51
52 #include <linux/config.h>
53 #include <linux/module.h>
54 #include <linux/kernel.h>
55 #include <linux/delay.h>
56 #include <linux/sched.h>
57 #include <linux/slab.h>
58 #include <linux/errno.h>
59 #include <linux/init.h>
60 #include <linux/smp_lock.h>
61 #include <linux/list.h>
62 #include <linux/ioport.h>
63 #include <asm/io.h>
64 #include <asm/irq.h>
65
66 #include <linux/usb.h>
67
68 #define MODNAME "HC_SL811"
69
70 #undef HC_URB_TIMEOUT
71 #undef HC_SWITCH_INT
72 #undef HC_ENABLE_ISOC
73
74 // #define SL811_DEBUG
75 #define SL811_DEBUG_ERR
76 // #define SL811_DEBUG_IRQ
77 // #define SL811_DEBUG_VERBOSE
78
79 #ifdef SL811_DEBUG_ERR
80 #define DBGERR(fmt, args...) printk(fmt,## args)
81 #else
82 #define DBGERR(fmt, args...)
83 #endif
84
85 #ifdef SL811_DEBUG
86 #define DBG(fmt, args...) printk(fmt,## args)
87 #else
88 #define DBG(fmt, args...)
89 #endif
90
91 #ifdef SL811_DEBUG_FUNC
92 #define DBGFUNC(fmt, args...) printk(fmt,## args)
93 #else
94 #define DBGFUNC(fmt, args...)
95 #endif
96
97 #ifdef SL811_DEBUG_DATA
98 #define DBGDATAR(fmt, args...) printk(fmt,## args)
99 #define DBGDATAW(fmt, args...) printk(fmt,## args)
100 #else
101 #define DBGDATAR(fmt, args...)
102 #define DBGDATAW(fmt, args...)
103 #endif
104
105 #ifdef SL811_DEBUG_VERBOSE
106 #define DBGVERBOSE(fmt, args...) printk(fmt,## args)
107 #else
108 #define DBGVERBOSE(fmt, args...)
109 #endif
110
111 #define TRUE 1
112 #define FALSE 0
113
114 #define HC_SWITCH_INT
115 #include "hc_sl811.h"
116 #include "hc_simple.h"
117
118 static int urb_debug = 0;
119
120 /* Include hardware and board depens */
121 #include <asm/hc_sl811-hw.h>
122
123 /* forware declaration */
124 int SL11StartXaction (hci_t * hci, __u8 addr, __u8 epaddr, int pid, int len,
125 int toggle, int slow, int urb_state);
126
127 static int sofWaitCnt = 0;
128
129 MODULE_PARM (urb_debug, "i");
130 MODULE_PARM_DESC (urb_debug, "debug urb messages, default is 0 (no)");
131
132 static int hc_reset (hci_t * hci);
133
134 /***************************************************************************
135 * Function Name : SL811Read
136 *
137 * Read a byte of data from the SL811H/SL11H
138 *
139 * Input: hci = data structure for the host controller
140 * offset = address of SL811/SL11H register or memory
141 *
142 * Return: data
143 **************************************************************************/
144
SL811Read(hci_t * hci,__u8 offset)145 static __u8 inline SL811Read (hci_t *hci, __u8 offset)
146 {
147 hcipriv_t *hp = &hci->hp;
148 #ifdef SL811_DEBUG_ERR
149 if (!hp->hcport)
150 DBGERR ("SL811Read: Error port not set!\n");
151 #endif
152 sl811_write_index (hp, offset);
153 return (sl811_read_data (hp));
154 }
155
156 /***************************************************************************
157 * Function Name : SL811Write
158 *
159 * Write a byte of data to the SL811H/SL11H
160 *
161 * Input: hci = data structure for the host controller
162 * offset = address of SL811/SL11H register or memory
163 * data = the data going to write to SL811H
164 *
165 * Return: none
166 **************************************************************************/
167
SL811Write(hci_t * hci,__u8 offset,__u8 data)168 static void inline SL811Write (hci_t *hci, __u8 offset, __u8 data)
169 {
170 hcipriv_t *hp = &hci->hp;
171 #ifdef SL811_DEBUG_ERR
172 if (!hp->hcport)
173 DBGERR ("SL811Write: Error port not set!\n");
174 #endif
175 sl811_write_index_data (hp, offset, data);
176 }
177
178
179 /***************************************************************************
180 * Function Name : SL811BufRead
181 *
182 * Read consecutive bytes of data from the SL811H/SL11H buffer
183 *
184 * Input: hci = data structure for the host controller
185 * offset = SL811/SL11H register offset
186 * buf = the buffer where the data will store
187 * size = number of bytes to read
188 *
189 * Return: none
190 **************************************************************************/
191
SL811BufRead(hci_t * hci,__u8 offset,__u8 * buf,__u8 size)192 static void SL811BufRead (hci_t *hci, __u8 offset, __u8 *buf, __u8 size)
193 {
194 hcipriv_t *hp = &hci->hp;
195 if( size <= 0)
196 return;
197 #ifdef SL811_DEBUG_ERR
198 if (!hp->hcport)
199 DBGERR ("SL811BufRead: Error port not set!\n");
200 #endif
201 sl811_write_index (hp, offset);
202 DBGDATAR ("SL811BufRead: io=%X offset = %02x, data = ", hp->hcport, offset);
203 while (size--) {
204 *buf++ = sl811_read_data(hp);
205 DBGDATAR ("%02x ", *(buf-1));
206 }
207 DBGDATAR ("\n");
208 }
209
210 /***************************************************************************
211 * Function Name : SL811BufWrite
212 *
213 * Write consecutive bytes of data to the SL811H/SL11H buffer
214 *
215 * Input: hci = data structure for the host controller
216 * offset = SL811/SL11H register offset
217 * buf = the data buffer
218 * size = number of bytes to write
219 *
220 * Return: none
221 **************************************************************************/
222
SL811BufWrite(hci_t * hci,__u8 offset,__u8 * buf,__u8 size)223 static void SL811BufWrite(hci_t *hci, __u8 offset, __u8 *buf, __u8 size)
224 {
225 hcipriv_t *hp = &hci->hp;
226 if(size<=0)
227 return;
228 #ifdef SL811_DEBUG_ERR
229 if (!hp->hcport)
230 DBGERR ("SL811BufWrite: Error port not set!\n");
231 #endif
232 sl811_write_index (hp, offset);
233 DBGDATAW ("SL811BufWrite: io=%X offset = %02x, data = ", hp->hcport, offset);
234 while (size--) {
235 DBGDATAW ("%02x ", *buf);
236 sl811_write_data (hp, *buf);
237 buf++;
238 }
239 DBGDATAW ("\n");
240 }
241
242 /***************************************************************************
243 * Function Name : regTest
244 *
245 * This routine test the Read/Write functionality of SL811HS registers
246 *
247 * 1) Store original register value into a buffer
248 * 2) Write to registers with a RAMP pattern. (10, 11, 12, ..., 255)
249 * 3) Read from register
250 * 4) Compare the written value with the read value and make sure they are
251 * equivalent
252 * 5) Restore the original register value
253 *
254 * Input: hci = data structure for the host controller
255 *
256 *
257 * Return: TRUE = passed; FALSE = failed
258 **************************************************************************/
regTest(hci_t * hci)259 int regTest (hci_t * hci)
260 {
261 int i, result = TRUE;
262 __u8 buf[256], data;
263
264 DBGFUNC ("Enter regTest\n");
265 for (i = 0x10; i < 256; i++) {
266 /* save the original buffer */
267 buf[i] = SL811Read (hci, i);
268
269 /* Write the new data to the buffer */
270 SL811Write (hci, i, i);
271 }
272
273 /* compare the written data */
274 for (i = 0x10; i < 256; i++) {
275 data = SL811Read (hci, i);
276 if (data != i) {
277 DBGERR ("Pattern test failed!! value = 0x%x, s/b 0x%x\n",
278 data, i);
279 result = FALSE;
280
281 /* If no Debug, show only first failed Address */
282 if (!urb_debug)
283 break;
284 }
285 }
286
287 /* restore the data */
288 for (i = 0x10; i < 256; i++) {
289 SL811Write (hci, i, buf[i]);
290 }
291
292 return (result);
293 }
294
295 #if 0 /* unused (hne) */
296 /***************************************************************************
297 * Function Name : regShow
298 *
299 * Display all SL811HS register values
300 *
301 * Input: hci = data structure for the host controller
302 *
303 * Return: none
304 **************************************************************************/
305 static void regShow (hci_t * hci)
306 {
307 int i;
308 for (i = 0; i < 256; i++) {
309 printk ("offset %d: 0x%x\n", i, SL811Read (hci, i));
310 }
311 }
312 #endif // if0
313
314 /************************************************************************
315 * Function Name : USBReset
316 *
317 * This function resets SL811HS controller and detects the speed of
318 * the connecting device
319 *
320 * Input: hci = data structure for the host controller
321 *
322 * Return: 0 = no device attached; 1 = USB device attached
323 *
324 ***********************************************************************/
325 /* [2.4.22] sl811_hc_reset */
USBReset(hci_t * hci)326 static int USBReset (hci_t * hci)
327 {
328 int status;
329 hcipriv_t *hp = &hci->hp;
330
331 DBGFUNC ("enter USBReset\n");
332
333 SL811Write (hci, SL11H_CTLREG2, 0xae);
334
335 // setup master and full speed
336
337 SL811Write (hci, SL11H_CTLREG1, 0x08); // reset USB
338 mdelay (20); // 20ms
339 SL811Write (hci, SL11H_CTLREG1, 0); // remove SE0
340
341 /* disable all interrupts (18.09.2003) */
342 SL811Write (hci, SL11H_INTENBLREG, 0);
343
344 /* 19.09.2003 [2.4.22] */
345 mdelay(2);
346 SL811Write (hci, SL11H_INTSTATREG, 0xff); // clear all interrupt bits
347 status = SL811Read (hci, SL11H_INTSTATREG);
348
349 if (status & SL11H_INTMASK_USBRESET) // Check if device is removed (0x40)
350 {
351 DBG ("USBReset: Device removed %03X\n", hci->hp.hcport);
352 /* 19.09.2003 [2.4.22] only IRQ for insert...
353 SL811Write (hci, SL11H_INTENBLREG,
354 SL11H_INTMASK_XFERDONE | SL11H_INTMASK_SOFINTR |
355 SL11H_INTMASK_INSRMV);
356 */
357 SL811Write (hci, SL11H_INTENBLREG,
358 SL11H_INTMASK_INSRMV);
359 hp->RHportStatus->portStatus &=
360 ~(PORT_CONNECT_STAT | PORT_ENABLE_STAT);
361
362 return 0;
363 }
364
365 // Send SOF to address 0, endpoint 0.
366 SL811Write (hci, SL11H_BUFLNTHREG_B, 0); //zero lenth
367 SL811Write (hci, SL11H_PIDEPREG_B, 0x50); //send SOF to EP0
368 SL811Write (hci, SL11H_DEVADDRREG_B, 0x01); //address0
369 SL811Write (hci, SL11H_SOFLOWREG, 0xe0);
370
371 if (!(status & SL11H_INTMASK_DSTATE)) { /* 0x80 */
372 /* slow speed device connect directly to root-hub */
373
374 DBG ("USBReset: low speed Device attached %03X\n", hci->hp.hcport);
375 SL811Write (hci, SL11H_CTLREG1, 0x8);
376 mdelay (20);
377 // SL811Write (hci, SL11H_SOFTMRREG, 0xee); /* the same, but better reading (hne) */
378 SL811Write (hci, SL11H_CTLREG2, 0xee);
379 SL811Write (hci, SL11H_CTLREG1, 0x21);
380
381 hp->RHportStatus->portStatus |=
382 (PORT_CONNECT_STAT | PORT_LOW_SPEED_DEV_ATTACH_STAT);
383
384 } else {
385 /* full speed device connect directly to root hub */
386
387 DBG ("USBReset: full speed Device attached %03X \n", hci->hp.hcport);
388 SL811Write (hci, SL11H_CTLREG1, 0x8);
389 mdelay (20);
390 // SL811Write (hci, SL11H_SOFTMRREG, 0xae); /* the same, but better reading (hne) */
391 SL811Write (hci, SL11H_CTLREG2, 0xae);
392 SL811Write (hci, SL11H_CTLREG1, 0x01);
393
394 hp->RHportStatus->portStatus |= (PORT_CONNECT_STAT);
395 hp->RHportStatus->portStatus &= ~PORT_LOW_SPEED_DEV_ATTACH_STAT;
396
397 }
398
399 /* start the SOF or EOP */
400 SL811Write (hci, SL11H_HOSTCTLREG_B, 0x01);
401
402 /* clear all interrupt bits */
403 /* 19.09.2003 [2.4.22] */
404 mdelay(2);
405 SL811Write (hci, SL11H_INTSTATREG, 0xff);
406
407 /* enable all interrupts */
408 SL811Write (hci, SL11H_INTENBLREG,
409 SL11H_INTMASK_XFERDONE | SL11H_INTMASK_SOFINTR |
410 SL11H_INTMASK_INSRMV);
411
412 return 1;
413 }
414
415 /*-------------------------------------------------------------------------*/
416 /* tl functions */
hc_mark_last_trans(hci_t * hci)417 static inline void hc_mark_last_trans (hci_t * hci)
418 {
419 hcipriv_t *hp = &hci->hp;
420 __u8 *ptd = hp->tl;
421
422 dbg ("enter hc_mark_last_trans\n");
423 if (ptd == NULL) {
424 printk ("hc_mark_last_trans: ptd = null\n");
425 return;
426 }
427 if (hp->xferPktLen > 0)
428 *(ptd + hp->tl_last) |= (1 << 3);
429 }
430
hc_flush_data_cache(hci_t * hci,void * data,int len)431 static inline void hc_flush_data_cache (hci_t * hci, void *data, int len)
432 {
433 }
434
435 /************************************************************************
436 * Function Name : hc_add_trans
437 *
438 * This function sets up the SL811HS register and transmit the USB packets.
439 *
440 * 1) Determine if enough time within the current frame to send the packet
441 * 2) Load the data into the SL811HS register
442 * 3) Set the appropriate command to the register and trigger the transmit
443 *
444 * Input: hci = data structure for the host controller
445 * len = data length
446 * data = transmitting data
447 * toggle = USB toggle bit, either 0 or 1
448 * maxps = maximum packet size for this endpoint
449 * slow = speed of the device
450 * endpoint = endpoint number
451 * address = USB address of the device
452 * pid = packet ID
453 * format =
454 * urb_state = the current stage of USB transaction
455 *
456 * Return: 0 = no time left to schedule the transfer
457 * 1 = success
458 *
459 ***********************************************************************/
hc_add_trans(hci_t * hci,int len,void * data,int toggle,int maxps,int slow,int endpoint,int address,int pid,int format,int urb_state)460 static inline int hc_add_trans (hci_t * hci, int len, void *data, int toggle,
461 int maxps, int slow, int endpoint, int address,
462 int pid, int format, int urb_state)
463 {
464 hcipriv_t *hp = &hci->hp;
465 __u16 speed;
466 int ii, jj, kk;
467
468 DBGFUNC ("enter hc_add_trans: len=0x%x, toggle:0x%x, endpoing:0x%x,"
469 " addr:0x%x, pid:0x%x,format:0x%x\n", len, toggle, endpoint,
470 address, pid, format);
471
472 if (len > maxps) {
473 len = maxps;
474 }
475
476 speed = hp->RHportStatus->portStatus;
477 if (speed & PORT_LOW_SPEED_DEV_ATTACH_STAT) {
478 // ii = (8*7*8 + 6*3) * len + 800;
479 ii = 8 * 8 * len + 1024;
480 } else {
481 if (slow) {
482 // ii = (8*7*8 + 6*3) * len + 800;
483 ii = 8 * 8 * len + 2048;
484 } else
485 // ii = (8*7 + 6*3)*len + 110;
486 ii = 8 * len + 256;
487 }
488
489 ii += 2 * 10 * len;
490
491 jj = SL811Read (hci, SL11H_SOFTMRREG);
492
493 /* Read back SOF counter HIGH (bit0-bit5 only) 26.11.2002 (hne) */
494 // kk = (jj & 0xFF) * 64 - ii;
495 kk = (jj & (64-1)) * 64 - ii;
496
497 if (kk < 0) {
498 DBGVERBOSE
499 ("hc_add_trans: no bandwidth for schedule, ii = 0x%x,"
500 "jj = 0x%x, len =0x%x, active_trans = 0x%x\n", ii, jj, len,
501 hci->active_trans);
502 return (-1);
503 }
504
505 if (pid != PID_IN) {
506 /* Load data into hc */
507
508 SL811BufWrite (hci, SL11H_DATA_START, (__u8 *) data, len);
509 }
510
511 /* transmit */
512
513 SL11StartXaction (hci, (__u8) address, (__u8) endpoint, (__u8) pid, len,
514 toggle, slow, urb_state);
515
516 return len;
517 }
518
519 /************************************************************************
520 * Function Name : hc_parse_trans
521 *
522 * This function checks the status of the transmitted or received packet
523 * and copy the data from the SL811HS register into a buffer.
524 *
525 * 1) Check the status of the packet
526 * 2) If successful, and IN packet then copy the data from the SL811HS register
527 * into a buffer
528 *
529 * Input: hci = data structure for the host controller
530 * actbytes = pointer to actual number of bytes
531 * data = data buffer
532 * cc = packet status
533 * length = the urb transmit length
534 * pid = packet ID
535 * urb_state = the current stage of USB transaction
536 *
537 * Return: 0
538 ***********************************************************************/
hc_parse_trans(hci_t * hci,int * actbytes,__u8 * data,int * cc,int * toggle,int length,int pid,int urb_state)539 static inline int hc_parse_trans (hci_t * hci, int *actbytes, __u8 * data,
540 int *cc, int *toggle, int length, int pid,
541 int urb_state)
542 {
543 __u8 addr;
544 __u8 len;
545 __u8 pkt_stat;
546
547 DBGFUNC ("enter hc_parse_trans\n");
548
549 /* get packet status; convert ack rcvd to ack-not-rcvd */
550
551 *cc = pkt_stat \
552 = SL811Read (hci, SL11H_PKTSTATREG);
553
554 if (pkt_stat &
555 (SL11H_STATMASK_ERROR | SL11H_STATMASK_TMOUT | SL11H_STATMASK_OVF |
556 SL11H_STATMASK_NAK | SL11H_STATMASK_STALL)) {
557 if (*cc & SL11H_STATMASK_OVF)
558 DBGERR ("parse trans: error recv ack, cc = 0x%x/0x%x, TX_BASE_Len = "
559 "0x%x, TX_count=0x%x\n", pkt_stat,
560 SL811Read (hci, SL11H_PKTSTATREG),
561 SL811Read (hci, SL11H_BUFLNTHREG),
562 SL811Read (hci, SL11H_XFERCNTREG));
563 else
564 DBGVERBOSE ("parse trans: error recv ack, cc = 0x%x/0x%x\n",
565 pkt_stat, SL811Read (hci, SL11H_PKTSTATREG));
566 } else {
567 DBGVERBOSE ("parse trans: recv ack, cc=0x%x, len=0x%x, pid=0x%x, urb=%d\n",
568 pkt_stat, length, pid, urb_state);
569
570 /* Successful data */
571 if ((pid == PID_IN) && (urb_state != US_CTRL_SETUP)) {
572
573 /* Find the base address */
574 addr = SL811Read (hci, SL11H_BUFADDRREG);
575
576 /* Find the Transmit Length */
577 len = SL811Read (hci, SL11H_BUFLNTHREG);
578
579 /* The actual data length = xmit length reg - xfer count reg */
580 *actbytes = len - SL811Read (hci, SL11H_XFERCNTREG);
581
582 if ((data != NULL) && (*actbytes > 0)) {
583 SL811BufRead (hci, addr, data, *actbytes);
584
585 } else if ((data == NULL) && (*actbytes <= 0)) {
586 DBGERR ("hc_parse_trans: data = NULL or actbyte = 0x%x\n",
587 *actbytes);
588 return 0;
589 }
590 } else if (pid == PID_OUT) {
591 *actbytes = length;
592 } else {
593 // printk ("ERR:parse_trans, pid != IN or OUT, pid = 0x%x\n", pid);
594 }
595 *toggle = !*toggle;
596 }
597
598 return 0;
599 }
600
601 #include "hc_simple.c"
602 #include "hc_sl811_rh.c"
603
604 /************************************************************************
605 * Function Name : hc_start_int
606 *
607 * This function enables SL811HS interrupts
608 *
609 * Input: hci = data structure for the host controller
610 *
611 * Return: none
612 ***********************************************************************/
hc_start_int(hci_t * hci)613 static void hc_start_int (hci_t * hci)
614 {
615 #ifdef HC_SWITCH_INT
616 int mask =
617 SL11H_INTMASK_XFERDONE | SL11H_INTMASK_SOFINTR |
618 SL11H_INTMASK_INSRMV | SL11H_INTMASK_USBRESET;
619 SL811Write (hci, IntEna, mask);
620 #endif
621 }
622
623 /************************************************************************
624 * Function Name : hc_stop_int
625 *
626 * This function disables SL811HS interrupts
627 *
628 * Input: hci = data structure for the host controller
629 *
630 * Return: none
631 ***********************************************************************/
hc_stop_int(hci_t * hci)632 static void hc_stop_int (hci_t * hci)
633 {
634 #ifdef HC_SWITCH_INT
635 SL811Write (hci, SL11H_INTSTATREG, 0xff);
636 // SL811Write(hci, SL11H_INTENBLREG, SL11H_INTMASK_INSRMV);
637
638 #endif
639 }
640
641 /************************************************************************
642 * Function Name : handleInsRmvIntr
643 *
644 * This function handles the insertion or removal of device on SL811HS.
645 * It resets the controller and updates the port status
646 *
647 * Input: hci = data structure for the host controller
648 *
649 * Return: none
650 ***********************************************************************/
handleInsRmvIntr(hci_t * hci)651 void handleInsRmvIntr (hci_t * hci)
652 {
653 hcipriv_t *hp = &hci->hp;
654
655 USBReset (hci);
656
657 /* Changes in connection status */
658
659 hp->RHportStatus->portChange |= PORT_CONNECT_CHANGE;
660
661 /* Port Enable or Disable */
662
663 if (hp->RHportStatus->portStatus & PORT_CONNECT_STAT) {
664 /* device is connected to the port:
665 * 1) Enable port
666 * 2) Resume ??
667 */
668 // hp->RHportStatus->portChange |= PORT_ENABLE_CHANGE;
669
670 /* Over Current is not supported by the SL811 HW ?? */
671
672 /* How about the Port Power ?? */
673
674 } else {
675 /* Device has disconnect:
676 * 1) Disable port
677 */
678
679 hp->RHportStatus->portStatus &= ~(PORT_ENABLE_STAT);
680 hp->RHportStatus->portChange |= PORT_ENABLE_CHANGE;
681
682 }
683 }
684
685 /*****************************************************************
686 *
687 * Function Name: SL11StartXaction
688 *
689 * This functions load the registers with appropriate value and
690 * transmit the packet.
691 *
692 * Input: hci = data structure for the host controller
693 * addr = USB address of the device
694 * epaddr = endpoint number
695 * pid = packet ID
696 * len = data length
697 * toggle = USB toggle bit, either 0 or 1
698 * slow = speed of the device
699 * urb_state = the current stage of USB transaction
700 *
701 * Return: 0 = error; 1 = successful
702 *
703 *****************************************************************/
SL11StartXaction(hci_t * hci,__u8 addr,__u8 epaddr,int pid,int len,int toggle,int slow,int urb_state)704 int SL11StartXaction (hci_t * hci, __u8 addr, __u8 epaddr, int pid, int len,
705 int toggle, int slow, int urb_state)
706 {
707
708 hcipriv_t *hp = &hci->hp;
709 __u8 cmd = 0;
710 __u8 setup_data[4];
711 __u16 speed;
712
713 speed = hp->RHportStatus->portStatus;
714 if (!(speed & PORT_LOW_SPEED_DEV_ATTACH_STAT) && slow) {
715 cmd |= SL11H_HCTLMASK_PREAMBLE;
716 }
717 switch (pid) {
718 case PID_SETUP:
719 // cmd &= SL11H_HCTLMASK_PREAMBLE; /* 26.11.2002 (hne) */
720 cmd |= SL11H_HCTLMASK_ARM
721 | SL11H_HCTLMASK_ENBLEP
722 | SL11H_HCTLMASK_WRITE;
723 DBGVERBOSE ("SL811 Xaction: SETUP cmd=%02X\n", cmd);
724 break;
725
726 case PID_OUT:
727 // cmd &= (SL11H_HCTLMASK_SEQ | SL11H_HCTLMASK_PREAMBLE); /* (hne) 26.11.2002 */
728 cmd |= SL11H_HCTLMASK_ARM
729 | SL11H_HCTLMASK_ENBLEP
730 | SL11H_HCTLMASK_WRITE;
731 if (toggle) {
732 cmd |= SL11H_HCTLMASK_SEQ;
733 }
734 DBGVERBOSE ("SL811 Xaction: OUT cmd=%02X\n", cmd);
735 break;
736
737 case PID_IN:
738 // cmd &= (SL11H_HCTLMASK_SEQ | SL11H_HCTLMASK_PREAMBLE); /* (hne) 26.11.2002 */
739 cmd |= SL11H_HCTLMASK_ARM
740 | SL11H_HCTLMASK_ENBLEP;
741 DBGVERBOSE ("SL811 Xaction: IN cmd=%02x\n", cmd);
742 break;
743
744 default:
745 DBGERR ("ERR: SL11StartXaction: unknow pid = 0x%x\n", pid);
746 return 0;
747 }
748 setup_data[0] = SL11H_DATA_START; /* 01:SL11H_BUFADDRREG */
749 setup_data[1] = len; /* 02:SL11H_BUFLNTHREG */
750 setup_data[2] = (((pid & 0x0F) << 4) | (epaddr & 0xF)); /* 03:SL11H_PIDEPREG */
751 setup_data[3] = addr & 0x7F; /* 04:SL11H_DEVADDRREG */
752
753 SL811BufWrite (hci, SL11H_BUFADDRREG, (__u8 *) & setup_data[0], 4);
754
755 // SL811Write (hci, SL11H_PIDEPREG, cmd); /* 03: grrr (hne) */
756 SL811Write (hci, SL11H_HOSTCTLREG, cmd); /* 00: 26.11.2002 (hne) */
757
758 #if 0
759 /* The SL811 has a hardware flaw when hub devices sends out
760 * SE0 between packets. It has been found in a TI chipset and
761 * cypress hub chipset. It causes the SL811 to hang
762 * The workaround is to re-issue the preample again.
763 */
764
765 if ((cmd & SL11H_HCTLMASK_PREAMBLE)) {
766 SL811Write (hci, SL11H_PIDEPREG_B, 0xc0);
767 SL811Write (hci, SL11H_HOSTCTLREG_B, 0x1); // send the premable
768 }
769 #endif
770 return 1;
771 }
772
773 /*****************************************************************
774 *
775 * Function Name: hc_interrupt
776 *
777 * Interrupt service routine.
778 *
779 * 1) determine the causes of interrupt
780 * 2) clears all interrupts
781 * 3) calls appropriate function to service the interrupt
782 *
783 * Input: irq = interrupt line associated with the controller
784 * hci = data structure for the host controller
785 * r = holds the snapshot of the processor's context before
786 * the processor entered interrupt code. (not used here)
787 *
788 * Return value : None.
789 *
790 *****************************************************************/
hc_interrupt(int irq,void * __hci,struct pt_regs * r)791 static void hc_interrupt (int irq, void *__hci, struct pt_regs *r)
792 {
793 __u8 ii;
794 hci_t *hci = __hci;
795 int isExcessNak = 0;
796 int urb_state = 0;
797 // __u8 tmpIrq = 0;
798 int irq_loop = 16; /* total irq handled at one hardware irq */
799
800 #ifdef SL811_DEBUG_IRQ
801 hcipriv_t *hp = &hci->hp;
802 unsigned char sta1, sta2;
803
804 outb (SL11H_INTSTATREG, 0x220); // Interrupt-Status register, controller1
805 sta1 = (__u8) inb (0x220+1);
806
807 outb (SL11H_INTSTATREG, 0x222); // Interrupt-Status register, controller2
808 sta2 = (__u8) inb (0x222+1);
809 #endif
810
811 do {
812 /* Get value from interrupt status register */
813
814 ii = SL811Read (hci, SL11H_INTSTATREG);
815
816 /* All interrupts handled? (hne) */
817 if ( !(ii & (SL11H_INTMASK_INSRMV /* | SL11H_INTMASK_USBRESET */ |
818 SL11H_INTMASK_XFERDONE | SL11H_INTMASK_SOFINTR)) )
819 {
820 #ifdef SL811_DEBUG_IRQ
821 // printk ("%Xh IRQ ista=%02X not me\n", hp->hcport, ii);
822
823 if ( sta1 != 0x80 && sta1 != 0x90 &&
824 sta2 != 0x80 && sta2 != 0x90 )
825 printk ("%Xh IRQ sta=%02X,%02X\n", hp->hcport, sta1, sta2);
826 #endif
827 return;
828 }
829
830 /* Interrupt will be handle now (18.09.2003 2.4.22) */
831 SL811Write (hci, SL11H_INTSTATREG, 0xff);
832
833 /* SOF-outputs are to slow. No debug any SOF */
834 if ( !(ii & SL11H_INTMASK_SOFINTR) )
835 DBGVERBOSE ("SL811 ISR: %s%s%s%s io=%03X\n",
836 (ii & SL11H_INTMASK_XFERDONE) ? " DONE": "",
837 (ii & SL11H_INTMASK_SOFINTR) ? " SOFINTR": "",
838 (ii & SL11H_INTMASK_INSRMV) ? " INSRMV": "",
839 (ii & SL11H_INTMASK_USBRESET) ? " USBRESET": "",
840 hci->hp.hcport );
841
842 // if (ii & (SL11H_INTMASK_INSRMV | SL11H_INTMASK_USBRESET)) {
843 // Found in 2.5.75 (19.09.2003)
844 // "SL11H_INTMASK_USBRESET" is always on, if no device connected!
845 if (ii & SL11H_INTMASK_INSRMV) {
846 /* Device insertion or removal detected for the USB port */
847 /* Disable all interrupts */
848 SL811Write (hci, SL11H_INTENBLREG, 0);
849 /* No SOF, Full speed */
850 SL811Write (hci, SL11H_CTLREG1, 0);
851
852 mdelay (100); // wait for device stable
853 handleInsRmvIntr (hci);
854 return;
855 }
856
857 /* Clear all interrupts */
858 // SL811Write (hci, SL11H_INTSTATREG, 0xff);
859
860 if (ii & SL11H_INTMASK_XFERDONE) {
861
862 /* USB Done interrupt occurred */
863 // DBGVERBOSE ("xsta=%02X\n", SL811Read (hci, SL11H_PKTSTATREG));
864
865 urb_state = sh_done_list (hci, &isExcessNak);
866 #ifdef WARNING
867 if (hci->td_array->len > 0)
868 printk ("WARNING: IRQ, td_array->len = 0x%x, s/b:0\n",
869 hci->td_array->len);
870 #endif
871 if (hci->td_array->len == 0 && !isExcessNak
872 && !(ii & SL11H_INTMASK_SOFINTR) && (urb_state == 0)) {
873 if (urb_state == 0) {
874 /* All urb_state has not been finished yet!
875 * continue with the current urb transaction
876 */
877
878 if (hci->last_packet_nak == 0) {
879 if (!usb_pipecontrol
880 (hci->td_array->td[0].urb->pipe))
881 sh_add_packet (hci, hci->td_array-> td[0].urb);
882 }
883 } else {
884 /* The last transaction has completed:
885 * schedule the next transaction
886 */
887
888 sh_schedule_trans (hci, 0);
889 }
890 }
891 /* +++ (hne)
892 SL811Write (hci, SL11H_INTSTATREG, 0xff);
893 --- */
894 return;
895 }
896
897 if (ii & SL11H_INTMASK_SOFINTR) {
898 hci->frame_number = (hci->frame_number + 1) % 2048;
899 if (hci->td_array->len == 0)
900 sh_schedule_trans (hci, 1);
901 else {
902 if (sofWaitCnt++ > 100) {
903 /* The last transaction has not completed.
904 * Need to retire the current td, and let
905 * it transmit again later on.
906 * (THIS NEEDS TO BE WORK ON MORE, IT SHOULD NEVER
907 * GET TO THIS POINT)
908 */
909
910 DBGERR ("SOF interrupt: td_array->len = 0x%x, s/b:0 io=%03X\n",
911 hci->td_array->len,
912 hci->hp.hcport );
913 urb_print (hci->td_array->td[hci->td_array->len - 1].urb,
914 "INTERRUPT", 0);
915 /* FIXME: Here sh_done_list was call with urb->dev=NULL 21.11.2002 (hne) */
916 sh_done_list (hci, &isExcessNak);
917 /* +++ (hne)
918 SL811Write (hci, SL11H_INTSTATREG, 0xff);
919 --- */
920 hci->td_array->len = 0;
921 sofWaitCnt = 0;
922 }
923 }
924
925 #if 0 /* grrr! This READ clears my XFERDONE interrupt! Its better handle this in a loop. (hne) */
926 tmpIrq = SL811Read (hci, SL11H_INTSTATREG) & SL811Read (hci, SL11H_INTENBLREG);
927 if (tmpIrq) {
928 DBG ("IRQ occurred while service SOF: irq = 0x%x\n",
929 tmpIrq);
930
931 /* If we receive a DONE IRQ after schedule, need to
932 * handle DONE IRQ again
933 */
934
935 if (tmpIrq & SL11H_INTMASK_XFERDONE) {
936 DBGERR ("XFERDONE occurred while service SOF: irq = 0x%x\n",
937 tmpIrq);
938 urb_state = sh_done_list (hci, &isExcessNak);
939 }
940 SL811Write (hci, SL11H_INTSTATREG, 0xff);
941 }
942 #endif
943 } else {
944 DBG ("SL811 ISR: unknown, int=0x%x io=%03X\n", ii, hci->hp.hcport);
945 return;
946 }
947
948 /* +++ (hne)
949 SL811Write (hci, SL11H_INTSTATREG, 0xff);
950 --- */
951
952 /* loop, if any interrupts can read (hne) */
953 } while (--irq_loop);
954
955 return;
956 }
957
958 /*****************************************************************
959 *
960 * Function Name: hc_reset
961 *
962 * This function does register test and resets the SL811HS
963 * controller.
964 *
965 * Input: hci = data structure for the host controller
966 *
967 * Return value : 0
968 *
969 *****************************************************************/
hc_reset(hci_t * hci)970 static int hc_reset (hci_t * hci)
971 {
972 int attachFlag = 0;
973
974 DBGFUNC ("Enter hc_reset\n");
975 attachFlag = USBReset (hci);
976 if (attachFlag) {
977 setPortChange (hci, PORT_CONNECT_CHANGE);
978 }
979 return (0);
980 }
981
982 /*****************************************************************
983 *
984 * Function Name: hc_alloc_trans_buffer
985 *
986 * This function allocates all transfer buffer
987 *
988 * Input: hci = data structure for the host controller
989 *
990 * Return value : 0
991 *
992 *****************************************************************/
hc_alloc_trans_buffer(hci_t * hci)993 static int hc_alloc_trans_buffer (hci_t * hci)
994 {
995 hcipriv_t *hp = &hci->hp;
996 int maxlen;
997
998 hp->itl0_len = 0;
999 hp->itl1_len = 0;
1000 hp->atl_len = 0;
1001
1002 hp->itl_buffer_len = 1024;
1003 hp->atl_buffer_len = 4096 - 2 * hp->itl_buffer_len; /* 2048 */
1004
1005 maxlen = (hp->itl_buffer_len > hp->atl_buffer_len) ? hp->itl_buffer_len : hp->atl_buffer_len;
1006
1007 hp->tl = kmalloc (maxlen, GFP_KERNEL);
1008
1009 if (!hp->tl)
1010 return -ENOMEM;
1011
1012 memset (hp->tl, 0, maxlen);
1013 return 0;
1014 }
1015
1016 /*****************************************************************
1017 *
1018 * Function Name: getPortStatusAndChange
1019 *
1020 * This function gets the ports status from SL811 and format it
1021 * to a USB request format
1022 *
1023 * Input: hci = data structure for the host controller
1024 *
1025 * Return value : port status and change
1026 *
1027 *****************************************************************/
getPortStatusAndChange(hci_t * hci)1028 static __u32 getPortStatusAndChange (hci_t * hci)
1029 {
1030 hcipriv_t *hp = &hci->hp;
1031 __u32 portstatus;
1032
1033 DBGFUNC ("enter getPorStatusAndChange\n");
1034
1035 portstatus = hp->RHportStatus->portChange << 16 | hp->RHportStatus->portStatus;
1036
1037 return (portstatus);
1038 }
1039
1040 /*****************************************************************
1041 *
1042 * Function Name: setPortChange
1043 *
1044 * This function set the bit position of portChange.
1045 *
1046 * Input: hci = data structure for the host controller
1047 * bitPos = the bit position
1048 *
1049 * Return value : none
1050 *
1051 *****************************************************************/
setPortChange(hci_t * hci,__u16 bitPos)1052 static void setPortChange (hci_t * hci, __u16 bitPos)
1053 {
1054 hcipriv_t *hp = &hci->hp;
1055
1056 switch (bitPos) {
1057 case PORT_CONNECT_STAT:
1058 hp->RHportStatus->portChange |= bitPos;
1059 break;
1060
1061 case PORT_ENABLE_STAT:
1062 hp->RHportStatus->portChange |= bitPos;
1063 break;
1064
1065 case PORT_RESET_STAT:
1066 hp->RHportStatus->portChange |= bitPos;
1067 break;
1068
1069 case PORT_POWER_STAT:
1070 hp->RHportStatus->portChange |= bitPos;
1071 break;
1072
1073 case PORT_SUSPEND_STAT:
1074 hp->RHportStatus->portChange |= bitPos;
1075 break;
1076
1077 case PORT_OVER_CURRENT_STAT:
1078 hp->RHportStatus->portChange |= bitPos;
1079 break;
1080 }
1081 }
1082
1083 /*****************************************************************
1084 *
1085 * Function Name: clrPortChange
1086 *
1087 * This function clear the bit position of portChange.
1088 *
1089 * Input: hci = data structure for the host controller
1090 * bitPos = the bit position
1091 *
1092 * Return value : none
1093 *
1094 *****************************************************************/
clrPortChange(hci_t * hci,__u16 bitPos)1095 static void clrPortChange (hci_t * hci, __u16 bitPos)
1096 {
1097 hcipriv_t *hp = &hci->hp;
1098 switch (bitPos) {
1099 case PORT_CONNECT_CHANGE:
1100 hp->RHportStatus->portChange &= ~bitPos;
1101 break;
1102
1103 case PORT_ENABLE_CHANGE:
1104 hp->RHportStatus->portChange &= ~bitPos;
1105 break;
1106
1107 case PORT_RESET_CHANGE:
1108 hp->RHportStatus->portChange &= ~bitPos;
1109 break;
1110
1111 case PORT_SUSPEND_CHANGE:
1112 hp->RHportStatus->portChange &= ~bitPos;
1113 break;
1114
1115 case PORT_OVER_CURRENT_CHANGE:
1116 hp->RHportStatus->portChange &= ~bitPos;
1117 break;
1118 }
1119 }
1120
1121 /*****************************************************************
1122 *
1123 * Function Name: clrPortStatus
1124 *
1125 * This function clear the bit position of portStatus.
1126 *
1127 * Input: hci = data structure for the host controller
1128 * bitPos = the bit position
1129 *
1130 * Return value : none
1131 *
1132 *****************************************************************/
clrPortStatus(hci_t * hci,__u16 bitPos)1133 static void clrPortStatus (hci_t * hci, __u16 bitPos)
1134 {
1135 hcipriv_t *hp = &hci->hp;
1136 switch (bitPos) {
1137 case PORT_ENABLE_STAT:
1138 hp->RHportStatus->portStatus &= ~bitPos;
1139 break;
1140
1141 case PORT_RESET_STAT:
1142 hp->RHportStatus->portStatus &= ~bitPos;
1143 break;
1144
1145 case PORT_POWER_STAT:
1146 hp->RHportStatus->portStatus &= ~bitPos;
1147 break;
1148
1149 case PORT_SUSPEND_STAT:
1150 hp->RHportStatus->portStatus &= ~bitPos;
1151 break;
1152 }
1153 }
1154
1155 /*****************************************************************
1156 *
1157 * Function Name: setPortStatus
1158 *
1159 * This function set the bit position of portStatus.
1160 *
1161 * Input: hci = data structure for the host controller
1162 * bitPos = the bit position
1163 *
1164 * Return value : none
1165 *
1166 *****************************************************************/
setPortStatus(hci_t * hci,__u16 bitPos)1167 static void setPortStatus (hci_t * hci, __u16 bitPos)
1168 {
1169 hcipriv_t *hp = &hci->hp;
1170 switch (bitPos) {
1171 case PORT_ENABLE_STAT:
1172 hp->RHportStatus->portStatus |= bitPos;
1173 break;
1174
1175 case PORT_RESET_STAT:
1176 hp->RHportStatus->portStatus |= bitPos;
1177 break;
1178
1179 case PORT_POWER_STAT:
1180 hp->RHportStatus->portStatus |= bitPos;
1181 break;
1182
1183 case PORT_SUSPEND_STAT:
1184 hp->RHportStatus->portStatus |= bitPos;
1185 break;
1186 }
1187 }
1188
1189 /*****************************************************************
1190 *
1191 * Function Name: hc_start
1192 *
1193 * This function starts the root hub functionality.
1194 *
1195 * Input: hci = data structure for the host controller
1196 *
1197 * Return value : 0
1198 *
1199 *****************************************************************/
hc_start(hci_t * hci)1200 static int hc_start (hci_t * hci)
1201 {
1202 DBGFUNC ("Enter hc_start\n");
1203
1204 rh_connect_rh (hci);
1205
1206 return 0;
1207 }
1208
1209 /*****************************************************************
1210 *
1211 * Function Name: hc_alloc_hci
1212 *
1213 * This function allocates all data structure and store in the
1214 * private data structure.
1215 *
1216 * Input: hci = data structure for the host controller
1217 *
1218 * Return value : 0
1219 *
1220 *****************************************************************/
hc_alloc_hci(void)1221 static hci_t *__devinit hc_alloc_hci (void)
1222 {
1223 hci_t *hci;
1224 hcipriv_t *hp;
1225 portstat_t *ps;
1226 struct usb_bus *bus;
1227
1228 DBGFUNC ("Enter hc_alloc_hci\n");
1229 hci = (hci_t *) kmalloc (sizeof (hci_t), GFP_KERNEL);
1230 if (!hci)
1231 return NULL;
1232
1233 memset (hci, 0, sizeof (hci_t));
1234
1235 hp = &hci->hp;
1236
1237 hp->irq = -1;
1238 hp->hcport = -1;
1239
1240 /* setup root hub port status */
1241
1242 ps = (portstat_t *) kmalloc (sizeof (portstat_t), GFP_KERNEL);
1243
1244 if (!ps)
1245 return NULL;
1246 ps->portStatus = PORT_STAT_DEFAULT;
1247 ps->portChange = PORT_CHANGE_DEFAULT;
1248 hp->RHportStatus = ps;
1249
1250 hci->nakCnt = 0;
1251 hci->last_packet_nak = 0;
1252
1253 hci->a_td_array.len = 0;
1254 hci->i_td_array[0].len = 0;
1255 hci->i_td_array[1].len = 0;
1256 hci->td_array = &hci->a_td_array;
1257 hci->active_urbs = 0;
1258 hci->active_trans = 0;
1259 INIT_LIST_HEAD (&hci->hci_hcd_list);
1260 list_add (&hci->hci_hcd_list, &hci_hcd_list);
1261 init_waitqueue_head (&hci->waitq);
1262
1263 INIT_LIST_HEAD (&hci->ctrl_list);
1264 INIT_LIST_HEAD (&hci->bulk_list);
1265 INIT_LIST_HEAD (&hci->iso_list);
1266 INIT_LIST_HEAD (&hci->intr_list);
1267 INIT_LIST_HEAD (&hci->del_list);
1268
1269 bus = usb_alloc_bus (&hci_device_operations);
1270 if (!bus) {
1271 kfree (hci);
1272 return NULL;
1273 }
1274
1275 hci->bus = bus;
1276 bus->bus_name = "sl811";
1277 bus->hcpriv = (void *) hci;
1278
1279 return hci;
1280 }
1281
1282 /*****************************************************************
1283 *
1284 * Function Name: hc_release_hci
1285 *
1286 * This function De-allocate all resources
1287 *
1288 * Input: hci = data structure for the host controller
1289 *
1290 * Return value : 0
1291 *
1292 *****************************************************************/
hc_release_hci(hci_t * hci)1293 static void hc_release_hci (hci_t * hci)
1294 {
1295 hcipriv_t *hp = &hci->hp;
1296
1297 DBGFUNC ("Enter hc_release_hci\n");
1298
1299 /* disconnect all devices */
1300 if (hci->bus->root_hub)
1301 usb_disconnect (&hci->bus->root_hub);
1302
1303 hc_reset (hci);
1304
1305 if (hp->hcport) {
1306 // Disable all Interrupts
1307 SL811Write (hci, SL11H_INTENBLREG, 0x00);
1308
1309 // Remove all Interrups
1310 mdelay(2);
1311 SL811Write (hci, SL11H_INTSTATREG, 0xff);
1312 }
1313
1314 if (hp->tl)
1315 kfree (hp->tl);
1316
1317 sl811_release_regions(hp);
1318
1319 if (hp->irq >= 0) {
1320 free_irq (hp->irq, hci);
1321 hp->irq = -1;
1322 }
1323
1324 usb_deregister_bus (hci->bus);
1325 usb_free_bus (hci->bus);
1326
1327 list_del (&hci->hci_hcd_list);
1328 INIT_LIST_HEAD (&hci->hci_hcd_list);
1329
1330 kfree (hci);
1331 }
1332
1333 /*****************************************************************
1334 *
1335 * Function Name: hc_found_hci
1336 *
1337 * This function request IO memory regions, request IRQ, and
1338 * allocate all other resources.
1339 *
1340 * Input: addr = first IO address
1341 * addr2 = second IO address
1342 * irq = interrupt number
1343 *
1344 * Return: 0 = success or error condition
1345 *
1346 *****************************************************************/
hc_found_hci(int irq,int iobase1,int iobase2)1347 static int __devinit hc_found_hci (int irq, int iobase1, int iobase2)
1348 {
1349 hci_t *hci;
1350 hcipriv_t *hp;
1351
1352 DBGFUNC ("Enter hc_found_hci\n");
1353 hci = hc_alloc_hci ();
1354 if (!hci) {
1355 return -ENOMEM;
1356 }
1357
1358 init_irq ();
1359 hp = &hci->hp;
1360
1361 if (sl811_request_regions (hp, iobase1, iobase2)) {
1362 hc_release_hci (hci);
1363 return -EBUSY;
1364 }
1365
1366 if (!regTest (hci)) {
1367 DBGERR (KERN_ERR "regTest: Controller fault!\n");
1368 hc_release_hci (hci);
1369 return -ENXIO; /* No such device or address */
1370 }
1371
1372 if (hc_alloc_trans_buffer (hci)) {
1373 hc_release_hci (hci);
1374 return -ENOMEM;
1375 }
1376
1377 usb_register_bus (hci->bus);
1378
1379 if (request_irq (irq, hc_interrupt, SA_SHIRQ, MODNAME, hci) != 0) {
1380 DBGERR ("request interrupt %d failed", irq);
1381 hc_release_hci (hci);
1382 return -EBUSY;
1383 }
1384 hp->irq = irq;
1385
1386 printk (KERN_INFO __FILE__ ": USB SL811 at %x,%x, IRQ %d\n",
1387 hp->hcport, hp->hcport2, irq);
1388
1389 #ifdef SL811_DEBUG_VERBOSE
1390 {
1391 __u8 u = SL811Read (hci, SL11H_HWREVREG);
1392
1393 DBGVERBOSE ("SL811 HW: %02Xh ", u);
1394 switch (u & 0xF0) {
1395 case 0x00: DBGVERBOSE ("SL11H\n"); break;
1396 case 0x10: DBGVERBOSE ("SL811HS rev1.2\n"); break;
1397 case 0x20: DBGVERBOSE ("SL811HS rev1.5\n"); break;
1398 default: DBGVERBOSE ("unknown!\n");
1399 }
1400 }
1401 #endif // SL811_DEBUG_VERBOSE
1402
1403 if (hc_reset (hci)) {
1404 hc_release_hci (hci);
1405 return -EBUSY;
1406 }
1407
1408 if (hc_start (hci) < 0) {
1409 DBGERR ("can't start usb-%x", hp->hcport);
1410 hc_release_hci (hci);
1411 return -EBUSY;
1412 }
1413
1414 return 0;
1415 }
1416
1417 /*****************************************************************
1418 *
1419 * Function Name: hci_hcd_init
1420 *
1421 * This is an init function, and it is the first function being called
1422 *
1423 * Input: none
1424 *
1425 * Return: 0 = success or error condition
1426 *
1427 *****************************************************************/
hci_hcd_init(void)1428 static int __init hci_hcd_init (void)
1429 {
1430 int ret;
1431 #ifndef __arm__
1432 int io_offset = 0;
1433 #endif // !__arm__
1434
1435 DBGFUNC ("Enter hci_hcd_init\n");
1436 DBGVERBOSE ("SL811 VERBOSE enabled\n");
1437
1438 #ifdef __arm__
1439 ret = hc_found_hci (irq, base_addr, data_reg_addr);
1440 #else // __arm__
1441
1442 // registering "another instance"
1443 for (io_offset = 0; io_offset < MAX_CONTROLERS * 2; io_offset += 2) {
1444
1445 ret = hc_found_hci (irq, io_base + io_offset, 0);
1446 if (ret)
1447 return (ret);
1448
1449 } /* endfor */
1450 #endif // __arm__
1451
1452 return ret;
1453 }
1454
1455 /*****************************************************************
1456 *
1457 * Function Name: hci_hcd_cleanup
1458 *
1459 * This is a cleanup function, and it is called when module is
1460 * unloaded.
1461 *
1462 * Input: none
1463 *
1464 * Return: none
1465 *
1466 *****************************************************************/
hci_hcd_cleanup(void)1467 static void __exit hci_hcd_cleanup (void)
1468 {
1469 struct list_head *hci_l;
1470 hci_t *hci;
1471
1472 DBGFUNC ("Enter hci_hcd_cleanup\n");
1473 for (hci_l = hci_hcd_list.next; hci_l != &hci_hcd_list;) {
1474 hci = list_entry (hci_l, hci_t, hci_hcd_list);
1475 hci_l = hci_l->next;
1476 hc_release_hci (hci);
1477 }
1478 }
1479
1480 module_init (hci_hcd_init);
1481 module_exit (hci_hcd_cleanup);
1482
1483 MODULE_AUTHOR ("Pei Liu <pbl@cypress.com>, Henry Nestler <hne@ist1.de>");
1484 MODULE_DESCRIPTION ("USB SL811HS Host Controller Driver");
1485