1 /******************************************************************************
2 ** High Performance device driver for the Symbios 53C896 controller.
3 **
4 ** Copyright (C) 1998-2001 Gerard Roudier <groudier@free.fr>
5 **
6 ** This driver also supports all the Symbios 53C8XX controller family,
7 ** except 53C810 revisions < 16, 53C825 revisions < 16 and all
8 ** revisions of 53C815 controllers.
9 **
10 ** This driver is based on the Linux port of the FreeBSD ncr driver.
11 **
12 ** Copyright (C) 1994 Wolfgang Stanglmeier
13 **
14 **-----------------------------------------------------------------------------
15 **
16 ** This program is free software; you can redistribute it and/or modify
17 ** it under the terms of the GNU General Public License as published by
18 ** the Free Software Foundation; either version 2 of the License, or
19 ** (at your option) any later version.
20 **
21 ** This program is distributed in the hope that it will be useful,
22 ** but WITHOUT ANY WARRANTY; without even the implied warranty of
23 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 ** GNU General Public License for more details.
25 **
26 ** You should have received a copy of the GNU General Public License
27 ** along with this program; if not, write to the Free Software
28 ** Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
29 **
30 **-----------------------------------------------------------------------------
31 **
32 ** The Linux port of the FreeBSD ncr driver has been achieved in
33 ** november 1995 by:
34 **
35 ** Gerard Roudier <groudier@free.fr>
36 **
37 ** Being given that this driver originates from the FreeBSD version, and
38 ** in order to keep synergy on both, any suggested enhancements and corrections
39 ** received on Linux are automatically a potential candidate for the FreeBSD
40 ** version.
41 **
42 ** The original driver has been written for 386bsd and FreeBSD by
43 ** Wolfgang Stanglmeier <wolf@cologne.de>
44 ** Stefan Esser <se@mi.Uni-Koeln.de>
45 **
46 **-----------------------------------------------------------------------------
47 **
48 ** Major contributions:
49 ** --------------------
50 **
51 ** NVRAM detection and reading.
52 ** Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
53 **
54 *******************************************************************************
55 */
56
57 /*
58 ** This file contains definitions and code that the
59 ** sym53c8xx and ncr53c8xx drivers should share.
60 ** The sharing will be achieved in a further version
61 ** of the driver bundle. For now, only the ncr53c8xx
62 ** driver includes this file.
63 */
64
65 #define MIN(a,b) (((a) < (b)) ? (a) : (b))
66 #define MAX(a,b) (((a) > (b)) ? (a) : (b))
67
68 /*==========================================================
69 **
70 ** Hmmm... What complex some PCI-HOST bridges actually
71 ** are, despite the fact that the PCI specifications
72 ** are looking so smart and simple! ;-)
73 **
74 **==========================================================
75 */
76
77 #if LINUX_VERSION_CODE >= LinuxVersionCode(2,3,47)
78 #define SCSI_NCR_DYNAMIC_DMA_MAPPING
79 #endif
80
81 /*==========================================================
82 **
83 ** Miscallaneous defines.
84 **
85 **==========================================================
86 */
87
88 #define u_char unsigned char
89 #define u_short unsigned short
90 #define u_int unsigned int
91 #define u_long unsigned long
92
93 #ifndef bcopy
94 #define bcopy(s, d, n) memcpy((d), (s), (n))
95 #endif
96
97 #ifndef bcmp
98 #define bcmp(s, d, n) memcmp((d), (s), (n))
99 #endif
100
101 #ifndef bzero
102 #define bzero(d, n) memset((d), 0, (n))
103 #endif
104
105 #ifndef offsetof
106 #define offsetof(t, m) ((size_t) (&((t *)0)->m))
107 #endif
108
109 /*==========================================================
110 **
111 ** assert ()
112 **
113 **==========================================================
114 **
115 ** modified copy from 386bsd:/usr/include/sys/assert.h
116 **
117 **----------------------------------------------------------
118 */
119
120 #define assert(expression) { \
121 if (!(expression)) { \
122 (void)panic( \
123 "assertion \"%s\" failed: file \"%s\", line %d\n", \
124 #expression, \
125 __FILE__, __LINE__); \
126 } \
127 }
128
129 /*==========================================================
130 **
131 ** Debugging tags
132 **
133 **==========================================================
134 */
135
136 #define DEBUG_ALLOC (0x0001)
137 #define DEBUG_PHASE (0x0002)
138 #define DEBUG_QUEUE (0x0008)
139 #define DEBUG_RESULT (0x0010)
140 #define DEBUG_POINTER (0x0020)
141 #define DEBUG_SCRIPT (0x0040)
142 #define DEBUG_TINY (0x0080)
143 #define DEBUG_TIMING (0x0100)
144 #define DEBUG_NEGO (0x0200)
145 #define DEBUG_TAGS (0x0400)
146 #define DEBUG_SCATTER (0x0800)
147 #define DEBUG_IC (0x1000)
148
149 /*
150 ** Enable/Disable debug messages.
151 ** Can be changed at runtime too.
152 */
153
154 #ifdef SCSI_NCR_DEBUG_INFO_SUPPORT
155 static int ncr_debug = SCSI_NCR_DEBUG_FLAGS;
156 #define DEBUG_FLAGS ncr_debug
157 #else
158 #define DEBUG_FLAGS SCSI_NCR_DEBUG_FLAGS
159 #endif
160
161 /*==========================================================
162 **
163 ** A la VMS/CAM-3 queue management.
164 ** Implemented from linux list management.
165 **
166 **==========================================================
167 */
168
169 typedef struct xpt_quehead {
170 struct xpt_quehead *flink; /* Forward pointer */
171 struct xpt_quehead *blink; /* Backward pointer */
172 } XPT_QUEHEAD;
173
174 #define xpt_que_init(ptr) do { \
175 (ptr)->flink = (ptr); (ptr)->blink = (ptr); \
176 } while (0)
177
__xpt_que_add(struct xpt_quehead * new,struct xpt_quehead * blink,struct xpt_quehead * flink)178 static inline void __xpt_que_add(struct xpt_quehead * new,
179 struct xpt_quehead * blink,
180 struct xpt_quehead * flink)
181 {
182 flink->blink = new;
183 new->flink = flink;
184 new->blink = blink;
185 blink->flink = new;
186 }
187
__xpt_que_del(struct xpt_quehead * blink,struct xpt_quehead * flink)188 static inline void __xpt_que_del(struct xpt_quehead * blink,
189 struct xpt_quehead * flink)
190 {
191 flink->blink = blink;
192 blink->flink = flink;
193 }
194
xpt_que_empty(struct xpt_quehead * head)195 static inline int xpt_que_empty(struct xpt_quehead *head)
196 {
197 return head->flink == head;
198 }
199
xpt_que_splice(struct xpt_quehead * list,struct xpt_quehead * head)200 static inline void xpt_que_splice(struct xpt_quehead *list,
201 struct xpt_quehead *head)
202 {
203 struct xpt_quehead *first = list->flink;
204
205 if (first != list) {
206 struct xpt_quehead *last = list->blink;
207 struct xpt_quehead *at = head->flink;
208
209 first->blink = head;
210 head->flink = first;
211
212 last->flink = at;
213 at->blink = last;
214 }
215 }
216
217 #define xpt_que_entry(ptr, type, member) \
218 ((type *)((char *)(ptr)-(unsigned long)(&((type *)0)->member)))
219
220
221 #define xpt_insque(new, pos) __xpt_que_add(new, pos, (pos)->flink)
222
223 #define xpt_remque(el) __xpt_que_del((el)->blink, (el)->flink)
224
225 #define xpt_insque_head(new, head) __xpt_que_add(new, head, (head)->flink)
226
xpt_remque_head(struct xpt_quehead * head)227 static inline struct xpt_quehead *xpt_remque_head(struct xpt_quehead *head)
228 {
229 struct xpt_quehead *elem = head->flink;
230
231 if (elem != head)
232 __xpt_que_del(head, elem->flink);
233 else
234 elem = 0;
235 return elem;
236 }
237
238 #define xpt_insque_tail(new, head) __xpt_que_add(new, (head)->blink, head)
239
xpt_remque_tail(struct xpt_quehead * head)240 static inline struct xpt_quehead *xpt_remque_tail(struct xpt_quehead *head)
241 {
242 struct xpt_quehead *elem = head->blink;
243
244 if (elem != head)
245 __xpt_que_del(elem->blink, head);
246 else
247 elem = 0;
248 return elem;
249 }
250
251 /*==========================================================
252 **
253 ** Simple Wrapper to kernel PCI bus interface.
254 **
255 ** This wrapper allows to get rid of old kernel PCI
256 ** interface and still allows to preserve linux-2.0
257 ** compatibilty. In fact, it is mostly an incomplete
258 ** emulation of the new PCI code for pre-2.2 kernels.
259 ** When kernel-2.0 support will be dropped, we will
260 ** just have to remove most of this code.
261 **
262 **==========================================================
263 */
264
265 #if LINUX_VERSION_CODE >= LinuxVersionCode(2,2,0)
266
267 typedef struct pci_dev *pcidev_t;
268 #define PCIDEV_NULL (0)
269 #define PciBusNumber(d) (d)->bus->number
270 #define PciDeviceFn(d) (d)->devfn
271 #define PciVendorId(d) (d)->vendor
272 #define PciDeviceId(d) (d)->device
273 #define PciIrqLine(d) (d)->irq
274
275 static u_long __init
pci_get_base_cookie(struct pci_dev * pdev,int index)276 pci_get_base_cookie(struct pci_dev *pdev, int index)
277 {
278 u_long base;
279
280 #if LINUX_VERSION_CODE > LinuxVersionCode(2,3,12)
281 base = pdev->resource[index].start;
282 #else
283 base = pdev->base_address[index];
284 #if BITS_PER_LONG > 32
285 if ((base & 0x7) == 0x4)
286 *base |= (((u_long)pdev->base_address[++index]) << 32);
287 #endif
288 #endif
289 return (base & ~0x7ul);
290 }
291
292 static int __init
pci_get_base_address(struct pci_dev * pdev,int index,u_long * base)293 pci_get_base_address(struct pci_dev *pdev, int index, u_long *base)
294 {
295 u32 tmp;
296 #define PCI_BAR_OFFSET(index) (PCI_BASE_ADDRESS_0 + (index<<2))
297
298 pci_read_config_dword(pdev, PCI_BAR_OFFSET(index), &tmp);
299 *base = tmp;
300 ++index;
301 if ((tmp & 0x7) == 0x4) {
302 #if BITS_PER_LONG > 32
303 pci_read_config_dword(pdev, PCI_BAR_OFFSET(index), &tmp);
304 *base |= (((u_long)tmp) << 32);
305 #endif
306 ++index;
307 }
308 return index;
309 #undef PCI_BAR_OFFSET
310 }
311
312 #else /* Incomplete emulation of current PCI code for pre-2.2 kernels */
313
314 typedef unsigned int pcidev_t;
315 #define PCIDEV_NULL (~0u)
316 #define PciBusNumber(d) ((d)>>8)
317 #define PciDeviceFn(d) ((d)&0xff)
318 #define __PciDev(busn, devfn) (((busn)<<8)+(devfn))
319
320 #define pci_present pcibios_present
321
322 #define pci_read_config_byte(d, w, v) \
323 pcibios_read_config_byte(PciBusNumber(d), PciDeviceFn(d), w, v)
324 #define pci_read_config_word(d, w, v) \
325 pcibios_read_config_word(PciBusNumber(d), PciDeviceFn(d), w, v)
326 #define pci_read_config_dword(d, w, v) \
327 pcibios_read_config_dword(PciBusNumber(d), PciDeviceFn(d), w, v)
328
329 #define pci_write_config_byte(d, w, v) \
330 pcibios_write_config_byte(PciBusNumber(d), PciDeviceFn(d), w, v)
331 #define pci_write_config_word(d, w, v) \
332 pcibios_write_config_word(PciBusNumber(d), PciDeviceFn(d), w, v)
333 #define pci_write_config_dword(d, w, v) \
334 pcibios_write_config_dword(PciBusNumber(d), PciDeviceFn(d), w, v)
335
336 static pcidev_t __init
pci_find_device(unsigned int vendor,unsigned int device,pcidev_t prev)337 pci_find_device(unsigned int vendor, unsigned int device, pcidev_t prev)
338 {
339 static unsigned short pci_index;
340 int retv;
341 unsigned char bus_number, device_fn;
342
343 if (prev == PCIDEV_NULL)
344 pci_index = 0;
345 else
346 ++pci_index;
347 retv = pcibios_find_device (vendor, device, pci_index,
348 &bus_number, &device_fn);
349 return retv ? PCIDEV_NULL : __PciDev(bus_number, device_fn);
350 }
351
PciVendorId(pcidev_t dev)352 static u_short __init PciVendorId(pcidev_t dev)
353 {
354 u_short vendor_id;
355 pci_read_config_word(dev, PCI_VENDOR_ID, &vendor_id);
356 return vendor_id;
357 }
358
PciDeviceId(pcidev_t dev)359 static u_short __init PciDeviceId(pcidev_t dev)
360 {
361 u_short device_id;
362 pci_read_config_word(dev, PCI_DEVICE_ID, &device_id);
363 return device_id;
364 }
365
PciIrqLine(pcidev_t dev)366 static u_int __init PciIrqLine(pcidev_t dev)
367 {
368 u_char irq;
369 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
370 return irq;
371 }
372
373 static int __init
pci_get_base_address(pcidev_t dev,int offset,u_long * base)374 pci_get_base_address(pcidev_t dev, int offset, u_long *base)
375 {
376 u_int32 tmp;
377
378 pci_read_config_dword(dev, PCI_BASE_ADDRESS_0 + offset, &tmp);
379 *base = tmp;
380 offset += sizeof(u_int32);
381 if ((tmp & 0x7) == 0x4) {
382 #if BITS_PER_LONG > 32
383 pci_read_config_dword(dev, PCI_BASE_ADDRESS_0 + offset, &tmp);
384 *base |= (((u_long)tmp) << 32);
385 #endif
386 offset += sizeof(u_int32);
387 }
388 return offset;
389 }
390 static u_long __init
pci_get_base_cookie(struct pci_dev * pdev,int offset)391 pci_get_base_cookie(struct pci_dev *pdev, int offset)
392 {
393 u_long base;
394
395 (void) pci_get_base_address(dev, offset, &base);
396
397 return base;
398 }
399
400 #endif /* LINUX_VERSION_CODE >= LinuxVersionCode(2,2,0) */
401
402 /* Does not make sense in earlier kernels */
403 #if LINUX_VERSION_CODE < LinuxVersionCode(2,4,0)
404 #define pci_enable_device(pdev) (0)
405 #endif
406 #if LINUX_VERSION_CODE < LinuxVersionCode(2,4,4)
407 #define scsi_set_pci_device(inst, pdev) (0)
408 #endif
409
410 /*==========================================================
411 **
412 ** SMP threading.
413 **
414 ** Assuming that SMP systems are generally high end
415 ** systems and may use several SCSI adapters, we are
416 ** using one lock per controller instead of some global
417 ** one. For the moment (linux-2.1.95), driver's entry
418 ** points are called with the 'io_request_lock' lock
419 ** held, so:
420 ** - We are uselessly loosing a couple of micro-seconds
421 ** to lock the controller data structure.
422 ** - But the driver is not broken by design for SMP and
423 ** so can be more resistant to bugs or bad changes in
424 ** the IO sub-system code.
425 ** - A small advantage could be that the interrupt code
426 ** is grained as wished (e.g.: by controller).
427 **
428 **==========================================================
429 */
430
431 #if LINUX_VERSION_CODE >= LinuxVersionCode(2,1,93)
432 spinlock_t DRIVER_SMP_LOCK = SPIN_LOCK_UNLOCKED;
433 #define NCR_LOCK_DRIVER(flags) spin_lock_irqsave(&DRIVER_SMP_LOCK, flags)
434 #define NCR_UNLOCK_DRIVER(flags) \
435 spin_unlock_irqrestore(&DRIVER_SMP_LOCK, flags)
436
437 #define NCR_INIT_LOCK_NCB(np) spin_lock_init(&np->smp_lock)
438 #define NCR_LOCK_NCB(np, flags) spin_lock_irqsave(&np->smp_lock, flags)
439 #define NCR_UNLOCK_NCB(np, flags) spin_unlock_irqrestore(&np->smp_lock, flags)
440
441 #define NCR_LOCK_SCSI_DONE(np, flags) \
442 spin_lock_irqsave(&io_request_lock, flags)
443 #define NCR_UNLOCK_SCSI_DONE(np, flags) \
444 spin_unlock_irqrestore(&io_request_lock, flags)
445
446 #else
447
448 #define NCR_LOCK_DRIVER(flags) do { save_flags(flags); cli(); } while (0)
449 #define NCR_UNLOCK_DRIVER(flags) do { restore_flags(flags); } while (0)
450
451 #define NCR_INIT_LOCK_NCB(np) do { } while (0)
452 #define NCR_LOCK_NCB(np, flags) do { save_flags(flags); cli(); } while (0)
453 #define NCR_UNLOCK_NCB(np, flags) do { restore_flags(flags); } while (0)
454
455 #define NCR_LOCK_SCSI_DONE(np, flags) do {;} while (0)
456 #define NCR_UNLOCK_SCSI_DONE(np, flags) do {;} while (0)
457
458 #endif
459
460 /*==========================================================
461 **
462 ** Memory mapped IO
463 **
464 ** Since linux-2.1, we must use ioremap() to map the io
465 ** memory space and iounmap() to unmap it. This allows
466 ** portability. Linux 1.3.X and 2.0.X allow to remap
467 ** physical pages addresses greater than the highest
468 ** physical memory address to kernel virtual pages with
469 ** vremap() / vfree(). That was not portable but worked
470 ** with i386 architecture.
471 **
472 **==========================================================
473 */
474
475 #if LINUX_VERSION_CODE < LinuxVersionCode(2,1,0)
476 #define ioremap vremap
477 #define iounmap vfree
478 #endif
479
480 #ifdef __sparc__
481 # include <asm/irq.h>
482 # define memcpy_to_pci(a, b, c) memcpy_toio((a), (b), (c))
483 #elif defined(__alpha__)
484 # define memcpy_to_pci(a, b, c) memcpy_toio((a), (b), (c))
485 #else /* others */
486 # define memcpy_to_pci(a, b, c) memcpy_toio((a), (b), (c))
487 #endif
488
489 #ifndef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
remap_pci_mem(u_long base,u_long size)490 static u_long __init remap_pci_mem(u_long base, u_long size)
491 {
492 u_long page_base = ((u_long) base) & PAGE_MASK;
493 u_long page_offs = ((u_long) base) - page_base;
494 u_long page_remapped = (u_long) ioremap(page_base, page_offs+size);
495
496 return page_remapped? (page_remapped + page_offs) : 0UL;
497 }
498
unmap_pci_mem(u_long vaddr,u_long size)499 static void __init unmap_pci_mem(u_long vaddr, u_long size)
500 {
501 if (vaddr)
502 iounmap((void *) (vaddr & PAGE_MASK));
503 }
504
505 #endif /* not def SCSI_NCR_PCI_MEM_NOT_SUPPORTED */
506
507 /*==========================================================
508 **
509 ** Insert a delay in micro-seconds and milli-seconds.
510 **
511 ** Under Linux, udelay() is restricted to delay <
512 ** 1 milli-second. In fact, it generally works for up
513 ** to 1 second delay. Since 2.1.105, the mdelay() function
514 ** is provided for delays in milli-seconds.
515 ** Under 2.0 kernels, udelay() is an inline function
516 ** that is very inaccurate on Pentium processors.
517 **
518 **==========================================================
519 */
520
521 #if LINUX_VERSION_CODE >= LinuxVersionCode(2,1,105)
522 #define UDELAY udelay
523 #define MDELAY mdelay
524 #else
UDELAY(long us)525 static void UDELAY(long us) { udelay(us); }
MDELAY(long ms)526 static void MDELAY(long ms) { while (ms--) UDELAY(1000); }
527 #endif
528
529 /*==========================================================
530 **
531 ** Simple power of two buddy-like allocator.
532 **
533 ** This simple code is not intended to be fast, but to
534 ** provide power of 2 aligned memory allocations.
535 ** Since the SCRIPTS processor only supplies 8 bit
536 ** arithmetic, this allocator allows simple and fast
537 ** address calculations from the SCRIPTS code.
538 ** In addition, cache line alignment is guaranteed for
539 ** power of 2 cache line size.
540 ** Enhanced in linux-2.3.44 to provide a memory pool
541 ** per pcidev to support dynamic dma mapping. (I would
542 ** have preferred a real bus astraction, btw).
543 **
544 **==========================================================
545 */
546
547 #if LINUX_VERSION_CODE >= LinuxVersionCode(2,1,0)
548 #define __GetFreePages(flags, order) __get_free_pages(flags, order)
549 #else
550 #define __GetFreePages(flags, order) __get_free_pages(flags, order, 0)
551 #endif
552
553 #define MEMO_SHIFT 4 /* 16 bytes minimum memory chunk */
554 #if PAGE_SIZE >= 8192
555 #define MEMO_PAGE_ORDER 0 /* 1 PAGE maximum */
556 #else
557 #define MEMO_PAGE_ORDER 1 /* 2 PAGES maximum */
558 #endif
559 #define MEMO_FREE_UNUSED /* Free unused pages immediately */
560 #define MEMO_WARN 1
561 #define MEMO_GFP_FLAGS GFP_ATOMIC
562 #define MEMO_CLUSTER_SHIFT (PAGE_SHIFT+MEMO_PAGE_ORDER)
563 #define MEMO_CLUSTER_SIZE (1UL << MEMO_CLUSTER_SHIFT)
564 #define MEMO_CLUSTER_MASK (MEMO_CLUSTER_SIZE-1)
565
566 typedef u_long m_addr_t; /* Enough bits to bit-hack addresses */
567 typedef pcidev_t m_bush_t; /* Something that addresses DMAable */
568
569 typedef struct m_link { /* Link between free memory chunks */
570 struct m_link *next;
571 } m_link_s;
572
573 #ifdef SCSI_NCR_DYNAMIC_DMA_MAPPING
574 typedef struct m_vtob { /* Virtual to Bus address translation */
575 struct m_vtob *next;
576 m_addr_t vaddr;
577 m_addr_t baddr;
578 } m_vtob_s;
579 #define VTOB_HASH_SHIFT 5
580 #define VTOB_HASH_SIZE (1UL << VTOB_HASH_SHIFT)
581 #define VTOB_HASH_MASK (VTOB_HASH_SIZE-1)
582 #define VTOB_HASH_CODE(m) \
583 ((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK)
584 #endif
585
586 typedef struct m_pool { /* Memory pool of a given kind */
587 #ifdef SCSI_NCR_DYNAMIC_DMA_MAPPING
588 m_bush_t bush;
589 m_addr_t (*getp)(struct m_pool *);
590 void (*freep)(struct m_pool *, m_addr_t);
591 #define M_GETP() mp->getp(mp)
592 #define M_FREEP(p) mp->freep(mp, p)
593 #define GetPages() __GetFreePages(MEMO_GFP_FLAGS, MEMO_PAGE_ORDER)
594 #define FreePages(p) free_pages(p, MEMO_PAGE_ORDER)
595 int nump;
596 m_vtob_s *(vtob[VTOB_HASH_SIZE]);
597 struct m_pool *next;
598 #else
599 #define M_GETP() __GetFreePages(MEMO_GFP_FLAGS, MEMO_PAGE_ORDER)
600 #define M_FREEP(p) free_pages(p, MEMO_PAGE_ORDER)
601 #endif /* SCSI_NCR_DYNAMIC_DMA_MAPPING */
602 struct m_link h[PAGE_SHIFT-MEMO_SHIFT+MEMO_PAGE_ORDER+1];
603 } m_pool_s;
604
___m_alloc(m_pool_s * mp,int size)605 static void *___m_alloc(m_pool_s *mp, int size)
606 {
607 int i = 0;
608 int s = (1 << MEMO_SHIFT);
609 int j;
610 m_addr_t a;
611 m_link_s *h = mp->h;
612
613 if (size > (PAGE_SIZE << MEMO_PAGE_ORDER))
614 return 0;
615
616 while (size > s) {
617 s <<= 1;
618 ++i;
619 }
620
621 j = i;
622 while (!h[j].next) {
623 if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) {
624 h[j].next = (m_link_s *) M_GETP();
625 if (h[j].next)
626 h[j].next->next = 0;
627 break;
628 }
629 ++j;
630 s <<= 1;
631 }
632 a = (m_addr_t) h[j].next;
633 if (a) {
634 h[j].next = h[j].next->next;
635 while (j > i) {
636 j -= 1;
637 s >>= 1;
638 h[j].next = (m_link_s *) (a+s);
639 h[j].next->next = 0;
640 }
641 }
642 #ifdef DEBUG
643 printk("___m_alloc(%d) = %p\n", size, (void *) a);
644 #endif
645 return (void *) a;
646 }
647
___m_free(m_pool_s * mp,void * ptr,int size)648 static void ___m_free(m_pool_s *mp, void *ptr, int size)
649 {
650 int i = 0;
651 int s = (1 << MEMO_SHIFT);
652 m_link_s *q;
653 m_addr_t a, b;
654 m_link_s *h = mp->h;
655
656 #ifdef DEBUG
657 printk("___m_free(%p, %d)\n", ptr, size);
658 #endif
659
660 if (size > (PAGE_SIZE << MEMO_PAGE_ORDER))
661 return;
662
663 while (size > s) {
664 s <<= 1;
665 ++i;
666 }
667
668 a = (m_addr_t) ptr;
669
670 while (1) {
671 #ifdef MEMO_FREE_UNUSED
672 if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) {
673 M_FREEP(a);
674 break;
675 }
676 #endif
677 b = a ^ s;
678 q = &h[i];
679 while (q->next && q->next != (m_link_s *) b) {
680 q = q->next;
681 }
682 if (!q->next) {
683 ((m_link_s *) a)->next = h[i].next;
684 h[i].next = (m_link_s *) a;
685 break;
686 }
687 q->next = q->next->next;
688 a = a & b;
689 s <<= 1;
690 ++i;
691 }
692 }
693
__m_calloc2(m_pool_s * mp,int size,char * name,int uflags)694 static void *__m_calloc2(m_pool_s *mp, int size, char *name, int uflags)
695 {
696 void *p;
697
698 p = ___m_alloc(mp, size);
699
700 if (DEBUG_FLAGS & DEBUG_ALLOC)
701 printk ("new %-10s[%4d] @%p.\n", name, size, p);
702
703 if (p)
704 bzero(p, size);
705 else if (uflags & MEMO_WARN)
706 printk (NAME53C8XX ": failed to allocate %s[%d]\n", name, size);
707
708 return p;
709 }
710
711 #define __m_calloc(mp, s, n) __m_calloc2(mp, s, n, MEMO_WARN)
712
__m_free(m_pool_s * mp,void * ptr,int size,char * name)713 static void __m_free(m_pool_s *mp, void *ptr, int size, char *name)
714 {
715 if (DEBUG_FLAGS & DEBUG_ALLOC)
716 printk ("freeing %-10s[%4d] @%p.\n", name, size, ptr);
717
718 ___m_free(mp, ptr, size);
719
720 }
721
722 /*
723 * With pci bus iommu support, we use a default pool of unmapped memory
724 * for memory we donnot need to DMA from/to and one pool per pcidev for
725 * memory accessed by the PCI chip. `mp0' is the default not DMAable pool.
726 */
727
728 #ifndef SCSI_NCR_DYNAMIC_DMA_MAPPING
729
730 static m_pool_s mp0;
731
732 #else
733
___mp0_getp(m_pool_s * mp)734 static m_addr_t ___mp0_getp(m_pool_s *mp)
735 {
736 m_addr_t m = GetPages();
737 if (m)
738 ++mp->nump;
739 return m;
740 }
741
___mp0_freep(m_pool_s * mp,m_addr_t m)742 static void ___mp0_freep(m_pool_s *mp, m_addr_t m)
743 {
744 FreePages(m);
745 --mp->nump;
746 }
747
748 static m_pool_s mp0 = {0, ___mp0_getp, ___mp0_freep};
749
750 #endif /* SCSI_NCR_DYNAMIC_DMA_MAPPING */
751
m_calloc(int size,char * name)752 static void *m_calloc(int size, char *name)
753 {
754 u_long flags;
755 void *m;
756 NCR_LOCK_DRIVER(flags);
757 m = __m_calloc(&mp0, size, name);
758 NCR_UNLOCK_DRIVER(flags);
759 return m;
760 }
761
m_free(void * ptr,int size,char * name)762 static void m_free(void *ptr, int size, char *name)
763 {
764 u_long flags;
765 NCR_LOCK_DRIVER(flags);
766 __m_free(&mp0, ptr, size, name);
767 NCR_UNLOCK_DRIVER(flags);
768 }
769
770 /*
771 * DMAable pools.
772 */
773
774 #ifndef SCSI_NCR_DYNAMIC_DMA_MAPPING
775
776 /* Without pci bus iommu support, all the memory is assumed DMAable */
777
778 #define __m_calloc_dma(b, s, n) m_calloc(s, n)
779 #define __m_free_dma(b, p, s, n) m_free(p, s, n)
780 #define __vtobus(b, p) virt_to_bus(p)
781
782 #else
783
784 /*
785 * With pci bus iommu support, we maintain one pool per pcidev and a
786 * hashed reverse table for virtual to bus physical address translations.
787 */
___dma_getp(m_pool_s * mp)788 static m_addr_t ___dma_getp(m_pool_s *mp)
789 {
790 m_addr_t vp;
791 m_vtob_s *vbp;
792
793 vbp = __m_calloc(&mp0, sizeof(*vbp), "VTOB");
794 if (vbp) {
795 dma_addr_t daddr;
796 vp = (m_addr_t) pci_alloc_consistent(mp->bush,
797 PAGE_SIZE<<MEMO_PAGE_ORDER,
798 &daddr);
799 if (vp) {
800 int hc = VTOB_HASH_CODE(vp);
801 vbp->vaddr = vp;
802 vbp->baddr = daddr;
803 vbp->next = mp->vtob[hc];
804 mp->vtob[hc] = vbp;
805 ++mp->nump;
806 return vp;
807 }
808 }
809 if (vbp)
810 __m_free(&mp0, vbp, sizeof(*vbp), "VTOB");
811 return 0;
812 }
813
___dma_freep(m_pool_s * mp,m_addr_t m)814 static void ___dma_freep(m_pool_s *mp, m_addr_t m)
815 {
816 m_vtob_s **vbpp, *vbp;
817 int hc = VTOB_HASH_CODE(m);
818
819 vbpp = &mp->vtob[hc];
820 while (*vbpp && (*vbpp)->vaddr != m)
821 vbpp = &(*vbpp)->next;
822 if (*vbpp) {
823 vbp = *vbpp;
824 *vbpp = (*vbpp)->next;
825 pci_free_consistent(mp->bush, PAGE_SIZE<<MEMO_PAGE_ORDER,
826 (void *)vbp->vaddr, (dma_addr_t)vbp->baddr);
827 __m_free(&mp0, vbp, sizeof(*vbp), "VTOB");
828 --mp->nump;
829 }
830 }
831
___get_dma_pool(m_bush_t bush)832 static inline m_pool_s *___get_dma_pool(m_bush_t bush)
833 {
834 m_pool_s *mp;
835 for (mp = mp0.next; mp && mp->bush != bush; mp = mp->next);
836 return mp;
837 }
838
___cre_dma_pool(m_bush_t bush)839 static m_pool_s *___cre_dma_pool(m_bush_t bush)
840 {
841 m_pool_s *mp;
842 mp = __m_calloc(&mp0, sizeof(*mp), "MPOOL");
843 if (mp) {
844 bzero(mp, sizeof(*mp));
845 mp->bush = bush;
846 mp->getp = ___dma_getp;
847 mp->freep = ___dma_freep;
848 mp->next = mp0.next;
849 mp0.next = mp;
850 }
851 return mp;
852 }
853
___del_dma_pool(m_pool_s * p)854 static void ___del_dma_pool(m_pool_s *p)
855 {
856 struct m_pool **pp = &mp0.next;
857
858 while (*pp && *pp != p)
859 pp = &(*pp)->next;
860 if (*pp) {
861 *pp = (*pp)->next;
862 __m_free(&mp0, p, sizeof(*p), "MPOOL");
863 }
864 }
865
__m_calloc_dma(m_bush_t bush,int size,char * name)866 static void *__m_calloc_dma(m_bush_t bush, int size, char *name)
867 {
868 u_long flags;
869 struct m_pool *mp;
870 void *m = 0;
871
872 NCR_LOCK_DRIVER(flags);
873 mp = ___get_dma_pool(bush);
874 if (!mp)
875 mp = ___cre_dma_pool(bush);
876 if (mp)
877 m = __m_calloc(mp, size, name);
878 if (mp && !mp->nump)
879 ___del_dma_pool(mp);
880 NCR_UNLOCK_DRIVER(flags);
881
882 return m;
883 }
884
__m_free_dma(m_bush_t bush,void * m,int size,char * name)885 static void __m_free_dma(m_bush_t bush, void *m, int size, char *name)
886 {
887 u_long flags;
888 struct m_pool *mp;
889
890 NCR_LOCK_DRIVER(flags);
891 mp = ___get_dma_pool(bush);
892 if (mp)
893 __m_free(mp, m, size, name);
894 if (mp && !mp->nump)
895 ___del_dma_pool(mp);
896 NCR_UNLOCK_DRIVER(flags);
897 }
898
__vtobus(m_bush_t bush,void * m)899 static m_addr_t __vtobus(m_bush_t bush, void *m)
900 {
901 u_long flags;
902 m_pool_s *mp;
903 int hc = VTOB_HASH_CODE(m);
904 m_vtob_s *vp = 0;
905 m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK;
906
907 NCR_LOCK_DRIVER(flags);
908 mp = ___get_dma_pool(bush);
909 if (mp) {
910 vp = mp->vtob[hc];
911 while (vp && (m_addr_t) vp->vaddr != a)
912 vp = vp->next;
913 }
914 NCR_UNLOCK_DRIVER(flags);
915 return vp ? vp->baddr + (((m_addr_t) m) - a) : 0;
916 }
917
918 #endif /* SCSI_NCR_DYNAMIC_DMA_MAPPING */
919
920 #define _m_calloc_dma(np, s, n) __m_calloc_dma(np->pdev, s, n)
921 #define _m_free_dma(np, p, s, n) __m_free_dma(np->pdev, p, s, n)
922 #define m_calloc_dma(s, n) _m_calloc_dma(np, s, n)
923 #define m_free_dma(p, s, n) _m_free_dma(np, p, s, n)
924 #define _vtobus(np, p) __vtobus(np->pdev, p)
925 #define vtobus(p) _vtobus(np, p)
926
927 /*
928 * Deal with DMA mapping/unmapping.
929 */
930
931 #ifndef SCSI_NCR_DYNAMIC_DMA_MAPPING
932
933 /* Linux versions prior to pci bus iommu kernel interface */
934
935 #define __unmap_scsi_data(pdev, cmd) do {; } while (0)
936 #define __map_scsi_single_data(pdev, cmd) (__vtobus(pdev,(cmd)->request_buffer))
937 #define __map_scsi_sg_data(pdev, cmd) ((cmd)->use_sg)
938 #define __sync_scsi_data(pdev, cmd) do {; } while (0)
939
940 #define scsi_sg_dma_address(sc) vtobus((sc)->address)
941 #define scsi_sg_dma_len(sc) ((sc)->length)
942
943 #else
944
945 /* Linux version with pci bus iommu kernel interface */
946
947 /* To keep track of the dma mapping (sg/single) that has been set */
948 #define __data_mapped SCp.phase
949 #define __data_mapping SCp.have_data_in
950
__unmap_scsi_data(pcidev_t pdev,Scsi_Cmnd * cmd)951 static void __unmap_scsi_data(pcidev_t pdev, Scsi_Cmnd *cmd)
952 {
953 int dma_dir = scsi_to_pci_dma_dir(cmd->sc_data_direction);
954
955 switch(cmd->__data_mapped) {
956 case 2:
957 pci_unmap_sg(pdev, cmd->buffer, cmd->use_sg, dma_dir);
958 break;
959 case 1:
960 pci_unmap_single(pdev, cmd->__data_mapping,
961 cmd->request_bufflen, dma_dir);
962 break;
963 }
964 cmd->__data_mapped = 0;
965 }
966
__map_scsi_single_data(pcidev_t pdev,Scsi_Cmnd * cmd)967 static u_long __map_scsi_single_data(pcidev_t pdev, Scsi_Cmnd *cmd)
968 {
969 dma_addr_t mapping;
970 int dma_dir = scsi_to_pci_dma_dir(cmd->sc_data_direction);
971
972 if (cmd->request_bufflen == 0)
973 return 0;
974
975 mapping = pci_map_single(pdev, cmd->request_buffer,
976 cmd->request_bufflen, dma_dir);
977 cmd->__data_mapped = 1;
978 cmd->__data_mapping = mapping;
979
980 return mapping;
981 }
982
__map_scsi_sg_data(pcidev_t pdev,Scsi_Cmnd * cmd)983 static int __map_scsi_sg_data(pcidev_t pdev, Scsi_Cmnd *cmd)
984 {
985 int use_sg;
986 int dma_dir = scsi_to_pci_dma_dir(cmd->sc_data_direction);
987
988 if (cmd->use_sg == 0)
989 return 0;
990
991 use_sg = pci_map_sg(pdev, cmd->buffer, cmd->use_sg, dma_dir);
992 cmd->__data_mapped = 2;
993 cmd->__data_mapping = use_sg;
994
995 return use_sg;
996 }
997
__sync_scsi_data(pcidev_t pdev,Scsi_Cmnd * cmd)998 static void __sync_scsi_data(pcidev_t pdev, Scsi_Cmnd *cmd)
999 {
1000 int dma_dir = scsi_to_pci_dma_dir(cmd->sc_data_direction);
1001
1002 switch(cmd->__data_mapped) {
1003 case 2:
1004 pci_dma_sync_sg(pdev, cmd->buffer, cmd->use_sg, dma_dir);
1005 break;
1006 case 1:
1007 pci_dma_sync_single(pdev, cmd->__data_mapping,
1008 cmd->request_bufflen, dma_dir);
1009 break;
1010 }
1011 }
1012
1013 #define scsi_sg_dma_address(sc) sg_dma_address(sc)
1014 #define scsi_sg_dma_len(sc) sg_dma_len(sc)
1015
1016 #endif /* SCSI_NCR_DYNAMIC_DMA_MAPPING */
1017
1018 #define unmap_scsi_data(np, cmd) __unmap_scsi_data(np->pdev, cmd)
1019 #define map_scsi_single_data(np, cmd) __map_scsi_single_data(np->pdev, cmd)
1020 #define map_scsi_sg_data(np, cmd) __map_scsi_sg_data(np->pdev, cmd)
1021 #define sync_scsi_data(np, cmd) __sync_scsi_data(np->pdev, cmd)
1022
1023 /*==========================================================
1024 **
1025 ** SCSI data transfer direction
1026 **
1027 ** Until some linux kernel version near 2.3.40,
1028 ** low-level scsi drivers were not told about data
1029 ** transfer direction. We check the existence of this
1030 ** feature that has been expected for a _long_ time by
1031 ** all SCSI driver developers by just testing against
1032 ** the definition of SCSI_DATA_UNKNOWN. Indeed this is
1033 ** a hack, but testing against a kernel version would
1034 ** have been a shame. ;-)
1035 **
1036 **==========================================================
1037 */
1038 #ifdef SCSI_DATA_UNKNOWN
1039
1040 #define scsi_data_direction(cmd) (cmd->sc_data_direction)
1041
1042 #else
1043
1044 #define SCSI_DATA_UNKNOWN 0
1045 #define SCSI_DATA_WRITE 1
1046 #define SCSI_DATA_READ 2
1047 #define SCSI_DATA_NONE 3
1048
scsi_data_direction(Scsi_Cmnd * cmd)1049 static __inline__ int scsi_data_direction(Scsi_Cmnd *cmd)
1050 {
1051 int direction;
1052
1053 switch((int) cmd->cmnd[0]) {
1054 case 0x08: /* READ(6) 08 */
1055 case 0x28: /* READ(10) 28 */
1056 case 0xA8: /* READ(12) A8 */
1057 direction = SCSI_DATA_READ;
1058 break;
1059 case 0x0A: /* WRITE(6) 0A */
1060 case 0x2A: /* WRITE(10) 2A */
1061 case 0xAA: /* WRITE(12) AA */
1062 direction = SCSI_DATA_WRITE;
1063 break;
1064 default:
1065 direction = SCSI_DATA_UNKNOWN;
1066 break;
1067 }
1068
1069 return direction;
1070 }
1071
1072 #endif /* SCSI_DATA_UNKNOWN */
1073
1074 /*==========================================================
1075 **
1076 ** Driver setup.
1077 **
1078 ** This structure is initialized from linux config
1079 ** options. It can be overridden at boot-up by the boot
1080 ** command line.
1081 **
1082 **==========================================================
1083 */
1084 static struct ncr_driver_setup
1085 driver_setup = SCSI_NCR_DRIVER_SETUP;
1086
1087 #ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT
1088 static struct ncr_driver_setup
1089 driver_safe_setup __initdata = SCSI_NCR_DRIVER_SAFE_SETUP;
1090 #endif
1091
1092 #define initverbose (driver_setup.verbose)
1093 #define bootverbose (np->verbose)
1094
1095
1096 /*==========================================================
1097 **
1098 ** Structures used by the detection routine to transmit
1099 ** device configuration to the attach function.
1100 **
1101 **==========================================================
1102 */
1103 typedef struct {
1104 int bus;
1105 u_char device_fn;
1106 u_long base;
1107 u_long base_2;
1108 u_long io_port;
1109 u_long base_c;
1110 u_long base_2_c;
1111 int irq;
1112 /* port and reg fields to use INB, OUTB macros */
1113 u_long base_io;
1114 volatile struct ncr_reg *reg;
1115 } ncr_slot;
1116
1117 /*==========================================================
1118 **
1119 ** Structure used to store the NVRAM content.
1120 **
1121 **==========================================================
1122 */
1123 typedef struct {
1124 int type;
1125 #define SCSI_NCR_SYMBIOS_NVRAM (1)
1126 #define SCSI_NCR_TEKRAM_NVRAM (2)
1127 #ifdef SCSI_NCR_NVRAM_SUPPORT
1128 union {
1129 Symbios_nvram Symbios;
1130 Tekram_nvram Tekram;
1131 } data;
1132 #endif
1133 } ncr_nvram;
1134
1135 /*==========================================================
1136 **
1137 ** Structure used by detection routine to save data on
1138 ** each detected board for attach.
1139 **
1140 **==========================================================
1141 */
1142 typedef struct {
1143 pcidev_t pdev;
1144 ncr_slot slot;
1145 ncr_chip chip;
1146 ncr_nvram *nvram;
1147 u_char host_id;
1148 #ifdef SCSI_NCR_PQS_PDS_SUPPORT
1149 u_char pqs_pds;
1150 #endif
1151 int attach_done;
1152 } ncr_device;
1153
1154 static int ncr_attach (Scsi_Host_Template *tpnt, int unit, ncr_device *device);
1155
1156 /*==========================================================
1157 **
1158 ** NVRAM detection and reading.
1159 **
1160 ** Currently supported:
1161 ** - 24C16 EEPROM with both Symbios and Tekram layout.
1162 ** - 93C46 EEPROM with Tekram layout.
1163 **
1164 **==========================================================
1165 */
1166
1167 #ifdef SCSI_NCR_NVRAM_SUPPORT
1168 /*
1169 * 24C16 EEPROM reading.
1170 *
1171 * GPOI0 - data in/data out
1172 * GPIO1 - clock
1173 * Symbios NVRAM wiring now also used by Tekram.
1174 */
1175
1176 #define SET_BIT 0
1177 #define CLR_BIT 1
1178 #define SET_CLK 2
1179 #define CLR_CLK 3
1180
1181 /*
1182 * Set/clear data/clock bit in GPIO0
1183 */
1184 static void __init
S24C16_set_bit(ncr_slot * np,u_char write_bit,u_char * gpreg,int bit_mode)1185 S24C16_set_bit(ncr_slot *np, u_char write_bit, u_char *gpreg, int bit_mode)
1186 {
1187 UDELAY (5);
1188 switch (bit_mode){
1189 case SET_BIT:
1190 *gpreg |= write_bit;
1191 break;
1192 case CLR_BIT:
1193 *gpreg &= 0xfe;
1194 break;
1195 case SET_CLK:
1196 *gpreg |= 0x02;
1197 break;
1198 case CLR_CLK:
1199 *gpreg &= 0xfd;
1200 break;
1201
1202 }
1203 OUTB (nc_gpreg, *gpreg);
1204 UDELAY (5);
1205 }
1206
1207 /*
1208 * Send START condition to NVRAM to wake it up.
1209 */
S24C16_start(ncr_slot * np,u_char * gpreg)1210 static void __init S24C16_start(ncr_slot *np, u_char *gpreg)
1211 {
1212 S24C16_set_bit(np, 1, gpreg, SET_BIT);
1213 S24C16_set_bit(np, 0, gpreg, SET_CLK);
1214 S24C16_set_bit(np, 0, gpreg, CLR_BIT);
1215 S24C16_set_bit(np, 0, gpreg, CLR_CLK);
1216 }
1217
1218 /*
1219 * Send STOP condition to NVRAM - puts NVRAM to sleep... ZZzzzz!!
1220 */
S24C16_stop(ncr_slot * np,u_char * gpreg)1221 static void __init S24C16_stop(ncr_slot *np, u_char *gpreg)
1222 {
1223 S24C16_set_bit(np, 0, gpreg, SET_CLK);
1224 S24C16_set_bit(np, 1, gpreg, SET_BIT);
1225 }
1226
1227 /*
1228 * Read or write a bit to the NVRAM,
1229 * read if GPIO0 input else write if GPIO0 output
1230 */
1231 static void __init
S24C16_do_bit(ncr_slot * np,u_char * read_bit,u_char write_bit,u_char * gpreg)1232 S24C16_do_bit(ncr_slot *np, u_char *read_bit, u_char write_bit, u_char *gpreg)
1233 {
1234 S24C16_set_bit(np, write_bit, gpreg, SET_BIT);
1235 S24C16_set_bit(np, 0, gpreg, SET_CLK);
1236 if (read_bit)
1237 *read_bit = INB (nc_gpreg);
1238 S24C16_set_bit(np, 0, gpreg, CLR_CLK);
1239 S24C16_set_bit(np, 0, gpreg, CLR_BIT);
1240 }
1241
1242 /*
1243 * Output an ACK to the NVRAM after reading,
1244 * change GPIO0 to output and when done back to an input
1245 */
1246 static void __init
S24C16_write_ack(ncr_slot * np,u_char write_bit,u_char * gpreg,u_char * gpcntl)1247 S24C16_write_ack(ncr_slot *np, u_char write_bit, u_char *gpreg, u_char *gpcntl)
1248 {
1249 OUTB (nc_gpcntl, *gpcntl & 0xfe);
1250 S24C16_do_bit(np, 0, write_bit, gpreg);
1251 OUTB (nc_gpcntl, *gpcntl);
1252 }
1253
1254 /*
1255 * Input an ACK from NVRAM after writing,
1256 * change GPIO0 to input and when done back to an output
1257 */
1258 static void __init
S24C16_read_ack(ncr_slot * np,u_char * read_bit,u_char * gpreg,u_char * gpcntl)1259 S24C16_read_ack(ncr_slot *np, u_char *read_bit, u_char *gpreg, u_char *gpcntl)
1260 {
1261 OUTB (nc_gpcntl, *gpcntl | 0x01);
1262 S24C16_do_bit(np, read_bit, 1, gpreg);
1263 OUTB (nc_gpcntl, *gpcntl);
1264 }
1265
1266 /*
1267 * WRITE a byte to the NVRAM and then get an ACK to see it was accepted OK,
1268 * GPIO0 must already be set as an output
1269 */
1270 static void __init
S24C16_write_byte(ncr_slot * np,u_char * ack_data,u_char write_data,u_char * gpreg,u_char * gpcntl)1271 S24C16_write_byte(ncr_slot *np, u_char *ack_data, u_char write_data,
1272 u_char *gpreg, u_char *gpcntl)
1273 {
1274 int x;
1275
1276 for (x = 0; x < 8; x++)
1277 S24C16_do_bit(np, 0, (write_data >> (7 - x)) & 0x01, gpreg);
1278
1279 S24C16_read_ack(np, ack_data, gpreg, gpcntl);
1280 }
1281
1282 /*
1283 * READ a byte from the NVRAM and then send an ACK to say we have got it,
1284 * GPIO0 must already be set as an input
1285 */
1286 static void __init
S24C16_read_byte(ncr_slot * np,u_char * read_data,u_char ack_data,u_char * gpreg,u_char * gpcntl)1287 S24C16_read_byte(ncr_slot *np, u_char *read_data, u_char ack_data,
1288 u_char *gpreg, u_char *gpcntl)
1289 {
1290 int x;
1291 u_char read_bit;
1292
1293 *read_data = 0;
1294 for (x = 0; x < 8; x++) {
1295 S24C16_do_bit(np, &read_bit, 1, gpreg);
1296 *read_data |= ((read_bit & 0x01) << (7 - x));
1297 }
1298
1299 S24C16_write_ack(np, ack_data, gpreg, gpcntl);
1300 }
1301
1302 /*
1303 * Read 'len' bytes starting at 'offset'.
1304 */
1305 static int __init
sym_read_S24C16_nvram(ncr_slot * np,int offset,u_char * data,int len)1306 sym_read_S24C16_nvram (ncr_slot *np, int offset, u_char *data, int len)
1307 {
1308 u_char gpcntl, gpreg;
1309 u_char old_gpcntl, old_gpreg;
1310 u_char ack_data;
1311 int retv = 1;
1312 int x;
1313
1314 /* save current state of GPCNTL and GPREG */
1315 old_gpreg = INB (nc_gpreg);
1316 old_gpcntl = INB (nc_gpcntl);
1317 gpcntl = old_gpcntl & 0x1c;
1318
1319 /* set up GPREG & GPCNTL to set GPIO0 and GPIO1 in to known state */
1320 OUTB (nc_gpreg, old_gpreg);
1321 OUTB (nc_gpcntl, gpcntl);
1322
1323 /* this is to set NVRAM into a known state with GPIO0/1 both low */
1324 gpreg = old_gpreg;
1325 S24C16_set_bit(np, 0, &gpreg, CLR_CLK);
1326 S24C16_set_bit(np, 0, &gpreg, CLR_BIT);
1327
1328 /* now set NVRAM inactive with GPIO0/1 both high */
1329 S24C16_stop(np, &gpreg);
1330
1331 /* activate NVRAM */
1332 S24C16_start(np, &gpreg);
1333
1334 /* write device code and random address MSB */
1335 S24C16_write_byte(np, &ack_data,
1336 0xa0 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
1337 if (ack_data & 0x01)
1338 goto out;
1339
1340 /* write random address LSB */
1341 S24C16_write_byte(np, &ack_data,
1342 offset & 0xff, &gpreg, &gpcntl);
1343 if (ack_data & 0x01)
1344 goto out;
1345
1346 /* regenerate START state to set up for reading */
1347 S24C16_start(np, &gpreg);
1348
1349 /* rewrite device code and address MSB with read bit set (lsb = 0x01) */
1350 S24C16_write_byte(np, &ack_data,
1351 0xa1 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
1352 if (ack_data & 0x01)
1353 goto out;
1354
1355 /* now set up GPIO0 for inputting data */
1356 gpcntl |= 0x01;
1357 OUTB (nc_gpcntl, gpcntl);
1358
1359 /* input all requested data - only part of total NVRAM */
1360 for (x = 0; x < len; x++)
1361 S24C16_read_byte(np, &data[x], (x == (len-1)), &gpreg, &gpcntl);
1362
1363 /* finally put NVRAM back in inactive mode */
1364 gpcntl &= 0xfe;
1365 OUTB (nc_gpcntl, gpcntl);
1366 S24C16_stop(np, &gpreg);
1367 retv = 0;
1368 out:
1369 /* return GPIO0/1 to original states after having accessed NVRAM */
1370 OUTB (nc_gpcntl, old_gpcntl);
1371 OUTB (nc_gpreg, old_gpreg);
1372
1373 return retv;
1374 }
1375
1376 #undef SET_BIT
1377 #undef CLR_BIT
1378 #undef SET_CLK
1379 #undef CLR_CLK
1380
1381 /*
1382 * Try reading Symbios NVRAM.
1383 * Return 0 if OK.
1384 */
sym_read_Symbios_nvram(ncr_slot * np,Symbios_nvram * nvram)1385 static int __init sym_read_Symbios_nvram (ncr_slot *np, Symbios_nvram *nvram)
1386 {
1387 static u_char Symbios_trailer[6] = {0xfe, 0xfe, 0, 0, 0, 0};
1388 u_char *data = (u_char *) nvram;
1389 int len = sizeof(*nvram);
1390 u_short csum;
1391 int x;
1392
1393 /* probe the 24c16 and read the SYMBIOS 24c16 area */
1394 if (sym_read_S24C16_nvram (np, SYMBIOS_NVRAM_ADDRESS, data, len))
1395 return 1;
1396
1397 /* check valid NVRAM signature, verify byte count and checksum */
1398 if (nvram->type != 0 ||
1399 memcmp(nvram->trailer, Symbios_trailer, 6) ||
1400 nvram->byte_count != len - 12)
1401 return 1;
1402
1403 /* verify checksum */
1404 for (x = 6, csum = 0; x < len - 6; x++)
1405 csum += data[x];
1406 if (csum != nvram->checksum)
1407 return 1;
1408
1409 return 0;
1410 }
1411
1412 /*
1413 * 93C46 EEPROM reading.
1414 *
1415 * GPOI0 - data in
1416 * GPIO1 - data out
1417 * GPIO2 - clock
1418 * GPIO4 - chip select
1419 *
1420 * Used by Tekram.
1421 */
1422
1423 /*
1424 * Pulse clock bit in GPIO0
1425 */
T93C46_Clk(ncr_slot * np,u_char * gpreg)1426 static void __init T93C46_Clk(ncr_slot *np, u_char *gpreg)
1427 {
1428 OUTB (nc_gpreg, *gpreg | 0x04);
1429 UDELAY (2);
1430 OUTB (nc_gpreg, *gpreg);
1431 }
1432
1433 /*
1434 * Read bit from NVRAM
1435 */
T93C46_Read_Bit(ncr_slot * np,u_char * read_bit,u_char * gpreg)1436 static void __init T93C46_Read_Bit(ncr_slot *np, u_char *read_bit, u_char *gpreg)
1437 {
1438 UDELAY (2);
1439 T93C46_Clk(np, gpreg);
1440 *read_bit = INB (nc_gpreg);
1441 }
1442
1443 /*
1444 * Write bit to GPIO0
1445 */
T93C46_Write_Bit(ncr_slot * np,u_char write_bit,u_char * gpreg)1446 static void __init T93C46_Write_Bit(ncr_slot *np, u_char write_bit, u_char *gpreg)
1447 {
1448 if (write_bit & 0x01)
1449 *gpreg |= 0x02;
1450 else
1451 *gpreg &= 0xfd;
1452
1453 *gpreg |= 0x10;
1454
1455 OUTB (nc_gpreg, *gpreg);
1456 UDELAY (2);
1457
1458 T93C46_Clk(np, gpreg);
1459 }
1460
1461 /*
1462 * Send STOP condition to NVRAM - puts NVRAM to sleep... ZZZzzz!!
1463 */
T93C46_Stop(ncr_slot * np,u_char * gpreg)1464 static void __init T93C46_Stop(ncr_slot *np, u_char *gpreg)
1465 {
1466 *gpreg &= 0xef;
1467 OUTB (nc_gpreg, *gpreg);
1468 UDELAY (2);
1469
1470 T93C46_Clk(np, gpreg);
1471 }
1472
1473 /*
1474 * Send read command and address to NVRAM
1475 */
1476 static void __init
T93C46_Send_Command(ncr_slot * np,u_short write_data,u_char * read_bit,u_char * gpreg)1477 T93C46_Send_Command(ncr_slot *np, u_short write_data,
1478 u_char *read_bit, u_char *gpreg)
1479 {
1480 int x;
1481
1482 /* send 9 bits, start bit (1), command (2), address (6) */
1483 for (x = 0; x < 9; x++)
1484 T93C46_Write_Bit(np, (u_char) (write_data >> (8 - x)), gpreg);
1485
1486 *read_bit = INB (nc_gpreg);
1487 }
1488
1489 /*
1490 * READ 2 bytes from the NVRAM
1491 */
1492 static void __init
T93C46_Read_Word(ncr_slot * np,u_short * nvram_data,u_char * gpreg)1493 T93C46_Read_Word(ncr_slot *np, u_short *nvram_data, u_char *gpreg)
1494 {
1495 int x;
1496 u_char read_bit;
1497
1498 *nvram_data = 0;
1499 for (x = 0; x < 16; x++) {
1500 T93C46_Read_Bit(np, &read_bit, gpreg);
1501
1502 if (read_bit & 0x01)
1503 *nvram_data |= (0x01 << (15 - x));
1504 else
1505 *nvram_data &= ~(0x01 << (15 - x));
1506 }
1507 }
1508
1509 /*
1510 * Read Tekram NvRAM data.
1511 */
1512 static int __init
T93C46_Read_Data(ncr_slot * np,u_short * data,int len,u_char * gpreg)1513 T93C46_Read_Data(ncr_slot *np, u_short *data,int len,u_char *gpreg)
1514 {
1515 u_char read_bit;
1516 int x;
1517
1518 for (x = 0; x < len; x++) {
1519
1520 /* output read command and address */
1521 T93C46_Send_Command(np, 0x180 | x, &read_bit, gpreg);
1522 if (read_bit & 0x01)
1523 return 1; /* Bad */
1524 T93C46_Read_Word(np, &data[x], gpreg);
1525 T93C46_Stop(np, gpreg);
1526 }
1527
1528 return 0;
1529 }
1530
1531 /*
1532 * Try reading 93C46 Tekram NVRAM.
1533 */
1534 static int __init
sym_read_T93C46_nvram(ncr_slot * np,Tekram_nvram * nvram)1535 sym_read_T93C46_nvram (ncr_slot *np, Tekram_nvram *nvram)
1536 {
1537 u_char gpcntl, gpreg;
1538 u_char old_gpcntl, old_gpreg;
1539 int retv = 1;
1540
1541 /* save current state of GPCNTL and GPREG */
1542 old_gpreg = INB (nc_gpreg);
1543 old_gpcntl = INB (nc_gpcntl);
1544
1545 /* set up GPREG & GPCNTL to set GPIO0/1/2/4 in to known state, 0 in,
1546 1/2/4 out */
1547 gpreg = old_gpreg & 0xe9;
1548 OUTB (nc_gpreg, gpreg);
1549 gpcntl = (old_gpcntl & 0xe9) | 0x09;
1550 OUTB (nc_gpcntl, gpcntl);
1551
1552 /* input all of NVRAM, 64 words */
1553 retv = T93C46_Read_Data(np, (u_short *) nvram,
1554 sizeof(*nvram) / sizeof(short), &gpreg);
1555
1556 /* return GPIO0/1/2/4 to original states after having accessed NVRAM */
1557 OUTB (nc_gpcntl, old_gpcntl);
1558 OUTB (nc_gpreg, old_gpreg);
1559
1560 return retv;
1561 }
1562
1563 /*
1564 * Try reading Tekram NVRAM.
1565 * Return 0 if OK.
1566 */
1567 static int __init
sym_read_Tekram_nvram(ncr_slot * np,u_short device_id,Tekram_nvram * nvram)1568 sym_read_Tekram_nvram (ncr_slot *np, u_short device_id, Tekram_nvram *nvram)
1569 {
1570 u_char *data = (u_char *) nvram;
1571 int len = sizeof(*nvram);
1572 u_short csum;
1573 int x;
1574
1575 switch (device_id) {
1576 case PCI_DEVICE_ID_NCR_53C885:
1577 case PCI_DEVICE_ID_NCR_53C895:
1578 case PCI_DEVICE_ID_NCR_53C896:
1579 x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
1580 data, len);
1581 break;
1582 case PCI_DEVICE_ID_NCR_53C875:
1583 x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
1584 data, len);
1585 if (!x)
1586 break;
1587 default:
1588 x = sym_read_T93C46_nvram(np, nvram);
1589 break;
1590 }
1591 if (x)
1592 return 1;
1593
1594 /* verify checksum */
1595 for (x = 0, csum = 0; x < len - 1; x += 2)
1596 csum += data[x] + (data[x+1] << 8);
1597 if (csum != 0x1234)
1598 return 1;
1599
1600 return 0;
1601 }
1602
1603 #endif /* SCSI_NCR_NVRAM_SUPPORT */
1604
1605 /*===================================================================
1606 **
1607 ** Detect and try to read SYMBIOS and TEKRAM NVRAM.
1608 **
1609 ** Data can be used to order booting of boards.
1610 **
1611 ** Data is saved in ncr_device structure if NVRAM found. This
1612 ** is then used to find drive boot order for ncr_attach().
1613 **
1614 ** NVRAM data is passed to Scsi_Host_Template later during
1615 ** ncr_attach() for any device set up.
1616 **
1617 **===================================================================
1618 */
1619 #ifdef SCSI_NCR_NVRAM_SUPPORT
ncr_get_nvram(ncr_device * devp,ncr_nvram * nvp)1620 static void __init ncr_get_nvram(ncr_device *devp, ncr_nvram *nvp)
1621 {
1622 devp->nvram = nvp;
1623 if (!nvp)
1624 return;
1625 /*
1626 ** Get access to chip IO registers
1627 */
1628 #ifdef SCSI_NCR_IOMAPPED
1629 request_region(devp->slot.io_port, 128, NAME53C8XX);
1630 devp->slot.base_io = devp->slot.io_port;
1631 #else
1632 devp->slot.reg =
1633 (struct ncr_reg *) remap_pci_mem(devp->slot.base_c, 128);
1634 if (!devp->slot.reg)
1635 return;
1636 #endif
1637
1638 /*
1639 ** Try to read SYMBIOS nvram.
1640 ** Try to read TEKRAM nvram if Symbios nvram not found.
1641 */
1642 if (!sym_read_Symbios_nvram(&devp->slot, &nvp->data.Symbios))
1643 nvp->type = SCSI_NCR_SYMBIOS_NVRAM;
1644 else if (!sym_read_Tekram_nvram(&devp->slot, devp->chip.device_id,
1645 &nvp->data.Tekram))
1646 nvp->type = SCSI_NCR_TEKRAM_NVRAM;
1647 else {
1648 nvp->type = 0;
1649 devp->nvram = 0;
1650 }
1651
1652 /*
1653 ** Release access to chip IO registers
1654 */
1655 #ifdef SCSI_NCR_IOMAPPED
1656 release_region(devp->slot.base_io, 128);
1657 #else
1658 unmap_pci_mem((u_long) devp->slot.reg, 128ul);
1659 #endif
1660
1661 }
1662
1663 /*===================================================================
1664 **
1665 ** Display the content of NVRAM for debugging purpose.
1666 **
1667 **===================================================================
1668 */
1669 #ifdef SCSI_NCR_DEBUG_NVRAM
ncr_display_Symbios_nvram(Symbios_nvram * nvram)1670 static void __init ncr_display_Symbios_nvram(Symbios_nvram *nvram)
1671 {
1672 int i;
1673
1674 /* display Symbios nvram host data */
1675 printk(KERN_DEBUG NAME53C8XX ": HOST ID=%d%s%s%s%s%s\n",
1676 nvram->host_id & 0x0f,
1677 (nvram->flags & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
1678 (nvram->flags & SYMBIOS_PARITY_ENABLE) ? " PARITY" :"",
1679 (nvram->flags & SYMBIOS_VERBOSE_MSGS) ? " VERBOSE" :"",
1680 (nvram->flags & SYMBIOS_CHS_MAPPING) ? " CHS_ALT" :"",
1681 (nvram->flags1 & SYMBIOS_SCAN_HI_LO) ? " HI_LO" :"");
1682
1683 /* display Symbios nvram drive data */
1684 for (i = 0 ; i < 15 ; i++) {
1685 struct Symbios_target *tn = &nvram->target[i];
1686 printk(KERN_DEBUG NAME53C8XX
1687 "-%d:%s%s%s%s WIDTH=%d SYNC=%d TMO=%d\n",
1688 i,
1689 (tn->flags & SYMBIOS_DISCONNECT_ENABLE) ? " DISC" : "",
1690 (tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME) ? " SCAN_BOOT" : "",
1691 (tn->flags & SYMBIOS_SCAN_LUNS) ? " SCAN_LUNS" : "",
1692 (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? " TCQ" : "",
1693 tn->bus_width,
1694 tn->sync_period / 4,
1695 tn->timeout);
1696 }
1697 }
1698
1699 static u_char Tekram_boot_delay[7] __initdata = {3, 5, 10, 20, 30, 60, 120};
1700
ncr_display_Tekram_nvram(Tekram_nvram * nvram)1701 static void __init ncr_display_Tekram_nvram(Tekram_nvram *nvram)
1702 {
1703 int i, tags, boot_delay;
1704 char *rem;
1705
1706 /* display Tekram nvram host data */
1707 tags = 2 << nvram->max_tags_index;
1708 boot_delay = 0;
1709 if (nvram->boot_delay_index < 6)
1710 boot_delay = Tekram_boot_delay[nvram->boot_delay_index];
1711 switch((nvram->flags & TEKRAM_REMOVABLE_FLAGS) >> 6) {
1712 default:
1713 case 0: rem = ""; break;
1714 case 1: rem = " REMOVABLE=boot device"; break;
1715 case 2: rem = " REMOVABLE=all"; break;
1716 }
1717
1718 printk(KERN_DEBUG NAME53C8XX
1719 ": HOST ID=%d%s%s%s%s%s%s%s%s%s BOOT DELAY=%d tags=%d\n",
1720 nvram->host_id & 0x0f,
1721 (nvram->flags1 & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
1722 (nvram->flags & TEKRAM_MORE_THAN_2_DRIVES) ? " >2DRIVES":"",
1723 (nvram->flags & TEKRAM_DRIVES_SUP_1GB) ? " >1GB" :"",
1724 (nvram->flags & TEKRAM_RESET_ON_POWER_ON) ? " RESET" :"",
1725 (nvram->flags & TEKRAM_ACTIVE_NEGATION) ? " ACT_NEG" :"",
1726 (nvram->flags & TEKRAM_IMMEDIATE_SEEK) ? " IMM_SEEK" :"",
1727 (nvram->flags & TEKRAM_SCAN_LUNS) ? " SCAN_LUNS" :"",
1728 (nvram->flags1 & TEKRAM_F2_F6_ENABLED) ? " F2_F6" :"",
1729 rem, boot_delay, tags);
1730
1731 /* display Tekram nvram drive data */
1732 for (i = 0; i <= 15; i++) {
1733 int sync, j;
1734 struct Tekram_target *tn = &nvram->target[i];
1735 j = tn->sync_index & 0xf;
1736 sync = Tekram_sync[j];
1737 printk(KERN_DEBUG NAME53C8XX "-%d:%s%s%s%s%s%s PERIOD=%d\n",
1738 i,
1739 (tn->flags & TEKRAM_PARITY_CHECK) ? " PARITY" : "",
1740 (tn->flags & TEKRAM_SYNC_NEGO) ? " SYNC" : "",
1741 (tn->flags & TEKRAM_DISCONNECT_ENABLE) ? " DISC" : "",
1742 (tn->flags & TEKRAM_START_CMD) ? " START" : "",
1743 (tn->flags & TEKRAM_TAGGED_COMMANDS) ? " TCQ" : "",
1744 (tn->flags & TEKRAM_WIDE_NEGO) ? " WIDE" : "",
1745 sync);
1746 }
1747 }
1748 #endif /* SCSI_NCR_DEBUG_NVRAM */
1749 #endif /* SCSI_NCR_NVRAM_SUPPORT */
1750
1751
1752 /*===================================================================
1753 **
1754 ** Utility routines that protperly return data through /proc FS.
1755 **
1756 **===================================================================
1757 */
1758 #ifdef SCSI_NCR_USER_INFO_SUPPORT
1759
1760 struct info_str
1761 {
1762 char *buffer;
1763 int length;
1764 int offset;
1765 int pos;
1766 };
1767
copy_mem_info(struct info_str * info,char * data,int len)1768 static void copy_mem_info(struct info_str *info, char *data, int len)
1769 {
1770 if (info->pos + len > info->length)
1771 len = info->length - info->pos;
1772
1773 if (info->pos + len < info->offset) {
1774 info->pos += len;
1775 return;
1776 }
1777 if (info->pos < info->offset) {
1778 data += (info->offset - info->pos);
1779 len -= (info->offset - info->pos);
1780 }
1781
1782 if (len > 0) {
1783 memcpy(info->buffer + info->pos, data, len);
1784 info->pos += len;
1785 }
1786 }
1787
copy_info(struct info_str * info,char * fmt,...)1788 static int copy_info(struct info_str *info, char *fmt, ...)
1789 {
1790 va_list args;
1791 char buf[81];
1792 int len;
1793
1794 va_start(args, fmt);
1795 len = vsprintf(buf, fmt, args);
1796 va_end(args);
1797
1798 copy_mem_info(info, buf, len);
1799 return len;
1800 }
1801
1802 #endif
1803
1804 /*===================================================================
1805 **
1806 ** Driver setup from the boot command line
1807 **
1808 **===================================================================
1809 */
1810
1811 #ifdef MODULE
1812 #define ARG_SEP ' '
1813 #else
1814 #define ARG_SEP ','
1815 #endif
1816
1817 #define OPT_TAGS 1
1818 #define OPT_MASTER_PARITY 2
1819 #define OPT_SCSI_PARITY 3
1820 #define OPT_DISCONNECTION 4
1821 #define OPT_SPECIAL_FEATURES 5
1822 #define OPT_UNUSED_1 6
1823 #define OPT_FORCE_SYNC_NEGO 7
1824 #define OPT_REVERSE_PROBE 8
1825 #define OPT_DEFAULT_SYNC 9
1826 #define OPT_VERBOSE 10
1827 #define OPT_DEBUG 11
1828 #define OPT_BURST_MAX 12
1829 #define OPT_LED_PIN 13
1830 #define OPT_MAX_WIDE 14
1831 #define OPT_SETTLE_DELAY 15
1832 #define OPT_DIFF_SUPPORT 16
1833 #define OPT_IRQM 17
1834 #define OPT_PCI_FIX_UP 18
1835 #define OPT_BUS_CHECK 19
1836 #define OPT_OPTIMIZE 20
1837 #define OPT_RECOVERY 21
1838 #define OPT_SAFE_SETUP 22
1839 #define OPT_USE_NVRAM 23
1840 #define OPT_EXCLUDE 24
1841 #define OPT_HOST_ID 25
1842
1843 #ifdef SCSI_NCR_IARB_SUPPORT
1844 #define OPT_IARB 26
1845 #endif
1846
1847 static char setup_token[] __initdata =
1848 "tags:" "mpar:"
1849 "spar:" "disc:"
1850 "specf:" "ultra:"
1851 "fsn:" "revprob:"
1852 "sync:" "verb:"
1853 "debug:" "burst:"
1854 "led:" "wide:"
1855 "settle:" "diff:"
1856 "irqm:" "pcifix:"
1857 "buschk:" "optim:"
1858 "recovery:"
1859 "safe:" "nvram:"
1860 "excl:" "hostid:"
1861 #ifdef SCSI_NCR_IARB_SUPPORT
1862 "iarb:"
1863 #endif
1864 ; /* DONNOT REMOVE THIS ';' */
1865
1866 #ifdef MODULE
1867 #define ARG_SEP ' '
1868 #else
1869 #define ARG_SEP ','
1870 #endif
1871
get_setup_token(char * p)1872 static int __init get_setup_token(char *p)
1873 {
1874 char *cur = setup_token;
1875 char *pc;
1876 int i = 0;
1877
1878 while (cur != NULL && (pc = strchr(cur, ':')) != NULL) {
1879 ++pc;
1880 ++i;
1881 if (!strncmp(p, cur, pc - cur))
1882 return i;
1883 cur = pc;
1884 }
1885 return 0;
1886 }
1887
1888
sym53c8xx__setup(char * str)1889 static int __init sym53c8xx__setup(char *str)
1890 {
1891 #ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT
1892 char *cur = str;
1893 char *pc, *pv;
1894 int i, val, c;
1895 int xi = 0;
1896
1897 while (cur != NULL && (pc = strchr(cur, ':')) != NULL) {
1898 char *pe;
1899
1900 val = 0;
1901 pv = pc;
1902 c = *++pv;
1903
1904 if (c == 'n')
1905 val = 0;
1906 else if (c == 'y')
1907 val = 1;
1908 else
1909 val = (int) simple_strtoul(pv, &pe, 0);
1910
1911 switch (get_setup_token(cur)) {
1912 case OPT_TAGS:
1913 driver_setup.default_tags = val;
1914 if (pe && *pe == '/') {
1915 i = 0;
1916 while (*pe && *pe != ARG_SEP &&
1917 i < sizeof(driver_setup.tag_ctrl)-1) {
1918 driver_setup.tag_ctrl[i++] = *pe++;
1919 }
1920 driver_setup.tag_ctrl[i] = '\0';
1921 }
1922 break;
1923 case OPT_MASTER_PARITY:
1924 driver_setup.master_parity = val;
1925 break;
1926 case OPT_SCSI_PARITY:
1927 driver_setup.scsi_parity = val;
1928 break;
1929 case OPT_DISCONNECTION:
1930 driver_setup.disconnection = val;
1931 break;
1932 case OPT_SPECIAL_FEATURES:
1933 driver_setup.special_features = val;
1934 break;
1935 case OPT_FORCE_SYNC_NEGO:
1936 driver_setup.force_sync_nego = val;
1937 break;
1938 case OPT_REVERSE_PROBE:
1939 driver_setup.reverse_probe = val;
1940 break;
1941 case OPT_DEFAULT_SYNC:
1942 driver_setup.default_sync = val;
1943 break;
1944 case OPT_VERBOSE:
1945 driver_setup.verbose = val;
1946 break;
1947 case OPT_DEBUG:
1948 driver_setup.debug = val;
1949 break;
1950 case OPT_BURST_MAX:
1951 driver_setup.burst_max = val;
1952 break;
1953 case OPT_LED_PIN:
1954 driver_setup.led_pin = val;
1955 break;
1956 case OPT_MAX_WIDE:
1957 driver_setup.max_wide = val? 1:0;
1958 break;
1959 case OPT_SETTLE_DELAY:
1960 driver_setup.settle_delay = val;
1961 break;
1962 case OPT_DIFF_SUPPORT:
1963 driver_setup.diff_support = val;
1964 break;
1965 case OPT_IRQM:
1966 driver_setup.irqm = val;
1967 break;
1968 case OPT_PCI_FIX_UP:
1969 driver_setup.pci_fix_up = val;
1970 break;
1971 case OPT_BUS_CHECK:
1972 driver_setup.bus_check = val;
1973 break;
1974 case OPT_OPTIMIZE:
1975 driver_setup.optimize = val;
1976 break;
1977 case OPT_RECOVERY:
1978 driver_setup.recovery = val;
1979 break;
1980 case OPT_USE_NVRAM:
1981 driver_setup.use_nvram = val;
1982 break;
1983 case OPT_SAFE_SETUP:
1984 memcpy(&driver_setup, &driver_safe_setup,
1985 sizeof(driver_setup));
1986 break;
1987 case OPT_EXCLUDE:
1988 if (xi < SCSI_NCR_MAX_EXCLUDES)
1989 driver_setup.excludes[xi++] = val;
1990 break;
1991 case OPT_HOST_ID:
1992 driver_setup.host_id = val;
1993 break;
1994 #ifdef SCSI_NCR_IARB_SUPPORT
1995 case OPT_IARB:
1996 driver_setup.iarb = val;
1997 break;
1998 #endif
1999 default:
2000 printk("sym53c8xx_setup: unexpected boot option '%.*s' ignored\n", (int)(pc-cur+1), cur);
2001 break;
2002 }
2003
2004 if ((cur = strchr(cur, ARG_SEP)) != NULL)
2005 ++cur;
2006 }
2007 #endif /* SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT */
2008 return 1;
2009 }
2010
2011 /*===================================================================
2012 **
2013 ** Get device queue depth from boot command line.
2014 **
2015 **===================================================================
2016 */
2017 #define DEF_DEPTH (driver_setup.default_tags)
2018 #define ALL_TARGETS -2
2019 #define NO_TARGET -1
2020 #define ALL_LUNS -2
2021 #define NO_LUN -1
2022
device_queue_depth(int unit,int target,int lun)2023 static int device_queue_depth(int unit, int target, int lun)
2024 {
2025 int c, h, t, u, v;
2026 char *p = driver_setup.tag_ctrl;
2027 char *ep;
2028
2029 h = -1;
2030 t = NO_TARGET;
2031 u = NO_LUN;
2032 while ((c = *p++) != 0) {
2033 v = simple_strtoul(p, &ep, 0);
2034 switch(c) {
2035 case '/':
2036 ++h;
2037 t = ALL_TARGETS;
2038 u = ALL_LUNS;
2039 break;
2040 case 't':
2041 if (t != target)
2042 t = (target == v) ? v : NO_TARGET;
2043 u = ALL_LUNS;
2044 break;
2045 case 'u':
2046 if (u != lun)
2047 u = (lun == v) ? v : NO_LUN;
2048 break;
2049 case 'q':
2050 if (h == unit &&
2051 (t == ALL_TARGETS || t == target) &&
2052 (u == ALL_LUNS || u == lun))
2053 return v;
2054 break;
2055 case '-':
2056 t = ALL_TARGETS;
2057 u = ALL_LUNS;
2058 break;
2059 default:
2060 break;
2061 }
2062 p = ep;
2063 }
2064 return DEF_DEPTH;
2065 }
2066
2067 /*===================================================================
2068 **
2069 ** Print out information about driver configuration.
2070 **
2071 **===================================================================
2072 */
ncr_print_driver_setup(void)2073 static void __init ncr_print_driver_setup(void)
2074 {
2075 #define YesNo(y) y ? 'y' : 'n'
2076 printk (NAME53C8XX ": setup=disc:%c,specf:%d,tags:%d,sync:%d,"
2077 "burst:%d,wide:%c,diff:%d,revprob:%c,buschk:0x%x\n",
2078 YesNo(driver_setup.disconnection),
2079 driver_setup.special_features,
2080 driver_setup.default_tags,
2081 driver_setup.default_sync,
2082 driver_setup.burst_max,
2083 YesNo(driver_setup.max_wide),
2084 driver_setup.diff_support,
2085 YesNo(driver_setup.reverse_probe),
2086 driver_setup.bus_check);
2087
2088 printk (NAME53C8XX ": setup=mpar:%c,spar:%c,fsn=%c,verb:%d,debug:0x%x,"
2089 "led:%c,settle:%d,irqm:0x%x,nvram:0x%x,pcifix:0x%x\n",
2090 YesNo(driver_setup.master_parity),
2091 YesNo(driver_setup.scsi_parity),
2092 YesNo(driver_setup.force_sync_nego),
2093 driver_setup.verbose,
2094 driver_setup.debug,
2095 YesNo(driver_setup.led_pin),
2096 driver_setup.settle_delay,
2097 driver_setup.irqm,
2098 driver_setup.use_nvram,
2099 driver_setup.pci_fix_up);
2100 #undef YesNo
2101 }
2102
2103 /*===================================================================
2104 **
2105 ** SYM53C8XX devices description table.
2106 **
2107 **===================================================================
2108 */
2109
2110 static ncr_chip ncr_chip_table[] __initdata = SCSI_NCR_CHIP_TABLE;
2111
2112 #ifdef SCSI_NCR_PQS_PDS_SUPPORT
2113 /*===================================================================
2114 **
2115 ** Detect all NCR PQS/PDS boards and keep track of their bus nr.
2116 **
2117 ** The NCR PQS or PDS card is constructed as a DEC bridge
2118 ** behind which sit a proprietary NCR memory controller and
2119 ** four or two 53c875s as separate devices. In its usual mode
2120 ** of operation, the 875s are slaved to the memory controller
2121 ** for all transfers. We can tell if an 875 is part of a
2122 ** PQS/PDS or not since if it is, it will be on the same bus
2123 ** as the memory controller. To operate with the Linux
2124 ** driver, the memory controller is disabled and the 875s
2125 ** freed to function independently. The only wrinkle is that
2126 ** the preset SCSI ID (which may be zero) must be read in from
2127 ** a special configuration space register of the 875.
2128 **
2129 **===================================================================
2130 */
2131 #define SCSI_NCR_MAX_PQS_BUS 16
2132 static int pqs_bus[SCSI_NCR_MAX_PQS_BUS] __initdata = { 0 };
2133
ncr_detect_pqs_pds(void)2134 static void __init ncr_detect_pqs_pds(void)
2135 {
2136 short index;
2137 pcidev_t dev = PCIDEV_NULL;
2138
2139 for(index=0; index < SCSI_NCR_MAX_PQS_BUS; index++) {
2140 u_char tmp;
2141
2142 dev = pci_find_device(0x101a, 0x0009, dev);
2143 if (dev == PCIDEV_NULL) {
2144 pqs_bus[index] = -1;
2145 break;
2146 }
2147 printk(KERN_INFO NAME53C8XX ": NCR PQS/PDS memory controller detected on bus %d\n", PciBusNumber(dev));
2148 pci_read_config_byte(dev, 0x44, &tmp);
2149 /* bit 1: allow individual 875 configuration */
2150 tmp |= 0x2;
2151 pci_write_config_byte(dev, 0x44, tmp);
2152 pci_read_config_byte(dev, 0x45, &tmp);
2153 /* bit 2: drive individual 875 interrupts to the bus */
2154 tmp |= 0x4;
2155 pci_write_config_byte(dev, 0x45, tmp);
2156
2157 pqs_bus[index] = PciBusNumber(dev);
2158 }
2159 }
2160 #endif /* SCSI_NCR_PQS_PDS_SUPPORT */
2161
2162 /*===================================================================
2163 **
2164 ** Read and check the PCI configuration for any detected NCR
2165 ** boards and save data for attaching after all boards have
2166 ** been detected.
2167 **
2168 **===================================================================
2169 */
2170 static int __init
sym53c8xx_pci_init(Scsi_Host_Template * tpnt,pcidev_t pdev,ncr_device * device)2171 sym53c8xx_pci_init(Scsi_Host_Template *tpnt, pcidev_t pdev, ncr_device *device)
2172 {
2173 u_short vendor_id, device_id, command;
2174 u_char cache_line_size, latency_timer;
2175 u_char suggested_cache_line_size = 0;
2176 u_char pci_fix_up = driver_setup.pci_fix_up;
2177 u_char revision;
2178 u_int irq;
2179 u_long base, base_c, base_2, base_2_c, io_port;
2180 int i;
2181 ncr_chip *chip;
2182
2183 printk(KERN_INFO NAME53C8XX ": at PCI bus %d, device %d, function %d\n",
2184 PciBusNumber(pdev),
2185 (int) (PciDeviceFn(pdev) & 0xf8) >> 3,
2186 (int) (PciDeviceFn(pdev) & 7));
2187
2188 #ifdef SCSI_NCR_DYNAMIC_DMA_MAPPING
2189 if (!pci_dma_supported(pdev, 0xffffffff)) {
2190 printk(KERN_WARNING NAME53C8XX
2191 "32 BIT PCI BUS DMA ADDRESSING NOT SUPPORTED\n");
2192 return -1;
2193 }
2194 #endif
2195
2196 /*
2197 ** Read info from the PCI config space.
2198 ** pci_read_config_xxx() functions are assumed to be used for
2199 ** successfully detected PCI devices.
2200 */
2201 vendor_id = PciVendorId(pdev);
2202 device_id = PciDeviceId(pdev);
2203 irq = PciIrqLine(pdev);
2204
2205 i = pci_get_base_address(pdev, 0, &io_port);
2206 io_port = pci_get_base_cookie(pdev, 0);
2207
2208 base_c = pci_get_base_cookie(pdev, i);
2209 i = pci_get_base_address(pdev, i, &base);
2210
2211 base_2_c = pci_get_base_cookie(pdev, i);
2212 (void) pci_get_base_address(pdev, i, &base_2);
2213
2214 pci_read_config_word(pdev, PCI_COMMAND, &command);
2215 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
2216 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_line_size);
2217 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency_timer);
2218
2219 #ifdef SCSI_NCR_PQS_PDS_SUPPORT
2220 /*
2221 ** Match the BUS number for PQS/PDS devices.
2222 ** Read the SCSI ID from a special register mapped
2223 ** into the configuration space of the individual
2224 ** 875s. This register is set up by the PQS bios
2225 */
2226 for(i = 0; i < SCSI_NCR_MAX_PQS_BUS && pqs_bus[i] != -1; i++) {
2227 u_char tmp;
2228 if (pqs_bus[i] == PciBusNumber(pdev)) {
2229 pci_read_config_byte(pdev, 0x84, &tmp);
2230 device->pqs_pds = 1;
2231 device->host_id = tmp;
2232 break;
2233 }
2234 }
2235 #endif /* SCSI_NCR_PQS_PDS_SUPPORT */
2236
2237 /*
2238 ** If user excludes this chip, donnot initialize it.
2239 */
2240 for (i = 0 ; i < SCSI_NCR_MAX_EXCLUDES ; i++) {
2241 if (driver_setup.excludes[i] ==
2242 (io_port & PCI_BASE_ADDRESS_IO_MASK))
2243 return -1;
2244 }
2245 /*
2246 ** Check if the chip is supported
2247 */
2248 if ((device_id == PCI_DEVICE_ID_LSI_53C1010) ||
2249 (device_id == PCI_DEVICE_ID_LSI_53C1010_66)){
2250 printk(NAME53C8XX ": not initializing, device not supported\n");
2251 return -1;
2252 }
2253 chip = 0;
2254 for (i = 0; i < sizeof(ncr_chip_table)/sizeof(ncr_chip_table[0]); i++) {
2255 if (device_id != ncr_chip_table[i].device_id)
2256 continue;
2257 if (revision > ncr_chip_table[i].revision_id)
2258 continue;
2259 chip = &device->chip;
2260 memcpy(chip, &ncr_chip_table[i], sizeof(*chip));
2261 chip->revision_id = revision;
2262 break;
2263 }
2264
2265 /*
2266 ** Ignore Symbios chips controlled by SISL RAID controller.
2267 ** This controller sets value 0x52414944 at RAM end - 16.
2268 */
2269 #if defined(__i386__) && !defined(SCSI_NCR_PCI_MEM_NOT_SUPPORTED)
2270 if (chip && (base_2_c & PCI_BASE_ADDRESS_MEM_MASK)) {
2271 unsigned int ram_size, ram_val;
2272 u_long ram_ptr;
2273
2274 if (chip->features & FE_RAM8K)
2275 ram_size = 8192;
2276 else
2277 ram_size = 4096;
2278
2279 ram_ptr = remap_pci_mem(base_2_c & PCI_BASE_ADDRESS_MEM_MASK,
2280 ram_size);
2281 if (ram_ptr) {
2282 ram_val = readl_raw(ram_ptr + ram_size - 16);
2283 unmap_pci_mem(ram_ptr, ram_size);
2284 if (ram_val == 0x52414944) {
2285 printk(NAME53C8XX": not initializing, "
2286 "driven by SISL RAID controller.\n");
2287 return -1;
2288 }
2289 }
2290 }
2291 #endif /* i386 and PCI MEMORY accessible */
2292
2293 if (!chip) {
2294 printk(NAME53C8XX ": not initializing, device not supported\n");
2295 return -1;
2296 }
2297
2298 #ifdef __powerpc__
2299 /*
2300 ** Fix-up for power/pc.
2301 ** Should not be performed by the driver.
2302 */
2303 if ((command & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY))
2304 != (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) {
2305 printk(NAME53C8XX ": setting%s%s...\n",
2306 (command & PCI_COMMAND_IO) ? "" : " PCI_COMMAND_IO",
2307 (command & PCI_COMMAND_MEMORY) ? "" : " PCI_COMMAND_MEMORY");
2308 command |= (PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
2309 pci_write_config_word(pdev, PCI_COMMAND, command);
2310 }
2311
2312 #if LINUX_VERSION_CODE < LinuxVersionCode(2,2,0)
2313 if ( is_prep ) {
2314 if (io_port >= 0x10000000) {
2315 printk(NAME53C8XX ": reallocating io_port (Wacky IBM)");
2316 io_port = (io_port & 0x00FFFFFF) | 0x01000000;
2317 pci_write_config_dword(pdev,
2318 PCI_BASE_ADDRESS_0, io_port);
2319 }
2320 if (base >= 0x10000000) {
2321 printk(NAME53C8XX ": reallocating base (Wacky IBM)");
2322 base = (base & 0x00FFFFFF) | 0x01000000;
2323 pci_write_config_dword(pdev,
2324 PCI_BASE_ADDRESS_1, base);
2325 }
2326 if (base_2 >= 0x10000000) {
2327 printk(NAME53C8XX ": reallocating base2 (Wacky IBM)");
2328 base_2 = (base_2 & 0x00FFFFFF) | 0x01000000;
2329 pci_write_config_dword(pdev,
2330 PCI_BASE_ADDRESS_2, base_2);
2331 }
2332 }
2333 #endif
2334 #endif /* __powerpc__ */
2335
2336 #if defined(__i386__) && !defined(MODULE)
2337 if (!cache_line_size) {
2338 #if LINUX_VERSION_CODE < LinuxVersionCode(2,1,75)
2339 extern char x86;
2340 switch(x86) {
2341 #else
2342 switch(boot_cpu_data.x86) {
2343 #endif
2344 case 4: suggested_cache_line_size = 4; break;
2345 case 6:
2346 case 5: suggested_cache_line_size = 8; break;
2347 }
2348 }
2349 #endif /* __i386__ */
2350
2351 /*
2352 ** Check availability of IO space, memory space.
2353 ** Enable master capability if not yet.
2354 **
2355 ** We shouldn't have to care about the IO region when
2356 ** we are using MMIO. But calling check_region() from
2357 ** both the ncr53c8xx and the sym53c8xx drivers prevents
2358 ** from attaching devices from the both drivers.
2359 ** If you have a better idea, let me know.
2360 */
2361 /* #ifdef SCSI_NCR_IOMAPPED */
2362 #if 1
2363 if (!(command & PCI_COMMAND_IO)) {
2364 printk(NAME53C8XX ": I/O base address (0x%lx) disabled.\n",
2365 (long) io_port);
2366 io_port = 0;
2367 }
2368 #endif
2369 if (!(command & PCI_COMMAND_MEMORY)) {
2370 printk(NAME53C8XX ": PCI_COMMAND_MEMORY not set.\n");
2371 base = 0;
2372 base_2 = 0;
2373 }
2374 io_port &= PCI_BASE_ADDRESS_IO_MASK;
2375 base &= PCI_BASE_ADDRESS_MEM_MASK;
2376 base_2 &= PCI_BASE_ADDRESS_MEM_MASK;
2377
2378 /* #ifdef SCSI_NCR_IOMAPPED */
2379 #if 1
2380 if (io_port && check_region (io_port, 128)) {
2381 printk(NAME53C8XX ": IO region 0x%lx[0..127] is in use\n",
2382 (long) io_port);
2383 io_port = 0;
2384 }
2385 if (!io_port)
2386 return -1;
2387 #endif
2388 #ifndef SCSI_NCR_IOMAPPED
2389 if (!base) {
2390 printk(NAME53C8XX ": MMIO base address disabled.\n");
2391 return -1;
2392 }
2393 #endif
2394
2395 /* The ncr53c8xx driver never did set the PCI parity bit. */
2396 /* Since setting this bit is known to trigger spurious MDPE */
2397 /* errors on some 895 controllers when noise on power lines is */
2398 /* too high, I donnot want to change previous ncr53c8xx driver */
2399 /* behaviour on that point (the sym53c8xx driver set this bit). */
2400 #if 0
2401 /*
2402 ** Set MASTER capable and PARITY bit, if not yet.
2403 */
2404 if ((command & (PCI_COMMAND_MASTER | PCI_COMMAND_PARITY))
2405 != (PCI_COMMAND_MASTER | PCI_COMMAND_PARITY)) {
2406 printk(NAME53C8XX ": setting%s%s...(fix-up)\n",
2407 (command & PCI_COMMAND_MASTER) ? "" : " PCI_COMMAND_MASTER",
2408 (command & PCI_COMMAND_PARITY) ? "" : " PCI_COMMAND_PARITY");
2409 command |= (PCI_COMMAND_MASTER | PCI_COMMAND_PARITY);
2410 pci_write_config_word(pdev, PCI_COMMAND, command);
2411 }
2412 #else
2413 /*
2414 ** Set MASTER capable if not yet.
2415 */
2416 if ((command & PCI_COMMAND_MASTER) != PCI_COMMAND_MASTER) {
2417 printk(NAME53C8XX ": setting PCI_COMMAND_MASTER...(fix-up)\n");
2418 command |= PCI_COMMAND_MASTER;
2419 pci_write_config_word(pdev, PCI_COMMAND, command);
2420 }
2421 #endif
2422
2423 /*
2424 ** Fix some features according to driver setup.
2425 */
2426 if (!(driver_setup.special_features & 1))
2427 chip->features &= ~FE_SPECIAL_SET;
2428 else {
2429 if (driver_setup.special_features & 2)
2430 chip->features &= ~FE_WRIE;
2431 if (driver_setup.special_features & 4)
2432 chip->features &= ~FE_NOPM;
2433 }
2434
2435 /*
2436 ** Some features are required to be enabled in order to
2437 ** work around some chip problems. :) ;)
2438 ** (ITEM 12 of a DEL about the 896 I haven't yet).
2439 ** We must ensure the chip will use WRITE AND INVALIDATE.
2440 ** The revision number limit is for now arbitrary.
2441 */
2442 if (device_id == PCI_DEVICE_ID_NCR_53C896 && revision <= 0x10) {
2443 chip->features |= (FE_WRIE | FE_CLSE);
2444 pci_fix_up |= 3; /* Force appropriate PCI fix-up */
2445 }
2446
2447 #ifdef SCSI_NCR_PCI_FIX_UP_SUPPORT
2448 /*
2449 ** Try to fix up PCI config according to wished features.
2450 */
2451 if ((pci_fix_up & 1) && (chip->features & FE_CLSE) &&
2452 !cache_line_size && suggested_cache_line_size) {
2453 cache_line_size = suggested_cache_line_size;
2454 pci_write_config_byte(pdev,
2455 PCI_CACHE_LINE_SIZE, cache_line_size);
2456 printk(NAME53C8XX ": PCI_CACHE_LINE_SIZE set to %d (fix-up).\n",
2457 cache_line_size);
2458 }
2459
2460 if ((pci_fix_up & 2) && cache_line_size &&
2461 (chip->features & FE_WRIE) && !(command & PCI_COMMAND_INVALIDATE)) {
2462 printk(NAME53C8XX": setting PCI_COMMAND_INVALIDATE (fix-up)\n");
2463 command |= PCI_COMMAND_INVALIDATE;
2464 pci_write_config_word(pdev, PCI_COMMAND, command);
2465 }
2466
2467 /*
2468 ** Tune PCI LATENCY TIMER according to burst max length transfer.
2469 ** (latency timer >= burst length + 6, we add 10 to be quite sure)
2470 */
2471
2472 if (chip->burst_max && (latency_timer == 0 || (pci_fix_up & 4))) {
2473 u_char lt = (1 << chip->burst_max) + 6 + 10;
2474 if (latency_timer < lt) {
2475 printk(NAME53C8XX
2476 ": changing PCI_LATENCY_TIMER from %d to %d.\n",
2477 (int) latency_timer, (int) lt);
2478 latency_timer = lt;
2479 pci_write_config_byte(pdev,
2480 PCI_LATENCY_TIMER, latency_timer);
2481 }
2482 }
2483
2484 #endif /* SCSI_NCR_PCI_FIX_UP_SUPPORT */
2485
2486 /*
2487 ** Initialise ncr_device structure with items required by ncr_attach.
2488 */
2489 device->pdev = pdev;
2490 device->slot.bus = PciBusNumber(pdev);
2491 device->slot.device_fn = PciDeviceFn(pdev);
2492 device->slot.base = base;
2493 device->slot.base_2 = base_2;
2494 device->slot.base_c = base_c;
2495 device->slot.base_2_c = base_2_c;
2496 device->slot.io_port = io_port;
2497 device->slot.irq = irq;
2498 device->attach_done = 0;
2499
2500 return 0;
2501 }
2502
2503 /*===================================================================
2504 **
2505 ** Detect all 53c8xx hosts and then attach them.
2506 **
2507 ** If we are using NVRAM, once all hosts are detected, we need to
2508 ** check any NVRAM for boot order in case detect and boot order
2509 ** differ and attach them using the order in the NVRAM.
2510 **
2511 ** If no NVRAM is found or data appears invalid attach boards in
2512 ** the order they are detected.
2513 **
2514 **===================================================================
2515 */
2516 static int __init
2517 sym53c8xx__detect(Scsi_Host_Template *tpnt, u_short ncr_chip_ids[], int chips)
2518 {
2519 pcidev_t pcidev;
2520 int i, j, hosts, count;
2521 int attach_count = 0;
2522 ncr_device *devtbl, *devp;
2523 #ifdef SCSI_NCR_NVRAM_SUPPORT
2524 ncr_nvram nvram0, nvram, *nvp;
2525 #endif
2526
2527 /*
2528 ** PCI is required.
2529 */
2530 if (!pci_present())
2531 return 0;
2532
2533 #ifdef SCSI_NCR_DEBUG_INFO_SUPPORT
2534 ncr_debug = driver_setup.debug;
2535 #endif
2536 if (initverbose >= 2)
2537 ncr_print_driver_setup();
2538
2539 /*
2540 ** Allocate the device table since we donnot want to
2541 ** overflow the kernel stack.
2542 ** 1 x 4K PAGE is enough for more than 40 devices for i386.
2543 */
2544 devtbl = m_calloc(PAGE_SIZE, "devtbl");
2545 if (!devtbl)
2546 return 0;
2547
2548 /*
2549 ** Detect all NCR PQS/PDS memory controllers.
2550 */
2551 #ifdef SCSI_NCR_PQS_PDS_SUPPORT
2552 ncr_detect_pqs_pds();
2553 #endif
2554
2555 /*
2556 ** Detect all 53c8xx hosts.
2557 ** Save the first Symbios NVRAM content if any
2558 ** for the boot order.
2559 */
2560 hosts = PAGE_SIZE / sizeof(*devtbl);
2561 #ifdef SCSI_NCR_NVRAM_SUPPORT
2562 nvp = (driver_setup.use_nvram & 0x1) ? &nvram0 : 0;
2563 #endif
2564 j = 0;
2565 count = 0;
2566 pcidev = PCIDEV_NULL;
2567 while (1) {
2568 char *msg = "";
2569 if (count >= hosts)
2570 break;
2571 if (j >= chips)
2572 break;
2573 i = driver_setup.reverse_probe ? chips - 1 - j : j;
2574 pcidev = pci_find_device(PCI_VENDOR_ID_NCR, ncr_chip_ids[i],
2575 pcidev);
2576 if (pcidev == PCIDEV_NULL) {
2577 ++j;
2578 continue;
2579 }
2580 if (pci_enable_device(pcidev)) /* @!*!$&*!%-*#;! */
2581 continue;
2582 /* Some HW as the HP LH4 may report twice PCI devices */
2583 for (i = 0; i < count ; i++) {
2584 if (devtbl[i].slot.bus == PciBusNumber(pcidev) &&
2585 devtbl[i].slot.device_fn == PciDeviceFn(pcidev))
2586 break;
2587 }
2588 if (i != count) /* Ignore this device if we already have it */
2589 continue;
2590 devp = &devtbl[count];
2591 devp->host_id = driver_setup.host_id;
2592 devp->attach_done = 0;
2593 if (sym53c8xx_pci_init(tpnt, pcidev, devp)) {
2594 continue;
2595 }
2596 ++count;
2597 #ifdef SCSI_NCR_NVRAM_SUPPORT
2598 if (nvp) {
2599 ncr_get_nvram(devp, nvp);
2600 switch(nvp->type) {
2601 case SCSI_NCR_SYMBIOS_NVRAM:
2602 /*
2603 * Switch to the other nvram buffer, so that
2604 * nvram0 will contain the first Symbios
2605 * format NVRAM content with boot order.
2606 */
2607 nvp = &nvram;
2608 msg = "with Symbios NVRAM";
2609 break;
2610 case SCSI_NCR_TEKRAM_NVRAM:
2611 msg = "with Tekram NVRAM";
2612 break;
2613 }
2614 }
2615 #endif
2616 #ifdef SCSI_NCR_PQS_PDS_SUPPORT
2617 if (devp->pqs_pds)
2618 msg = "(NCR PQS/PDS)";
2619 #endif
2620 printk(KERN_INFO NAME53C8XX ": 53c%s detected %s\n",
2621 devp->chip.name, msg);
2622 }
2623
2624 /*
2625 ** If we have found a SYMBIOS NVRAM, use first the NVRAM boot
2626 ** sequence as device boot order.
2627 ** check devices in the boot record against devices detected.
2628 ** attach devices if we find a match. boot table records that
2629 ** do not match any detected devices will be ignored.
2630 ** devices that do not match any boot table will not be attached
2631 ** here but will attempt to be attached during the device table
2632 ** rescan.
2633 */
2634 #ifdef SCSI_NCR_NVRAM_SUPPORT
2635 if (!nvp || nvram0.type != SCSI_NCR_SYMBIOS_NVRAM)
2636 goto next;
2637 for (i = 0; i < 4; i++) {
2638 Symbios_host *h = &nvram0.data.Symbios.host[i];
2639 for (j = 0 ; j < count ; j++) {
2640 devp = &devtbl[j];
2641 if (h->device_fn != devp->slot.device_fn ||
2642 h->bus_nr != devp->slot.bus ||
2643 h->device_id != devp->chip.device_id)
2644 continue;
2645 if (devp->attach_done)
2646 continue;
2647 if (h->flags & SYMBIOS_INIT_SCAN_AT_BOOT) {
2648 ncr_get_nvram(devp, nvp);
2649 if (!ncr_attach (tpnt, attach_count, devp))
2650 attach_count++;
2651 }
2652 #if 0 /* Restore previous behaviour of ncr53c8xx driver */
2653 else if (!(driver_setup.use_nvram & 0x80))
2654 printk(KERN_INFO NAME53C8XX
2655 ": 53c%s state OFF thus not attached\n",
2656 devp->chip.name);
2657 #endif
2658 else
2659 continue;
2660
2661 devp->attach_done = 1;
2662 break;
2663 }
2664 }
2665 next:
2666 #endif
2667
2668 /*
2669 ** Rescan device list to make sure all boards attached.
2670 ** Devices without boot records will not be attached yet
2671 ** so try to attach them here.
2672 */
2673 for (i= 0; i < count; i++) {
2674 devp = &devtbl[i];
2675 if (!devp->attach_done) {
2676 #ifdef SCSI_NCR_NVRAM_SUPPORT
2677 ncr_get_nvram(devp, nvp);
2678 #endif
2679 if (!ncr_attach (tpnt, attach_count, devp))
2680 attach_count++;
2681 }
2682 }
2683
2684 m_free(devtbl, PAGE_SIZE, "devtbl");
2685
2686 return attach_count;
2687 }
2688