1 /* -*- linux-c -*- */
2 #ifndef __PCIREGS_H
3 #define __PCIREGS_H
4 
5 #include <linux/pci.h>
6 
7 /*******************************************************************************
8  * Copyright (c) 1997 - 1999 PLX Technology, Inc.
9  *
10  * PLX Technology Inc. licenses this software under specific terms and
11  * conditions.  Use of any of the software or derviatives thereof in any
12  * product without a PLX Technology chip is strictly prohibited.
13  *
14  * PLX Technology, Inc. provides this software AS IS, WITHOUT ANY WARRANTY,
15  * EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF
16  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.  PLX makes no guarantee
17  * or representations regarding the use of, or the results of the use of,
18  * the software and documentation in terms of correctness, accuracy,
19  * reliability, currentness, or otherwise; and you rely on the software,
20  * documentation and results solely at your own risk.
21  *
22  * IN NO EVENT SHALL PLX BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS,
23  * LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES
24  * OF ANY KIND.  IN NO EVENT SHALL PLX'S TOTAL LIABILITY EXCEED THE SUM
25  * PAID TO PLX FOR THE PRODUCT LICENSED HEREUNDER.
26  *
27  ******************************************************************************/
28 
29 /* Modifications and extensions
30  * Copyright (C) 2001 By Joachim Martillo, Telford Tools, Inc.
31  *
32  * This program is free software; you can redistribute it and/or
33  * modify it under the terms of the GNU General Public License
34  * as published by the Free Software Foundation; either version
35  * 2 of the License, or (at your option) any later version.
36  **/
37 
38 /******************************************************************************
39  *
40  * File Name:   PciRegs.h
41  *
42  * Module Name: IOP API and PCI API
43  *
44  * Description: This file defines the generic PCI Configuration Registers
45  *
46  * Revision:
47  *     09-03-99 : PCI SDK v3.00 Release
48  *
49  ******************************************************************************/
50 
51 #define CFG_VENDOR_ID           PCI_VENDOR_ID
52 #define CFG_COMMAND             PCI_COMMAND
53 #define CFG_REV_ID              PCI_REVISION_ID
54 #define CFG_CACHE_SIZE          PCI_CACHE_LINE_SIZE
55 #define CFG_BAR0                PCI_BASE_ADDRESS_0
56 #define CFG_BAR1                PCI_BASE_ADDRESS_1
57 #define CFG_BAR2                PCI_BASE_ADDRESS_2
58 #define CFG_BAR3                PCI_BASE_ADDRESS_3
59 #define CFG_BAR4                PCI_BASE_ADDRESS_4
60 #define CFG_BAR5                PCI_BASE_ADDRESS_5
61 #define CFG_CIS_PTR             PCI_CARDBUS_CIS
62 #define CFG_SUB_VENDOR_ID       PCI_SUBSYSTEM_VENDOR_ID
63 #define CFG_EXP_ROM_BASE        PCI_ROM_ADDRESS
64 #define CFG_RESERVED1           PCI_CAPABILITY_LIST
65 #define CFG_RESERVED2           (PCI_CAPABILITY_LIST + 4)
66 #define CFG_INT_LINE            PCI_INTERRUPT_LINE
67 
68 #endif  /* __PCIREGS_H */
69