1 /* tulip_core.c: A DEC 21x4x-family ethernet driver for Linux. */
2 
3 /*
4 	Maintained by Jeff Garzik <jgarzik@pobox.com>
5 	Copyright 2000-2002  The Linux Kernel Team
6 	Written/copyright 1994-2001 by Donald Becker.
7 
8 	This software may be used and distributed according to the terms
9 	of the GNU General Public License, incorporated herein by reference.
10 
11 	Please refer to Documentation/DocBook/tulip.{pdf,ps,html}
12 	for more information on this driver, or visit the project
13 	Web page at http://sourceforge.net/projects/tulip/
14 
15 */
16 
17 #define DRV_NAME	"tulip"
18 #define DRV_VERSION	"0.9.15-pre12"
19 #define DRV_RELDATE	"Aug 9, 2002"
20 
21 #include <linux/config.h>
22 #include <linux/module.h>
23 #include <linux/pci.h>
24 #include "tulip.h"
25 #include <linux/init.h>
26 #include <linux/etherdevice.h>
27 #include <linux/delay.h>
28 #include <linux/mii.h>
29 #include <linux/ethtool.h>
30 #include <linux/crc32.h>
31 #include <asm/unaligned.h>
32 #include <asm/uaccess.h>
33 
34 #ifdef __sparc__
35 #include <asm/pbm.h>
36 #endif
37 
38 static char version[] __devinitdata =
39 	"Linux Tulip driver version " DRV_VERSION " (" DRV_RELDATE ")\n";
40 
41 
42 /* A few user-configurable values. */
43 
44 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
45 static unsigned int max_interrupt_work = 25;
46 
47 #define MAX_UNITS 8
48 /* Used to pass the full-duplex flag, etc. */
49 static int full_duplex[MAX_UNITS];
50 static int options[MAX_UNITS];
51 static int mtu[MAX_UNITS];			/* Jumbo MTU for interfaces. */
52 
53 /*  The possible media types that can be set in options[] are: */
54 const char * const medianame[32] = {
55 	"10baseT", "10base2", "AUI", "100baseTx",
56 	"10baseT-FDX", "100baseTx-FDX", "100baseT4", "100baseFx",
57 	"100baseFx-FDX", "MII 10baseT", "MII 10baseT-FDX", "MII",
58 	"10baseT(forced)", "MII 100baseTx", "MII 100baseTx-FDX", "MII 100baseT4",
59 	"MII 100baseFx-HDX", "MII 100baseFx-FDX", "Home-PNA 1Mbps", "Invalid-19",
60 	"","","","", "","","","",  "","","","Transceiver reset",
61 };
62 
63 /* Set the copy breakpoint for the copy-only-tiny-buffer Rx structure. */
64 #if defined(__alpha__) || defined(__arm__) || defined(__hppa__) \
65 	|| defined(__sparc_) || defined(__ia64__) \
66 	|| defined(__sh__) || defined(__mips__) || defined(__SH5__)
67 static int rx_copybreak = 1518;
68 #else
69 static int rx_copybreak = 100;
70 #endif
71 
72 /*
73   Set the bus performance register.
74 	Typical: Set 16 longword cache alignment, no burst limit.
75 	Cache alignment bits 15:14	     Burst length 13:8
76 		0000	No alignment  0x00000000 unlimited		0800 8 longwords
77 		4000	8  longwords		0100 1 longword		1000 16 longwords
78 		8000	16 longwords		0200 2 longwords	2000 32 longwords
79 		C000	32  longwords		0400 4 longwords
80 	Warning: many older 486 systems are broken and require setting 0x00A04800
81 	   8 longword cache alignment, 8 longword burst.
82 	ToDo: Non-Intel setting could be better.
83 */
84 
85 #if defined(__alpha__) || defined(__ia64__) || defined(__x86_64__)
86 static int csr0 = 0x01A00000 | 0xE000;
87 #elif defined(__i386__) || defined(__powerpc__)
88 static int csr0 = 0x01A00000 | 0x8000;
89 #elif defined(__sparc__) || defined(__hppa__)
90 /* The UltraSparc PCI controllers will disconnect at every 64-byte
91  * crossing anyways so it makes no sense to tell Tulip to burst
92  * any more than that.
93  */
94 static int csr0 = 0x01A00000 | 0x9000;
95 #elif defined(__arm__) || defined(__sh__)
96 static int csr0 = 0x01A00000 | 0x4800;
97 #elif defined(__mips__)
98 static int csr0 = 0x00200000 | 0x4000;
99 #else
100 #warning Processor architecture undefined!
101 static int csr0 = 0x00A00000 | 0x4800;
102 #endif
103 
104 /* Operational parameters that usually are not changed. */
105 /* Time in jiffies before concluding the transmitter is hung. */
106 #define TX_TIMEOUT  (4*HZ)
107 
108 
109 MODULE_AUTHOR("The Linux Kernel Team");
110 MODULE_DESCRIPTION("Digital 21*4* Tulip ethernet driver");
111 MODULE_LICENSE("GPL");
112 MODULE_PARM(tulip_debug, "i");
113 MODULE_PARM(max_interrupt_work, "i");
114 MODULE_PARM(rx_copybreak, "i");
115 MODULE_PARM(csr0, "i");
116 MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");
117 MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
118 
119 #define PFX DRV_NAME ": "
120 
121 #ifdef TULIP_DEBUG
122 int tulip_debug = TULIP_DEBUG;
123 #else
124 int tulip_debug = 1;
125 #endif
126 
127 
128 
129 /*
130  * This table use during operation for capabilities and media timer.
131  *
132  * It is indexed via the values in 'enum chips'
133  */
134 
135 struct tulip_chip_table tulip_tbl[] = {
136   /* DC21040 */
137   { "Digital DC21040 Tulip", 128, 0x0001ebef, 0, tulip_timer },
138 
139   /* DC21041 */
140   { "Digital DC21041 Tulip", 128, 0x0001ebef,
141 	HAS_MEDIA_TABLE | HAS_NWAY, tulip_timer },
142 
143   /* DC21140 */
144   { "Digital DS21140 Tulip", 128, 0x0001ebef,
145 	HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_PCI_MWI, tulip_timer },
146 
147   /* DC21142, DC21143 */
148   { "Digital DS21143 Tulip", 128, 0x0801fbff,
149 	HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI | HAS_NWAY
150 	| HAS_INTR_MITIGATION | HAS_PCI_MWI, t21142_timer },
151 
152   /* LC82C168 */
153   { "Lite-On 82c168 PNIC", 256, 0x0001fbef,
154 	HAS_MII | HAS_PNICNWAY, pnic_timer },
155 
156   /* MX98713 */
157   { "Macronix 98713 PMAC", 128, 0x0001ebef,
158 	HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, mxic_timer },
159 
160   /* MX98715 */
161   { "Macronix 98715 PMAC", 256, 0x0001ebef,
162 	HAS_MEDIA_TABLE, mxic_timer },
163 
164   /* MX98725 */
165   { "Macronix 98725 PMAC", 256, 0x0001ebef,
166 	HAS_MEDIA_TABLE, mxic_timer },
167 
168   /* AX88140 */
169   { "ASIX AX88140", 128, 0x0001fbff,
170 	HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | MC_HASH_ONLY
171 	| IS_ASIX, tulip_timer },
172 
173   /* PNIC2 */
174   { "Lite-On PNIC-II", 256, 0x0801fbff,
175 	HAS_MII | HAS_NWAY | HAS_8023X | HAS_PCI_MWI, pnic2_timer },
176 
177   /* COMET */
178   { "ADMtek Comet", 256, 0x0001abef,
179 	HAS_MII | MC_HASH_ONLY | COMET_MAC_ADDR, comet_timer },
180 
181   /* COMPEX9881 */
182   { "Compex 9881 PMAC", 128, 0x0001ebef,
183 	HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, mxic_timer },
184 
185   /* I21145 */
186   { "Intel DS21145 Tulip", 128, 0x0801fbff,
187 	HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI
188 	| HAS_NWAY | HAS_PCI_MWI, t21142_timer },
189 
190   /* DM910X */
191   { "Davicom DM9102/DM9102A", 128, 0x0001ebef,
192 	HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_ACPI,
193 	tulip_timer },
194 
195   /* CONEXANT */
196   {	"Conexant LANfinity", 256, 0x0001ebef,
197 	HAS_MII, tulip_timer },
198 };
199 
200 
201 static struct pci_device_id tulip_pci_tbl[] __devinitdata = {
202 	{ 0x1011, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21040 },
203 	{ 0x1011, 0x0014, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21041 },
204 	{ 0x1011, 0x0009, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21140 },
205 	{ 0x1011, 0x0019, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21143 },
206 	{ 0x11AD, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, LC82C168 },
207 	{ 0x10d9, 0x0512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98713 },
208 	{ 0x10d9, 0x0531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
209 /*	{ 0x10d9, 0x0531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98725 },*/
210 	{ 0x125B, 0x1400, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AX88140 },
211 	{ 0x11AD, 0xc115, PCI_ANY_ID, PCI_ANY_ID, 0, 0, PNIC2 },
212 	{ 0x1317, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
213 	{ 0x1317, 0x0985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
214 	{ 0x1317, 0x1985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
215 	{ 0x1317, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
216 	{ 0x13D1, 0xAB02, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
217 	{ 0x13D1, 0xAB03, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
218 	{ 0x13D1, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
219 	{ 0x104A, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
220 	{ 0x104A, 0x2774, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
221 	{ 0x1259, 0xa120, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
222 	{ 0x11F6, 0x9881, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMPEX9881 },
223 	{ 0x8086, 0x0039, PCI_ANY_ID, PCI_ANY_ID, 0, 0, I21145 },
224 	{ 0x1282, 0x9100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
225 	{ 0x1282, 0x9102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
226 	{ 0x1113, 0x1216, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
227 	{ 0x1113, 0x1217, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
228 	{ 0x1113, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
229 	{ 0x1186, 0x1541, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
230 	{ 0x1186, 0x1561, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
231 	{ 0x1626, 0x8410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
232 	{ 0x1737, 0xAB09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
233 	{ 0x1737, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
234 	{ 0x17B3, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
235 	{ 0x14f1, 0x1803, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CONEXANT },
236 	{ 0x10b9, 0x5261, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },	/* ALi 1563 integrated ethernet */
237 	{ 0x10b7, 0x9300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },	/* 3Com 3CSOHO100B-TX */
238 	{ } /* terminate list */
239 };
240 MODULE_DEVICE_TABLE(pci, tulip_pci_tbl);
241 
242 
243 /* A full-duplex map for media types. */
244 const char tulip_media_cap[32] =
245 {0,0,0,16,  3,19,16,24,  27,4,7,5, 0,20,23,20,  28,31,0,0, };
246 u8 t21040_csr13[] = {2,0x0C,8,4,  4,0,0,0, 0,0,0,0, 4,0,0,0};
247 
248 /* 21041 transceiver register settings: 10-T, 10-2, AUI, 10-T, 10T-FD*/
249 u16 t21041_csr13[] = {
250 	csr13_mask_10bt,		/* 10-T */
251 	csr13_mask_auibnc,		/* 10-2 */
252 	csr13_mask_auibnc,		/* AUI */
253 	csr13_mask_10bt,		/* 10-T */
254 	csr13_mask_10bt,		/* 10T-FD */
255 };
256 u16 t21041_csr14[] = { 0xFFFF, 0xF7FD, 0xF7FD, 0x7F3F, 0x7F3D, };
257 u16 t21041_csr15[] = { 0x0008, 0x0006, 0x000E, 0x0008, 0x0008, };
258 
259 
260 static void tulip_tx_timeout(struct net_device *dev);
261 static void tulip_init_ring(struct net_device *dev);
262 static int tulip_start_xmit(struct sk_buff *skb, struct net_device *dev);
263 static int tulip_open(struct net_device *dev);
264 static int tulip_close(struct net_device *dev);
265 static void tulip_up(struct net_device *dev);
266 static void tulip_down(struct net_device *dev);
267 static struct net_device_stats *tulip_get_stats(struct net_device *dev);
268 static int private_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
269 static void set_rx_mode(struct net_device *dev);
270 
271 
272 
tulip_set_power_state(struct tulip_private * tp,int sleep,int snooze)273 static void tulip_set_power_state (struct tulip_private *tp,
274 				   int sleep, int snooze)
275 {
276 	if (tp->flags & HAS_ACPI) {
277 		u32 tmp, newtmp;
278 		pci_read_config_dword (tp->pdev, CFDD, &tmp);
279 		newtmp = tmp & ~(CFDD_Sleep | CFDD_Snooze);
280 		if (sleep)
281 			newtmp |= CFDD_Sleep;
282 		else if (snooze)
283 			newtmp |= CFDD_Snooze;
284 		if (tmp != newtmp)
285 			pci_write_config_dword (tp->pdev, CFDD, newtmp);
286 	}
287 
288 }
289 
290 
tulip_up(struct net_device * dev)291 static void tulip_up(struct net_device *dev)
292 {
293 	struct tulip_private *tp = (struct tulip_private *)dev->priv;
294 	long ioaddr = dev->base_addr;
295 	int next_tick = 3*HZ;
296 	int i;
297 
298 	/* Wake the chip from sleep/snooze mode. */
299 	tulip_set_power_state (tp, 0, 0);
300 
301 	/* On some chip revs we must set the MII/SYM port before the reset!? */
302 	if (tp->mii_cnt  ||  (tp->mtable  &&  tp->mtable->has_mii))
303 		outl(0x00040000, ioaddr + CSR6);
304 
305 	/* Reset the chip, holding bit 0 set at least 50 PCI cycles. */
306 	outl(0x00000001, ioaddr + CSR0);
307 	udelay(100);
308 
309 	/* Deassert reset.
310 	   Wait the specified 50 PCI cycles after a reset by initializing
311 	   Tx and Rx queues and the address filter list. */
312 	outl(tp->csr0, ioaddr + CSR0);
313 	udelay(100);
314 
315 	if (tulip_debug > 1)
316 		printk(KERN_DEBUG "%s: tulip_up(), irq==%d.\n", dev->name, dev->irq);
317 
318 	outl(tp->rx_ring_dma, ioaddr + CSR3);
319 	outl(tp->tx_ring_dma, ioaddr + CSR4);
320 	tp->cur_rx = tp->cur_tx = 0;
321 	tp->dirty_rx = tp->dirty_tx = 0;
322 
323 	if (tp->flags & MC_HASH_ONLY) {
324 		u32 addr_low = le32_to_cpu(get_unaligned((u32 *)dev->dev_addr));
325 		u32 addr_high = le16_to_cpu(get_unaligned((u16 *)(dev->dev_addr+4)));
326 		if (tp->chip_id == AX88140) {
327 			outl(0, ioaddr + CSR13);
328 			outl(addr_low,  ioaddr + CSR14);
329 			outl(1, ioaddr + CSR13);
330 			outl(addr_high, ioaddr + CSR14);
331 		} else if (tp->flags & COMET_MAC_ADDR) {
332 			outl(addr_low,  ioaddr + 0xA4);
333 			outl(addr_high, ioaddr + 0xA8);
334 			outl(0, ioaddr + 0xAC);
335 			outl(0, ioaddr + 0xB0);
336 		}
337 	} else {
338 		/* This is set_rx_mode(), but without starting the transmitter. */
339 		u16 *eaddrs = (u16 *)dev->dev_addr;
340 		u16 *setup_frm = &tp->setup_frame[15*6];
341 		dma_addr_t mapping;
342 
343 		/* 21140 bug: you must add the broadcast address. */
344 		memset(tp->setup_frame, 0xff, sizeof(tp->setup_frame));
345 		/* Fill the final entry of the table with our physical address. */
346 		*setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
347 		*setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
348 		*setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
349 
350 		mapping = pci_map_single(tp->pdev, tp->setup_frame,
351 					 sizeof(tp->setup_frame),
352 					 PCI_DMA_TODEVICE);
353 		tp->tx_buffers[tp->cur_tx].skb = NULL;
354 		tp->tx_buffers[tp->cur_tx].mapping = mapping;
355 
356 		/* Put the setup frame on the Tx list. */
357 		tp->tx_ring[tp->cur_tx].length = cpu_to_le32(0x08000000 | 192);
358 		tp->tx_ring[tp->cur_tx].buffer1 = cpu_to_le32(mapping);
359 		tp->tx_ring[tp->cur_tx].status = cpu_to_le32(DescOwned);
360 
361 		tp->cur_tx++;
362 	}
363 
364 	tp->saved_if_port = dev->if_port;
365 	if (dev->if_port == 0)
366 		dev->if_port = tp->default_port;
367 
368 	/* Allow selecting a default media. */
369 	i = 0;
370 	if (tp->mtable == NULL)
371 		goto media_picked;
372 	if (dev->if_port) {
373 		int looking_for = tulip_media_cap[dev->if_port] & MediaIsMII ? 11 :
374 			(dev->if_port == 12 ? 0 : dev->if_port);
375 		for (i = 0; i < tp->mtable->leafcount; i++)
376 			if (tp->mtable->mleaf[i].media == looking_for) {
377 				printk(KERN_INFO "%s: Using user-specified media %s.\n",
378 					   dev->name, medianame[dev->if_port]);
379 				goto media_picked;
380 			}
381 	}
382 	if ((tp->mtable->defaultmedia & 0x0800) == 0) {
383 		int looking_for = tp->mtable->defaultmedia & MEDIA_MASK;
384 		for (i = 0; i < tp->mtable->leafcount; i++)
385 			if (tp->mtable->mleaf[i].media == looking_for) {
386 				printk(KERN_INFO "%s: Using EEPROM-set media %s.\n",
387 					   dev->name, medianame[looking_for]);
388 				goto media_picked;
389 			}
390 	}
391 	/* Start sensing first non-full-duplex media. */
392 	for (i = tp->mtable->leafcount - 1;
393 		 (tulip_media_cap[tp->mtable->mleaf[i].media] & MediaAlwaysFD) && i > 0; i--)
394 		;
395 media_picked:
396 
397 	tp->csr6 = 0;
398 	tp->cur_index = i;
399 	tp->nwayset = 0;
400 
401 	if (dev->if_port) {
402 		if (tp->chip_id == DC21143  &&
403 		    (tulip_media_cap[dev->if_port] & MediaIsMII)) {
404 			/* We must reset the media CSRs when we force-select MII mode. */
405 			outl(0x0000, ioaddr + CSR13);
406 			outl(0x0000, ioaddr + CSR14);
407 			outl(0x0008, ioaddr + CSR15);
408 		}
409 		tulip_select_media(dev, 1);
410 	} else if (tp->chip_id == DC21041) {
411 		dev->if_port = 0;
412 		tp->nway = tp->mediasense = 1;
413 		tp->nwayset = tp->lpar = 0;
414 		outl(0x00000000, ioaddr + CSR13);
415 		outl(0xFFFFFFFF, ioaddr + CSR14);
416 		outl(0x00000008, ioaddr + CSR15); /* Listen on AUI also. */
417 		tp->csr6 = 0x80020000;
418 		if (tp->sym_advertise & 0x0040)
419 			tp->csr6 |= FullDuplex;
420 		outl(tp->csr6, ioaddr + CSR6);
421 		outl(0x0000EF01, ioaddr + CSR13);
422 
423 	} else if (tp->chip_id == DC21142) {
424 		if (tp->mii_cnt) {
425 			tulip_select_media(dev, 1);
426 			if (tulip_debug > 1)
427 				printk(KERN_INFO "%s: Using MII transceiver %d, status "
428 					   "%4.4x.\n",
429 					   dev->name, tp->phys[0], tulip_mdio_read(dev, tp->phys[0], 1));
430 			outl(csr6_mask_defstate, ioaddr + CSR6);
431 			tp->csr6 = csr6_mask_hdcap;
432 			dev->if_port = 11;
433 			outl(0x0000, ioaddr + CSR13);
434 			outl(0x0000, ioaddr + CSR14);
435 		} else
436 			t21142_start_nway(dev);
437 	} else if (tp->chip_id == PNIC2) {
438 	        /* for initial startup advertise 10/100 Full and Half */
439 	        tp->sym_advertise = 0x01E0;
440                 /* enable autonegotiate end interrupt */
441 	        outl(inl(ioaddr+CSR5)| 0x00008010, ioaddr + CSR5);
442 	        outl(inl(ioaddr+CSR7)| 0x00008010, ioaddr + CSR7);
443 		pnic2_start_nway(dev);
444 	} else if (tp->chip_id == LC82C168  &&  ! tp->medialock) {
445 		if (tp->mii_cnt) {
446 			dev->if_port = 11;
447 			tp->csr6 = 0x814C0000 | (tp->full_duplex ? 0x0200 : 0);
448 			outl(0x0001, ioaddr + CSR15);
449 		} else if (inl(ioaddr + CSR5) & TPLnkPass)
450 			pnic_do_nway(dev);
451 		else {
452 			/* Start with 10mbps to do autonegotiation. */
453 			outl(0x32, ioaddr + CSR12);
454 			tp->csr6 = 0x00420000;
455 			outl(0x0001B078, ioaddr + 0xB8);
456 			outl(0x0201B078, ioaddr + 0xB8);
457 			next_tick = 1*HZ;
458 		}
459 	} else if ((tp->chip_id == MX98713 || tp->chip_id == COMPEX9881)
460 			   && ! tp->medialock) {
461 		dev->if_port = 0;
462 		tp->csr6 = 0x01880000 | (tp->full_duplex ? 0x0200 : 0);
463 		outl(0x0f370000 | inw(ioaddr + 0x80), ioaddr + 0x80);
464 	} else if (tp->chip_id == MX98715 || tp->chip_id == MX98725) {
465 		/* Provided by BOLO, Macronix - 12/10/1998. */
466 		dev->if_port = 0;
467 		tp->csr6 = 0x01a80200;
468 		outl(0x0f370000 | inw(ioaddr + 0x80), ioaddr + 0x80);
469 		outl(0x11000 | inw(ioaddr + 0xa0), ioaddr + 0xa0);
470 	} else if (tp->chip_id == COMET || tp->chip_id == CONEXANT) {
471 		/* Enable automatic Tx underrun recovery. */
472 		outl(inl(ioaddr + 0x88) | 1, ioaddr + 0x88);
473 		dev->if_port = tp->mii_cnt ? 11 : 0;
474 		tp->csr6 = 0x00040000;
475 	} else if (tp->chip_id == AX88140) {
476 		tp->csr6 = tp->mii_cnt ? 0x00040100 : 0x00000100;
477 	} else
478 		tulip_select_media(dev, 1);
479 
480 	/* Start the chip's Tx to process setup frame. */
481 	tulip_stop_rxtx(tp);
482 	barrier();
483 	udelay(5);
484 	outl(tp->csr6 | TxOn, ioaddr + CSR6);
485 
486 	/* Enable interrupts by setting the interrupt mask. */
487 	outl(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR5);
488 	outl(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR7);
489 	tulip_start_rxtx(tp);
490 	outl(0, ioaddr + CSR2);		/* Rx poll demand */
491 
492 	if (tulip_debug > 2) {
493 		printk(KERN_DEBUG "%s: Done tulip_up(), CSR0 %8.8x, CSR5 %8.8x CSR6 %8.8x.\n",
494 			   dev->name, inl(ioaddr + CSR0), inl(ioaddr + CSR5),
495 			   inl(ioaddr + CSR6));
496 	}
497 
498 	/* Set the timer to switch to check for link beat and perhaps switch
499 	   to an alternate media type. */
500 	tp->timer.expires = RUN_AT(next_tick);
501 	add_timer(&tp->timer);
502 }
503 
504 #ifdef CONFIG_NET_HW_FLOWCONTROL
505 /* Enable receiver */
tulip_xon(struct net_device * dev)506 void tulip_xon(struct net_device *dev)
507 {
508         struct tulip_private *tp = (struct tulip_private *)dev->priv;
509 
510         clear_bit(tp->fc_bit, &netdev_fc_xoff);
511         if (netif_running(dev)){
512 
513                 tulip_refill_rx(dev);
514                 outl(tulip_tbl[tp->chip_id].valid_intrs,  dev->base_addr+CSR7);
515         }
516 }
517 #endif
518 
519 static int
tulip_open(struct net_device * dev)520 tulip_open(struct net_device *dev)
521 {
522 #ifdef CONFIG_NET_HW_FLOWCONTROL
523         struct tulip_private *tp = (struct tulip_private *)dev->priv;
524 #endif
525 	int retval;
526 	MOD_INC_USE_COUNT;
527 
528 	if ((retval = request_irq(dev->irq, &tulip_interrupt, SA_SHIRQ, dev->name, dev))) {
529 		MOD_DEC_USE_COUNT;
530 		return retval;
531 	}
532 
533 	tulip_init_ring (dev);
534 
535 	tulip_up (dev);
536 
537 #ifdef CONFIG_NET_HW_FLOWCONTROL
538         tp->fc_bit = netdev_register_fc(dev, tulip_xon);
539 #endif
540 
541 	netif_start_queue (dev);
542 
543 	return 0;
544 }
545 
546 
tulip_tx_timeout(struct net_device * dev)547 static void tulip_tx_timeout(struct net_device *dev)
548 {
549 	struct tulip_private *tp = (struct tulip_private *)dev->priv;
550 	long ioaddr = dev->base_addr;
551 	unsigned long flags;
552 
553 	spin_lock_irqsave (&tp->lock, flags);
554 
555 	if (tulip_media_cap[dev->if_port] & MediaIsMII) {
556 		/* Do nothing -- the media monitor should handle this. */
557 		if (tulip_debug > 1)
558 			printk(KERN_WARNING "%s: Transmit timeout using MII device.\n",
559 				   dev->name);
560 	} else if (tp->chip_id == DC21040) {
561 		if ( !tp->medialock  &&  inl(ioaddr + CSR12) & 0x0002) {
562 			dev->if_port = (dev->if_port == 2 ? 0 : 2);
563 			printk(KERN_INFO "%s: 21040 transmit timed out, switching to "
564 				   "%s.\n",
565 				   dev->name, medianame[dev->if_port]);
566 			tulip_select_media(dev, 0);
567 		}
568 		goto out;
569 	} else if (tp->chip_id == DC21041) {
570 		int csr12 = inl(ioaddr + CSR12);
571 
572 		printk(KERN_WARNING "%s: 21041 transmit timed out, status %8.8x, "
573 			   "CSR12 %8.8x, CSR13 %8.8x, CSR14 %8.8x, resetting...\n",
574 			   dev->name, inl(ioaddr + CSR5), csr12,
575 			   inl(ioaddr + CSR13), inl(ioaddr + CSR14));
576 		tp->mediasense = 1;
577 		if ( ! tp->medialock) {
578 			if (dev->if_port == 1 || dev->if_port == 2)
579 				if (csr12 & 0x0004) {
580 					dev->if_port = 2 - dev->if_port;
581 				} else
582 					dev->if_port = 0;
583 			else if (dev->if_port != 0 || (csr12 & 0x0004) != 0)
584 				dev->if_port = 1;
585 			tulip_select_media(dev, 0);
586 		}
587 	} else if (tp->chip_id == DC21140 || tp->chip_id == DC21142
588 			   || tp->chip_id == MX98713 || tp->chip_id == COMPEX9881
589 			   || tp->chip_id == DM910X) {
590 		printk(KERN_WARNING "%s: 21140 transmit timed out, status %8.8x, "
591 			   "SIA %8.8x %8.8x %8.8x %8.8x, resetting...\n",
592 			   dev->name, inl(ioaddr + CSR5), inl(ioaddr + CSR12),
593 			   inl(ioaddr + CSR13), inl(ioaddr + CSR14), inl(ioaddr + CSR15));
594 		if ( ! tp->medialock  &&  tp->mtable) {
595 			do
596 				--tp->cur_index;
597 			while (tp->cur_index >= 0
598 				   && (tulip_media_cap[tp->mtable->mleaf[tp->cur_index].media]
599 					   & MediaIsFD));
600 			if (--tp->cur_index < 0) {
601 				/* We start again, but should instead look for default. */
602 				tp->cur_index = tp->mtable->leafcount - 1;
603 			}
604 			tulip_select_media(dev, 0);
605 			printk(KERN_WARNING "%s: transmit timed out, switching to %s "
606 				   "media.\n", dev->name, medianame[dev->if_port]);
607 		}
608 	} else if (tp->chip_id == PNIC2) {
609 		printk(KERN_WARNING "%s: PNIC2 transmit timed out, status %8.8x, "
610 		       "CSR6/7 %8.8x / %8.8x CSR12 %8.8x, resetting...\n",
611 		       dev->name, (int)inl(ioaddr + CSR5), (int)inl(ioaddr + CSR6),
612 		       (int)inl(ioaddr + CSR7), (int)inl(ioaddr + CSR12));
613 	} else {
614 		printk(KERN_WARNING "%s: Transmit timed out, status %8.8x, CSR12 "
615 			   "%8.8x, resetting...\n",
616 			   dev->name, inl(ioaddr + CSR5), inl(ioaddr + CSR12));
617 		dev->if_port = 0;
618 	}
619 
620 #if defined(way_too_many_messages)
621 	if (tulip_debug > 3) {
622 		int i;
623 		for (i = 0; i < RX_RING_SIZE; i++) {
624 			u8 *buf = (u8 *)(tp->rx_ring[i].buffer1);
625 			int j;
626 			printk(KERN_DEBUG "%2d: %8.8x %8.8x %8.8x %8.8x  "
627 				   "%2.2x %2.2x %2.2x.\n",
628 				   i, (unsigned int)tp->rx_ring[i].status,
629 				   (unsigned int)tp->rx_ring[i].length,
630 				   (unsigned int)tp->rx_ring[i].buffer1,
631 				   (unsigned int)tp->rx_ring[i].buffer2,
632 				   buf[0], buf[1], buf[2]);
633 			for (j = 0; buf[j] != 0xee && j < 1600; j++)
634 				if (j < 100) printk(" %2.2x", buf[j]);
635 			printk(" j=%d.\n", j);
636 		}
637 		printk(KERN_DEBUG "  Rx ring %8.8x: ", (int)tp->rx_ring);
638 		for (i = 0; i < RX_RING_SIZE; i++)
639 			printk(" %8.8x", (unsigned int)tp->rx_ring[i].status);
640 		printk("\n" KERN_DEBUG "  Tx ring %8.8x: ", (int)tp->tx_ring);
641 		for (i = 0; i < TX_RING_SIZE; i++)
642 			printk(" %8.8x", (unsigned int)tp->tx_ring[i].status);
643 		printk("\n");
644 	}
645 #endif
646 
647 	/* Stop and restart the chip's Tx processes . */
648 #ifdef CONFIG_NET_HW_FLOWCONTROL
649         if (tp->fc_bit && test_bit(tp->fc_bit,&netdev_fc_xoff))
650                 printk("BUG tx_timeout restarting rx when fc on\n");
651 #endif
652 	tulip_restart_rxtx(tp);
653 	/* Trigger an immediate transmit demand. */
654 	outl(0, ioaddr + CSR1);
655 
656 	tp->stats.tx_errors++;
657 
658 out:
659 	spin_unlock_irqrestore (&tp->lock, flags);
660 	dev->trans_start = jiffies;
661 	netif_wake_queue (dev);
662 }
663 
664 
665 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
tulip_init_ring(struct net_device * dev)666 static void tulip_init_ring(struct net_device *dev)
667 {
668 	struct tulip_private *tp = (struct tulip_private *)dev->priv;
669 	int i;
670 
671 	tp->susp_rx = 0;
672 	tp->ttimer = 0;
673 	tp->nir = 0;
674 
675 	for (i = 0; i < RX_RING_SIZE; i++) {
676 		tp->rx_ring[i].status = 0x00000000;
677 		tp->rx_ring[i].length = cpu_to_le32(PKT_BUF_SZ);
678 		tp->rx_ring[i].buffer2 = cpu_to_le32(tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * (i + 1));
679 		tp->rx_buffers[i].skb = NULL;
680 		tp->rx_buffers[i].mapping = 0;
681 	}
682 	/* Mark the last entry as wrapping the ring. */
683 	tp->rx_ring[i-1].length = cpu_to_le32(PKT_BUF_SZ | DESC_RING_WRAP);
684 	tp->rx_ring[i-1].buffer2 = cpu_to_le32(tp->rx_ring_dma);
685 
686 	for (i = 0; i < RX_RING_SIZE; i++) {
687 		dma_addr_t mapping;
688 
689 		/* Note the receive buffer must be longword aligned.
690 		   dev_alloc_skb() provides 16 byte alignment.  But do *not*
691 		   use skb_reserve() to align the IP header! */
692 		struct sk_buff *skb = dev_alloc_skb(PKT_BUF_SZ);
693 		tp->rx_buffers[i].skb = skb;
694 		if (skb == NULL)
695 			break;
696 		mapping = pci_map_single(tp->pdev, skb->tail,
697 					 PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
698 		tp->rx_buffers[i].mapping = mapping;
699 		skb->dev = dev;			/* Mark as being used by this device. */
700 		tp->rx_ring[i].status = cpu_to_le32(DescOwned);	/* Owned by Tulip chip */
701 		tp->rx_ring[i].buffer1 = cpu_to_le32(mapping);
702 	}
703 	tp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
704 
705 	/* The Tx buffer descriptor is filled in as needed, but we
706 	   do need to clear the ownership bit. */
707 	for (i = 0; i < TX_RING_SIZE; i++) {
708 		tp->tx_buffers[i].skb = NULL;
709 		tp->tx_buffers[i].mapping = 0;
710 		tp->tx_ring[i].status = 0x00000000;
711 		tp->tx_ring[i].buffer2 = cpu_to_le32(tp->tx_ring_dma + sizeof(struct tulip_tx_desc) * (i + 1));
712 	}
713 	tp->tx_ring[i-1].buffer2 = cpu_to_le32(tp->tx_ring_dma);
714 }
715 
716 static int
tulip_start_xmit(struct sk_buff * skb,struct net_device * dev)717 tulip_start_xmit(struct sk_buff *skb, struct net_device *dev)
718 {
719 	struct tulip_private *tp = (struct tulip_private *)dev->priv;
720 	int entry;
721 	u32 flag;
722 	dma_addr_t mapping;
723 	unsigned long eflags;
724 
725 	spin_lock_irqsave(&tp->lock, eflags);
726 
727 	/* Calculate the next Tx descriptor entry. */
728 	entry = tp->cur_tx % TX_RING_SIZE;
729 
730 	tp->tx_buffers[entry].skb = skb;
731 	mapping = pci_map_single(tp->pdev, skb->data,
732 				 skb->len, PCI_DMA_TODEVICE);
733 	tp->tx_buffers[entry].mapping = mapping;
734 	tp->tx_ring[entry].buffer1 = cpu_to_le32(mapping);
735 
736 	if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE/2) {/* Typical path */
737 		flag = 0x60000000; /* No interrupt */
738 	} else if (tp->cur_tx - tp->dirty_tx == TX_RING_SIZE/2) {
739 		flag = 0xe0000000; /* Tx-done intr. */
740 	} else if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE - 2) {
741 		flag = 0x60000000; /* No Tx-done intr. */
742 	} else {		/* Leave room for set_rx_mode() to fill entries. */
743 		flag = 0xe0000000; /* Tx-done intr. */
744 		netif_stop_queue(dev);
745 	}
746 	if (entry == TX_RING_SIZE-1)
747 		flag = 0xe0000000 | DESC_RING_WRAP;
748 
749 	tp->tx_ring[entry].length = cpu_to_le32(skb->len | flag);
750 	/* if we were using Transmit Automatic Polling, we would need a
751 	 * wmb() here. */
752 	tp->tx_ring[entry].status = cpu_to_le32(DescOwned);
753 	wmb();
754 
755 	tp->cur_tx++;
756 
757 	/* Trigger an immediate transmit demand. */
758 	outl(0, dev->base_addr + CSR1);
759 
760 	spin_unlock_irqrestore(&tp->lock, eflags);
761 
762 	dev->trans_start = jiffies;
763 
764 	return 0;
765 }
766 
tulip_clean_tx_ring(struct tulip_private * tp)767 static void tulip_clean_tx_ring(struct tulip_private *tp)
768 {
769 	unsigned int dirty_tx;
770 
771 	for (dirty_tx = tp->dirty_tx ; tp->cur_tx - dirty_tx > 0;
772 		dirty_tx++) {
773 		int entry = dirty_tx % TX_RING_SIZE;
774 		int status = le32_to_cpu(tp->tx_ring[entry].status);
775 
776 		if (status < 0) {
777 			tp->stats.tx_errors++;	/* It wasn't Txed */
778 			tp->tx_ring[entry].status = 0;
779 		}
780 
781 		/* Check for Tx filter setup frames. */
782 		if (tp->tx_buffers[entry].skb == NULL) {
783 			/* test because dummy frames not mapped */
784 			if (tp->tx_buffers[entry].mapping)
785 				pci_unmap_single(tp->pdev,
786 					tp->tx_buffers[entry].mapping,
787 					sizeof(tp->setup_frame),
788 					PCI_DMA_TODEVICE);
789 			continue;
790 		}
791 
792 		pci_unmap_single(tp->pdev, tp->tx_buffers[entry].mapping,
793 				tp->tx_buffers[entry].skb->len,
794 				PCI_DMA_TODEVICE);
795 
796 		/* Free the original skb. */
797 		dev_kfree_skb_irq(tp->tx_buffers[entry].skb);
798 		tp->tx_buffers[entry].skb = NULL;
799 		tp->tx_buffers[entry].mapping = 0;
800 	}
801 }
802 
tulip_down(struct net_device * dev)803 static void tulip_down (struct net_device *dev)
804 {
805 	long ioaddr = dev->base_addr;
806 	struct tulip_private *tp = (struct tulip_private *) dev->priv;
807 	unsigned long flags;
808 
809 	del_timer_sync (&tp->timer);
810 
811 	spin_lock_irqsave (&tp->lock, flags);
812 
813 	/* Disable interrupts by clearing the interrupt mask. */
814 	outl (0x00000000, ioaddr + CSR7);
815 
816 	/* Stop the Tx and Rx processes. */
817 	tulip_stop_rxtx(tp);
818 
819 	/* prepare receive buffers */
820 	tulip_refill_rx(dev);
821 
822 	/* release any unconsumed transmit buffers */
823 	tulip_clean_tx_ring(tp);
824 
825 	/* 21040 -- Leave the card in 10baseT state. */
826 	if (tp->chip_id == DC21040)
827 		outl (0x00000004, ioaddr + CSR13);
828 
829 	if (inl (ioaddr + CSR6) != 0xffffffff)
830 		tp->stats.rx_missed_errors += inl (ioaddr + CSR8) & 0xffff;
831 
832 	spin_unlock_irqrestore (&tp->lock, flags);
833 
834 	init_timer(&tp->timer);
835 	tp->timer.data = (unsigned long)dev;
836 	tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
837 
838 	dev->if_port = tp->saved_if_port;
839 
840 	/* Leave the driver in snooze, not sleep, mode. */
841 	tulip_set_power_state (tp, 0, 1);
842 }
843 
844 
tulip_close(struct net_device * dev)845 static int tulip_close (struct net_device *dev)
846 {
847 	long ioaddr = dev->base_addr;
848 	struct tulip_private *tp = (struct tulip_private *) dev->priv;
849 	int i;
850 
851 	netif_stop_queue (dev);
852 
853 #ifdef CONFIG_NET_HW_FLOWCONTROL
854         if (tp->fc_bit) {
855                 int bit = tp->fc_bit;
856                 tp->fc_bit = 0;
857                 netdev_unregister_fc(bit);
858         }
859 #endif
860 	tulip_down (dev);
861 
862 	if (tulip_debug > 1)
863 		printk (KERN_DEBUG "%s: Shutting down ethercard, status was %2.2x.\n",
864 			dev->name, inl (ioaddr + CSR5));
865 
866 	free_irq (dev->irq, dev);
867 
868 	/* Free all the skbuffs in the Rx queue. */
869 	for (i = 0; i < RX_RING_SIZE; i++) {
870 		struct sk_buff *skb = tp->rx_buffers[i].skb;
871 		dma_addr_t mapping = tp->rx_buffers[i].mapping;
872 
873 		tp->rx_buffers[i].skb = NULL;
874 		tp->rx_buffers[i].mapping = 0;
875 
876 		tp->rx_ring[i].status = 0;	/* Not owned by Tulip chip. */
877 		tp->rx_ring[i].length = 0;
878 		tp->rx_ring[i].buffer1 = 0xBADF00D0;	/* An invalid address. */
879 		if (skb) {
880 			pci_unmap_single(tp->pdev, mapping, PKT_BUF_SZ,
881 					 PCI_DMA_FROMDEVICE);
882 			dev_kfree_skb (skb);
883 		}
884 	}
885 	for (i = 0; i < TX_RING_SIZE; i++) {
886 		struct sk_buff *skb = tp->tx_buffers[i].skb;
887 
888 		if (skb != NULL) {
889 			pci_unmap_single(tp->pdev, tp->tx_buffers[i].mapping,
890 					 skb->len, PCI_DMA_TODEVICE);
891 			dev_kfree_skb (skb);
892 		}
893 		tp->tx_buffers[i].skb = NULL;
894 		tp->tx_buffers[i].mapping = 0;
895 	}
896 
897 	MOD_DEC_USE_COUNT;
898 
899 	return 0;
900 }
901 
tulip_get_stats(struct net_device * dev)902 static struct net_device_stats *tulip_get_stats(struct net_device *dev)
903 {
904 	struct tulip_private *tp = (struct tulip_private *)dev->priv;
905 	long ioaddr = dev->base_addr;
906 
907 	if (netif_running(dev)) {
908 		unsigned long flags;
909 
910 		spin_lock_irqsave (&tp->lock, flags);
911 
912 		tp->stats.rx_missed_errors += inl(ioaddr + CSR8) & 0xffff;
913 
914 		spin_unlock_irqrestore(&tp->lock, flags);
915 	}
916 
917 	return &tp->stats;
918 }
919 
920 
netdev_ethtool_ioctl(struct net_device * dev,void * useraddr)921 static int netdev_ethtool_ioctl(struct net_device *dev, void *useraddr)
922 {
923 	struct tulip_private *np = dev->priv;
924 	u32 ethcmd;
925 
926 	if (copy_from_user(&ethcmd, useraddr, sizeof(ethcmd)))
927 		return -EFAULT;
928 
929         switch (ethcmd) {
930         case ETHTOOL_GDRVINFO: {
931 		struct ethtool_drvinfo info = {ETHTOOL_GDRVINFO};
932 		strcpy(info.driver, DRV_NAME);
933 		strcpy(info.version, DRV_VERSION);
934 		strcpy(info.bus_info, np->pdev->slot_name);
935 		if (copy_to_user(useraddr, &info, sizeof(info)))
936 			return -EFAULT;
937 		return 0;
938 	}
939 
940         }
941 
942 	return -EOPNOTSUPP;
943 }
944 
945 /* Provide ioctl() calls to examine the MII xcvr state. */
private_ioctl(struct net_device * dev,struct ifreq * rq,int cmd)946 static int private_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
947 {
948 	struct tulip_private *tp = dev->priv;
949 	long ioaddr = dev->base_addr;
950 	struct mii_ioctl_data *data = (struct mii_ioctl_data *) & rq->ifr_data;
951 	const unsigned int phy_idx = 0;
952 	int phy = tp->phys[phy_idx] & 0x1f;
953 	unsigned int regnum = data->reg_num;
954 
955 	switch (cmd) {
956 	case SIOCETHTOOL:
957 		return netdev_ethtool_ioctl(dev, (void *) rq->ifr_data);
958 
959 	case SIOCGMIIPHY:		/* Get address of MII PHY in use. */
960 	case SIOCDEVPRIVATE:		/* for binary compat, remove in 2.5 */
961 		if (tp->mii_cnt)
962 			data->phy_id = phy;
963 		else if (tp->flags & HAS_NWAY)
964 			data->phy_id = 32;
965 		else if (tp->chip_id == COMET)
966 			data->phy_id = 1;
967 		else
968 			return -ENODEV;
969 
970 	case SIOCGMIIREG:		/* Read MII PHY register. */
971 	case SIOCDEVPRIVATE+1:		/* for binary compat, remove in 2.5 */
972 		if (data->phy_id == 32 && (tp->flags & HAS_NWAY)) {
973 			int csr12 = inl (ioaddr + CSR12);
974 			int csr14 = inl (ioaddr + CSR14);
975 			switch (regnum) {
976 			case 0:
977                                 if (((csr14<<5) & 0x1000) ||
978                                         (dev->if_port == 5 && tp->nwayset))
979                                         data->val_out = 0x1000;
980                                 else
981                                         data->val_out = (tulip_media_cap[dev->if_port]&MediaIs100 ? 0x2000 : 0)
982                                                 | (tulip_media_cap[dev->if_port]&MediaIsFD ? 0x0100 : 0);
983 				break;
984 			case 1:
985                                 data->val_out =
986 					0x1848 +
987 					((csr12&0x7000) == 0x5000 ? 0x20 : 0) +
988 					((csr12&0x06) == 6 ? 0 : 4);
989                                 if (tp->chip_id != DC21041)
990                                         data->val_out |= 0x6048;
991 				break;
992 			case 4:
993                                 /* Advertised value, bogus 10baseTx-FD value from CSR6. */
994                                 data->val_out =
995 					((inl(ioaddr + CSR6) >> 3) & 0x0040) +
996 					((csr14 >> 1) & 0x20) + 1;
997                                 if (tp->chip_id != DC21041)
998                                          data->val_out |= ((csr14 >> 9) & 0x03C0);
999 				break;
1000 			case 5: data->val_out = tp->lpar; break;
1001 			default: data->val_out = 0; break;
1002 			}
1003 		} else {
1004 			data->val_out = tulip_mdio_read (dev, data->phy_id & 0x1f, regnum);
1005 		}
1006 		return 0;
1007 
1008 	case SIOCSMIIREG:		/* Write MII PHY register. */
1009 	case SIOCDEVPRIVATE+2:		/* for binary compat, remove in 2.5 */
1010 		if (!capable (CAP_NET_ADMIN))
1011 			return -EPERM;
1012 		if (regnum & ~0x1f)
1013 			return -EINVAL;
1014 		if (data->phy_id == phy) {
1015 			u16 value = data->val_in;
1016 			switch (regnum) {
1017 			case 0:	/* Check for autonegotiation on or reset. */
1018 				tp->full_duplex_lock = (value & 0x9000) ? 0 : 1;
1019 				if (tp->full_duplex_lock)
1020 					tp->full_duplex = (value & 0x0100) ? 1 : 0;
1021 				break;
1022 			case 4:
1023 				tp->advertising[phy_idx] =
1024 				tp->mii_advertise = data->val_in;
1025 				break;
1026 			}
1027 		}
1028 		if (data->phy_id == 32 && (tp->flags & HAS_NWAY)) {
1029 			u16 value = data->val_in;
1030 			if (regnum == 0) {
1031 			  if ((value & 0x1200) == 0x1200) {
1032 			    if (tp->chip_id == PNIC2) {
1033                                    pnic2_start_nway (dev);
1034                             } else {
1035 				   t21142_start_nway (dev);
1036                             }
1037 			  }
1038 			} else if (regnum == 4)
1039 				tp->sym_advertise = value;
1040 		} else {
1041 			tulip_mdio_write (dev, data->phy_id & 0x1f, regnum, data->val_in);
1042 		}
1043 		return 0;
1044 	default:
1045 		return -EOPNOTSUPP;
1046 	}
1047 
1048 	return -EOPNOTSUPP;
1049 }
1050 
1051 
1052 /* Set or clear the multicast filter for this adaptor.
1053    Note that we only use exclusion around actually queueing the
1054    new frame, not around filling tp->setup_frame.  This is non-deterministic
1055    when re-entered but still correct. */
1056 
1057 #undef set_bit_le
1058 #define set_bit_le(i,p) do { ((char *)(p))[(i)/8] |= (1<<((i)%8)); } while(0)
1059 
build_setup_frame_hash(u16 * setup_frm,struct net_device * dev)1060 static void build_setup_frame_hash(u16 *setup_frm, struct net_device *dev)
1061 {
1062 	struct tulip_private *tp = (struct tulip_private *)dev->priv;
1063 	u16 hash_table[32];
1064 	struct dev_mc_list *mclist;
1065 	int i;
1066 	u16 *eaddrs;
1067 
1068 	memset(hash_table, 0, sizeof(hash_table));
1069 	set_bit_le(255, hash_table); 			/* Broadcast entry */
1070 	/* This should work on big-endian machines as well. */
1071 	for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1072 	     i++, mclist = mclist->next) {
1073 		int index = ether_crc_le(ETH_ALEN, mclist->dmi_addr) & 0x1ff;
1074 
1075 		set_bit_le(index, hash_table);
1076 
1077 	}
1078 	for (i = 0; i < 32; i++) {
1079 		*setup_frm++ = hash_table[i];
1080 		*setup_frm++ = hash_table[i];
1081 	}
1082 	setup_frm = &tp->setup_frame[13*6];
1083 
1084 	/* Fill the final entry with our physical address. */
1085 	eaddrs = (u16 *)dev->dev_addr;
1086 	*setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
1087 	*setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
1088 	*setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
1089 }
1090 
build_setup_frame_perfect(u16 * setup_frm,struct net_device * dev)1091 static void build_setup_frame_perfect(u16 *setup_frm, struct net_device *dev)
1092 {
1093 	struct tulip_private *tp = (struct tulip_private *)dev->priv;
1094 	struct dev_mc_list *mclist;
1095 	int i;
1096 	u16 *eaddrs;
1097 
1098 	/* We have <= 14 addresses so we can use the wonderful
1099 	   16 address perfect filtering of the Tulip. */
1100 	for (i = 0, mclist = dev->mc_list; i < dev->mc_count;
1101 	     i++, mclist = mclist->next) {
1102 		eaddrs = (u16 *)mclist->dmi_addr;
1103 		*setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1104 		*setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1105 		*setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1106 	}
1107 	/* Fill the unused entries with the broadcast address. */
1108 	memset(setup_frm, 0xff, (15-i)*12);
1109 	setup_frm = &tp->setup_frame[15*6];
1110 
1111 	/* Fill the final entry with our physical address. */
1112 	eaddrs = (u16 *)dev->dev_addr;
1113 	*setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
1114 	*setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
1115 	*setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
1116 }
1117 
1118 
set_rx_mode(struct net_device * dev)1119 static void set_rx_mode(struct net_device *dev)
1120 {
1121 	struct tulip_private *tp = (struct tulip_private *)dev->priv;
1122 	long ioaddr = dev->base_addr;
1123 	int csr6;
1124 
1125 	csr6 = inl(ioaddr + CSR6) & ~0x00D5;
1126 
1127 	tp->csr6 &= ~0x00D5;
1128 	if (dev->flags & IFF_PROMISC) {			/* Set promiscuous. */
1129 		tp->csr6 |= AcceptAllMulticast | AcceptAllPhys;
1130 		csr6 |= AcceptAllMulticast | AcceptAllPhys;
1131 		/* Unconditionally log net taps. */
1132 		printk(KERN_INFO "%s: Promiscuous mode enabled.\n", dev->name);
1133 	} else if ((dev->mc_count > 1000)  ||  (dev->flags & IFF_ALLMULTI)) {
1134 		/* Too many to filter well -- accept all multicasts. */
1135 		tp->csr6 |= AcceptAllMulticast;
1136 		csr6 |= AcceptAllMulticast;
1137 	} else	if (tp->flags & MC_HASH_ONLY) {
1138 		/* Some work-alikes have only a 64-entry hash filter table. */
1139 		/* Should verify correctness on big-endian/__powerpc__ */
1140 		struct dev_mc_list *mclist;
1141 		int i;
1142 		if (dev->mc_count > 64) {		/* Arbitrary non-effective limit. */
1143 			tp->csr6 |= AcceptAllMulticast;
1144 			csr6 |= AcceptAllMulticast;
1145 		} else {
1146 			u32 mc_filter[2] = {0, 0};		 /* Multicast hash filter */
1147 			int filterbit;
1148 			for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1149 				 i++, mclist = mclist->next) {
1150 				if (tp->flags & COMET_MAC_ADDR)
1151 					filterbit = ether_crc_le(ETH_ALEN, mclist->dmi_addr);
1152 				else
1153 					filterbit = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
1154 				filterbit &= 0x3f;
1155 				mc_filter[filterbit >> 5] |= cpu_to_le32(1 << (filterbit & 31));
1156 				if (tulip_debug > 2) {
1157 					printk(KERN_INFO "%s: Added filter for %2.2x:%2.2x:%2.2x:"
1158 						   "%2.2x:%2.2x:%2.2x  %8.8x bit %d.\n", dev->name,
1159 						   mclist->dmi_addr[0], mclist->dmi_addr[1],
1160 						   mclist->dmi_addr[2], mclist->dmi_addr[3],
1161 						   mclist->dmi_addr[4], mclist->dmi_addr[5],
1162 						   ether_crc(ETH_ALEN, mclist->dmi_addr), filterbit);
1163 				}
1164 			}
1165 			if (mc_filter[0] == tp->mc_filter[0]  &&
1166 				mc_filter[1] == tp->mc_filter[1])
1167 				;				/* No change. */
1168 			else if (tp->flags & IS_ASIX) {
1169 				outl(2, ioaddr + CSR13);
1170 				outl(mc_filter[0], ioaddr + CSR14);
1171 				outl(3, ioaddr + CSR13);
1172 				outl(mc_filter[1], ioaddr + CSR14);
1173 			} else if (tp->flags & COMET_MAC_ADDR) {
1174 				outl(mc_filter[0], ioaddr + 0xAC);
1175 				outl(mc_filter[1], ioaddr + 0xB0);
1176 			}
1177 			tp->mc_filter[0] = mc_filter[0];
1178 			tp->mc_filter[1] = mc_filter[1];
1179 		}
1180 	} else {
1181 		unsigned long flags;
1182 		u32 tx_flags = 0x08000000 | 192;
1183 
1184 		/* Note that only the low-address shortword of setup_frame is valid!
1185 		   The values are doubled for big-endian architectures. */
1186 		if (dev->mc_count > 14) { /* Must use a multicast hash table. */
1187 			build_setup_frame_hash(tp->setup_frame, dev);
1188 			tx_flags = 0x08400000 | 192;
1189 		} else {
1190 			build_setup_frame_perfect(tp->setup_frame, dev);
1191 		}
1192 
1193 		spin_lock_irqsave(&tp->lock, flags);
1194 
1195 		if (tp->cur_tx - tp->dirty_tx > TX_RING_SIZE - 2) {
1196 			/* Same setup recently queued, we need not add it. */
1197 		} else {
1198 			unsigned int entry;
1199 			int dummy = -1;
1200 
1201 			/* Now add this frame to the Tx list. */
1202 
1203 			entry = tp->cur_tx++ % TX_RING_SIZE;
1204 
1205 			if (entry != 0) {
1206 				/* Avoid a chip errata by prefixing a dummy entry. */
1207 				tp->tx_buffers[entry].skb = NULL;
1208 				tp->tx_buffers[entry].mapping = 0;
1209 				tp->tx_ring[entry].length =
1210 					(entry == TX_RING_SIZE-1) ? cpu_to_le32(DESC_RING_WRAP) : 0;
1211 				tp->tx_ring[entry].buffer1 = 0;
1212 				/* Must set DescOwned later to avoid race with chip */
1213 				dummy = entry;
1214 				entry = tp->cur_tx++ % TX_RING_SIZE;
1215 			}
1216 
1217 			tp->tx_buffers[entry].skb = NULL;
1218 			tp->tx_buffers[entry].mapping =
1219 				pci_map_single(tp->pdev, tp->setup_frame,
1220 					       sizeof(tp->setup_frame),
1221 					       PCI_DMA_TODEVICE);
1222 			/* Put the setup frame on the Tx list. */
1223 			if (entry == TX_RING_SIZE-1)
1224 				tx_flags |= DESC_RING_WRAP;		/* Wrap ring. */
1225 			tp->tx_ring[entry].length = cpu_to_le32(tx_flags);
1226 			tp->tx_ring[entry].buffer1 =
1227 				cpu_to_le32(tp->tx_buffers[entry].mapping);
1228 			tp->tx_ring[entry].status = cpu_to_le32(DescOwned);
1229 			if (dummy >= 0)
1230 				tp->tx_ring[dummy].status = cpu_to_le32(DescOwned);
1231 			if (tp->cur_tx - tp->dirty_tx >= TX_RING_SIZE - 2)
1232 				netif_stop_queue(dev);
1233 
1234 			/* Trigger an immediate transmit demand. */
1235 			outl(0, ioaddr + CSR1);
1236 		}
1237 
1238 		spin_unlock_irqrestore(&tp->lock, flags);
1239 	}
1240 
1241 	outl(csr6, ioaddr + CSR6);
1242 }
1243 
1244 #ifdef CONFIG_TULIP_MWI
tulip_mwi_config(struct pci_dev * pdev,struct net_device * dev)1245 static void __devinit tulip_mwi_config (struct pci_dev *pdev,
1246 					struct net_device *dev)
1247 {
1248 	struct tulip_private *tp = dev->priv;
1249 	u8 cache;
1250 	u16 pci_command;
1251 	u32 csr0;
1252 
1253 	if (tulip_debug > 3)
1254 		printk(KERN_DEBUG "%s: tulip_mwi_config()\n", pdev->slot_name);
1255 
1256 	tp->csr0 = csr0 = 0;
1257 
1258 	/* if we have any cache line size at all, we can do MRM */
1259 	csr0 |= MRM;
1260 
1261 	/* ...and barring hardware bugs, MWI */
1262 	if (!(tp->chip_id == DC21143 && tp->revision == 65))
1263 		csr0 |= MWI;
1264 
1265 	/* set or disable MWI in the standard PCI command bit.
1266 	 * Check for the case where  mwi is desired but not available
1267 	 */
1268 	if (csr0 & MWI)	pci_set_mwi(pdev);
1269 	else		pci_clear_mwi(pdev);
1270 
1271 	/* read result from hardware (in case bit refused to enable) */
1272 	pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
1273 	if ((csr0 & MWI) && (!(pci_command & PCI_COMMAND_INVALIDATE)))
1274 		csr0 &= ~MWI;
1275 
1276 	/* if cache line size hardwired to zero, no MWI */
1277 	pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache);
1278 	if ((csr0 & MWI) && (cache == 0)) {
1279 		csr0 &= ~MWI;
1280 		pci_clear_mwi(pdev);
1281 	}
1282 
1283 	/* assign per-cacheline-size cache alignment and
1284 	 * burst length values
1285 	 */
1286 	switch (cache) {
1287 	case 8:
1288 		csr0 |= MRL | (1 << CALShift) | (16 << BurstLenShift);
1289 		break;
1290 	case 16:
1291 		csr0 |= MRL | (2 << CALShift) | (16 << BurstLenShift);
1292 		break;
1293 	case 32:
1294 		csr0 |= MRL | (3 << CALShift) | (32 << BurstLenShift);
1295 		break;
1296 	default:
1297 		cache = 0;
1298 		break;
1299 	}
1300 
1301 	/* if we have a good cache line size, we by now have a good
1302 	 * csr0, so save it and exit
1303 	 */
1304 	if (cache)
1305 		goto out;
1306 
1307 	/* we don't have a good csr0 or cache line size, disable MWI */
1308 	if (csr0 & MWI) {
1309 		pci_clear_mwi(pdev);
1310 		csr0 &= ~MWI;
1311 	}
1312 
1313 	/* sane defaults for burst length and cache alignment
1314 	 * originally from de4x5 driver
1315 	 */
1316 	csr0 |= (8 << BurstLenShift) | (1 << CALShift);
1317 
1318 out:
1319 	tp->csr0 = csr0;
1320 	if (tulip_debug > 2)
1321 		printk(KERN_DEBUG "%s: MWI config cacheline=%d, csr0=%08x\n",
1322 		       pdev->slot_name, cache, csr0);
1323 }
1324 #endif
1325 
tulip_init_one(struct pci_dev * pdev,const struct pci_device_id * ent)1326 static int __devinit tulip_init_one (struct pci_dev *pdev,
1327 				     const struct pci_device_id *ent)
1328 {
1329 	struct tulip_private *tp;
1330 	/* See note below on the multiport cards. */
1331 	static unsigned char last_phys_addr[6] = {0x00, 'L', 'i', 'n', 'u', 'x'};
1332 	static int last_irq;
1333 	static int multiport_cnt;	/* For four-port boards w/one EEPROM */
1334 	u8 chip_rev;
1335 	int i, irq;
1336 	unsigned short sum;
1337 	u8 ee_data[EEPROM_SIZE];
1338 	struct net_device *dev;
1339 	long ioaddr;
1340 	static int board_idx = -1;
1341 	int chip_idx = ent->driver_data;
1342 	unsigned int t2104x_mode = 0;
1343 	unsigned int eeprom_missing = 0;
1344 	unsigned int force_csr0 = 0;
1345 
1346 #ifndef MODULE
1347 	static int did_version;		/* Already printed version info. */
1348 	if (tulip_debug > 0  &&  did_version++ == 0)
1349 		printk (KERN_INFO "%s", version);
1350 #endif
1351 
1352 	board_idx++;
1353 
1354 	/*
1355 	 *	Lan media wire a tulip chip to a wan interface. Needs a very
1356 	 *	different driver (lmc driver)
1357 	 */
1358 
1359         if (pdev->subsystem_vendor == PCI_VENDOR_ID_LMC) {
1360 		printk (KERN_ERR PFX "skipping LMC card.\n");
1361 		return -ENODEV;
1362 	}
1363 
1364 	/*
1365 	 *	Early DM9100's need software CRC and the DMFE driver
1366 	 */
1367 
1368 	if (pdev->vendor == 0x1282 && pdev->device == 0x9100)
1369 	{
1370 		u32 dev_rev;
1371 		/* Read Chip revision */
1372 		pci_read_config_dword(pdev, PCI_REVISION_ID, &dev_rev);
1373 		if(dev_rev < 0x02000030)
1374 		{
1375 			printk(KERN_ERR PFX "skipping early DM9100 with Crc bug (use dmfe)\n");
1376 			return -ENODEV;
1377 		}
1378 	}
1379 
1380 	/*
1381 	 *	Looks for early PCI chipsets where people report hangs
1382 	 *	without the workarounds being on.
1383 	 */
1384 
1385 	/* Intel Saturn. Switch to 8 long words burst, 8 long word cache aligned
1386 	   Aries might need this too. The Saturn errata are not pretty reading but
1387 	   thankfully its an old 486 chipset.
1388 	*/
1389 
1390 	if (pci_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82424, NULL)) {
1391 		csr0 = MRL | MRM | (8 << BurstLenShift) | (1 << CALShift);
1392 		force_csr0 = 1;
1393 	}
1394 	/* The dreaded SiS496 486 chipset. Same workaround as above. */
1395 	if (pci_find_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496, NULL)) {
1396 		csr0 = MRL | MRM | (8 << BurstLenShift) | (1 << CALShift);
1397 		force_csr0 = 1;
1398 	}
1399 
1400 	/* bugfix: the ASIX must have a burst limit or horrible things happen. */
1401 	if (chip_idx == AX88140) {
1402 		if ((csr0 & 0x3f00) == 0)
1403 			csr0 |= 0x2000;
1404 	}
1405 
1406 	/* PNIC doesn't have MWI/MRL/MRM... */
1407 	if (chip_idx == LC82C168)
1408 		csr0 &= ~0xfff10000; /* zero reserved bits 31:20, 16 */
1409 
1410 	/* DM9102A has troubles with MRM & clear reserved bits 24:22, 20, 16, 7:1 */
1411 	if ((pdev->vendor == 0x1282 && pdev->device == 0x9102)
1412 		|| (pdev->vendor == 0x10b9 && pdev->device == 0x5261))
1413 		csr0 &= ~0x01f100ff;
1414 
1415 #if defined(__sparc__)
1416         /* DM9102A needs 32-dword alignment/burst length on sparc - chip bug? */
1417 	if ((pdev->vendor == 0x1282 && pdev->device == 0x9102)
1418 		|| (pdev->vendor == 0x10b9 && pdev->device == 0x5261))
1419                 csr0 = (csr0 & ~0xff00) | 0xe000;
1420 #endif
1421 
1422 	/*
1423 	 *	And back to business
1424 	 */
1425 
1426 	i = pci_enable_device(pdev);
1427 	if (i) {
1428 		printk (KERN_ERR PFX
1429 			"Cannot enable tulip board #%d, aborting\n",
1430 			board_idx);
1431 		return i;
1432 	}
1433 
1434 	ioaddr = pci_resource_start (pdev, 0);
1435 	irq = pdev->irq;
1436 
1437 	/* alloc_etherdev ensures aligned and zeroed private structures */
1438 	dev = alloc_etherdev (sizeof (*tp));
1439 	if (!dev) {
1440 		printk (KERN_ERR PFX "ether device alloc failed, aborting\n");
1441 		return -ENOMEM;
1442 	}
1443 
1444 	if (pci_resource_len (pdev, 0) < tulip_tbl[chip_idx].io_size) {
1445 		printk (KERN_ERR PFX "%s: I/O region (0x%lx@0x%lx) too small, "
1446 			"aborting\n", pdev->slot_name,
1447 			pci_resource_len (pdev, 0),
1448 			pci_resource_start (pdev, 0));
1449 		goto err_out_free_netdev;
1450 	}
1451 
1452 	/* grab all resources from both PIO and MMIO regions, as we
1453 	 * don't want anyone else messing around with our hardware */
1454 	if (pci_request_regions (pdev, "tulip"))
1455 		goto err_out_free_netdev;
1456 
1457 #ifndef USE_IO_OPS
1458 	ioaddr = (unsigned long) ioremap (pci_resource_start (pdev, 1),
1459 					  tulip_tbl[chip_idx].io_size);
1460 	if (!ioaddr)
1461 		goto err_out_free_res;
1462 #endif
1463 
1464 	pci_read_config_byte (pdev, PCI_REVISION_ID, &chip_rev);
1465 
1466 	/*
1467 	 * initialize private data structure 'tp'
1468 	 * it is zeroed and aligned in alloc_etherdev
1469 	 */
1470 	tp = dev->priv;
1471 
1472 	tp->rx_ring = pci_alloc_consistent(pdev,
1473 					   sizeof(struct tulip_rx_desc) * RX_RING_SIZE +
1474 					   sizeof(struct tulip_tx_desc) * TX_RING_SIZE,
1475 					   &tp->rx_ring_dma);
1476 	if (!tp->rx_ring)
1477 		goto err_out_mtable;
1478 	tp->tx_ring = (struct tulip_tx_desc *)(tp->rx_ring + RX_RING_SIZE);
1479 	tp->tx_ring_dma = tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * RX_RING_SIZE;
1480 
1481 	tp->chip_id = chip_idx;
1482 	tp->flags = tulip_tbl[chip_idx].flags;
1483 	tp->pdev = pdev;
1484 	tp->base_addr = ioaddr;
1485 	tp->revision = chip_rev;
1486 	tp->csr0 = csr0;
1487 	spin_lock_init(&tp->lock);
1488 	spin_lock_init(&tp->mii_lock);
1489 	init_timer(&tp->timer);
1490 	tp->timer.data = (unsigned long)dev;
1491 	tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
1492 
1493 	dev->base_addr = ioaddr;
1494 
1495 #ifdef CONFIG_TULIP_MWI
1496 	if (!force_csr0 && (tp->flags & HAS_PCI_MWI))
1497 		tulip_mwi_config (pdev, dev);
1498 #else
1499 	/* MWI is broken for DC21143 rev 65... */
1500 	if (chip_idx == DC21143 && chip_rev == 65)
1501 		tp->csr0 &= ~MWI;
1502 #endif
1503 
1504 	/* Stop the chip's Tx and Rx processes. */
1505 	tulip_stop_rxtx(tp);
1506 
1507 	pci_set_master(pdev);
1508 
1509 	/* Clear the missed-packet counter. */
1510 	inl(ioaddr + CSR8);
1511 
1512 	if (chip_idx == DC21041) {
1513 		if (inl(ioaddr + CSR9) & 0x8000) {
1514 			chip_idx = DC21040;
1515 			t2104x_mode = 1;
1516 		} else {
1517 			t2104x_mode = 2;
1518 		}
1519 	}
1520 
1521 	/* The station address ROM is read byte serially.  The register must
1522 	   be polled, waiting for the value to be read bit serially from the
1523 	   EEPROM.
1524 	   */
1525 	sum = 0;
1526 	if (chip_idx == DC21040) {
1527 		outl(0, ioaddr + CSR9);		/* Reset the pointer with a dummy write. */
1528 		for (i = 0; i < 6; i++) {
1529 			int value, boguscnt = 100000;
1530 			do
1531 				value = inl(ioaddr + CSR9);
1532 			while (value < 0  && --boguscnt > 0);
1533 			dev->dev_addr[i] = value;
1534 			sum += value & 0xff;
1535 		}
1536 	} else if (chip_idx == LC82C168) {
1537 		for (i = 0; i < 3; i++) {
1538 			int value, boguscnt = 100000;
1539 			outl(0x600 | i, ioaddr + 0x98);
1540 			do
1541 				value = inl(ioaddr + CSR9);
1542 			while (value < 0  && --boguscnt > 0);
1543 			put_unaligned(le16_to_cpu(value), ((u16*)dev->dev_addr) + i);
1544 			sum += value & 0xffff;
1545 		}
1546 	} else if (chip_idx == COMET) {
1547 		/* No need to read the EEPROM. */
1548 		put_unaligned(cpu_to_le32(inl(ioaddr + 0xA4)), (u32 *)dev->dev_addr);
1549 		put_unaligned(cpu_to_le16(inl(ioaddr + 0xA8)), (u16 *)(dev->dev_addr + 4));
1550 		for (i = 0; i < 6; i ++)
1551 			sum += dev->dev_addr[i];
1552 	} else {
1553 		/* A serial EEPROM interface, we read now and sort it out later. */
1554 		int sa_offset = 0;
1555 		int ee_addr_size = tulip_read_eeprom(ioaddr, 0xff, 8) & 0x40000 ? 8 : 6;
1556 
1557 		for (i = 0; i < sizeof(ee_data)/2; i++)
1558 			((u16 *)ee_data)[i] =
1559 				le16_to_cpu(tulip_read_eeprom(ioaddr, i, ee_addr_size));
1560 
1561 		/* DEC now has a specification (see Notes) but early board makers
1562 		   just put the address in the first EEPROM locations. */
1563 		/* This does  memcmp(eedata, eedata+16, 8) */
1564 		for (i = 0; i < 8; i ++)
1565 			if (ee_data[i] != ee_data[16+i])
1566 				sa_offset = 20;
1567 		if (chip_idx == CONEXANT) {
1568 		    /* Check that the tuple type and length is correct. */
1569 			if (ee_data[0x198] == 0x04  &&  ee_data[0x199] == 6)
1570 			    sa_offset = 0x19A;
1571 		}
1572 		if (ee_data[0] == 0xff && ee_data[1] == 0xff &&
1573 		    ee_data[2] == 0) {
1574 			sa_offset = 2;		/* Grrr, damn Matrox boards. */
1575 			multiport_cnt = 4;
1576 		}
1577 #ifdef CONFIG_DDB5476
1578 		if ((pdev->bus->number == 0) && (PCI_SLOT(pdev->devfn) == 6)) {
1579 			/* DDB5476 MAC address in first EEPROM locations. */
1580                        sa_offset = 0;
1581                        /* No media table either */
1582                        tp->flags &= ~HAS_MEDIA_TABLE;
1583                }
1584 #endif
1585 #ifdef CONFIG_DDB5477
1586                if ((pdev->bus->number == 0) && (PCI_SLOT(pdev->devfn) == 4)) {
1587                        /* DDB5477 MAC address in first EEPROM locations. */
1588                        sa_offset = 0;
1589                        /* No media table either */
1590                        tp->flags &= ~HAS_MEDIA_TABLE;
1591                }
1592 #endif
1593 #ifdef CONFIG_MIPS_COBALT
1594                if ((pdev->bus->number == 0) &&
1595                    ((PCI_SLOT(pdev->devfn) == 7) ||
1596                     (PCI_SLOT(pdev->devfn) == 12))) {
1597                        /* Cobalt MAC address in first EEPROM locations. */
1598                        sa_offset = 0;
1599                        /* No media table either */
1600                        tp->flags &= ~HAS_MEDIA_TABLE;
1601                }
1602 #endif
1603 #ifdef __hppa__
1604 		/* 3x5 HSC (J3514A) has a broken srom */
1605 		if(ee_data[0] == 0x61 && ee_data[1] == 0x10) {
1606 			/* pci_vendor_id and subsystem_id are swapped */
1607 			ee_data[0] = ee_data[2];
1608 			ee_data[1] = ee_data[3];
1609 			ee_data[2] = 0x61;
1610 			ee_data[3] = 0x10;
1611 
1612 			/* srom need to be byte-swaped and shifted up 1 word.
1613 			 * This shift needs to happen at the end of the MAC
1614 			 * first because of the 2 byte overlap.
1615 			 */
1616 			for(i = 4; i >= 0; i -= 2) {
1617 				ee_data[17 + i + 3] = ee_data[17 + i];
1618 				ee_data[16 + i + 5] = ee_data[16 + i];
1619 			}
1620 		}
1621 #endif
1622 		for (i = 0; i < 6; i ++) {
1623 			dev->dev_addr[i] = ee_data[i + sa_offset];
1624 			sum += ee_data[i + sa_offset];
1625 		}
1626 	}
1627 	/* Lite-On boards have the address byte-swapped. */
1628 	if ((dev->dev_addr[0] == 0xA0  ||  dev->dev_addr[0] == 0xC0)
1629 		&&  dev->dev_addr[1] == 0x00)
1630 		for (i = 0; i < 6; i+=2) {
1631 			char tmp = dev->dev_addr[i];
1632 			dev->dev_addr[i] = dev->dev_addr[i+1];
1633 			dev->dev_addr[i+1] = tmp;
1634 		}
1635 	/* On the Zynx 315 Etherarray and other multiport boards only the
1636 	   first Tulip has an EEPROM.
1637 	   On Sparc systems the mac address is held in the OBP property
1638 	   "local-mac-address".
1639 	   The addresses of the subsequent ports are derived from the first.
1640 	   Many PCI BIOSes also incorrectly report the IRQ line, so we correct
1641 	   that here as well. */
1642 	if (sum == 0  || sum == 6*0xff) {
1643 #if defined(__sparc__)
1644 		struct pcidev_cookie *pcp = pdev->sysdata;
1645 #endif
1646 		eeprom_missing = 1;
1647 		for (i = 0; i < 5; i++)
1648 			dev->dev_addr[i] = last_phys_addr[i];
1649 		dev->dev_addr[i] = last_phys_addr[i] + 1;
1650 #if defined(__sparc__)
1651 		if ((pcp != NULL) && prom_getproplen(pcp->prom_node,
1652 			"local-mac-address") == 6) {
1653 			prom_getproperty(pcp->prom_node, "local-mac-address",
1654 			    dev->dev_addr, 6);
1655 		}
1656 #endif
1657 #if defined(__i386__)		/* Patch up x86 BIOS bug. */
1658 		if (last_irq)
1659 			irq = last_irq;
1660 #endif
1661 	}
1662 
1663 	for (i = 0; i < 6; i++)
1664 		last_phys_addr[i] = dev->dev_addr[i];
1665 	last_irq = irq;
1666 	dev->irq = irq;
1667 
1668 	/* The lower four bits are the media type. */
1669 	if (board_idx >= 0  &&  board_idx < MAX_UNITS) {
1670 		if (options[board_idx] & MEDIA_MASK)
1671 			tp->default_port = options[board_idx] & MEDIA_MASK;
1672 		if ((options[board_idx] & FullDuplex) || full_duplex[board_idx] > 0)
1673 			tp->full_duplex = 1;
1674 		if (mtu[board_idx] > 0)
1675 			dev->mtu = mtu[board_idx];
1676 	}
1677 	if (dev->mem_start & MEDIA_MASK)
1678 		tp->default_port = dev->mem_start & MEDIA_MASK;
1679 	if (tp->default_port) {
1680 		printk(KERN_INFO "tulip%d: Transceiver selection forced to %s.\n",
1681 		       board_idx, medianame[tp->default_port & MEDIA_MASK]);
1682 		tp->medialock = 1;
1683 		if (tulip_media_cap[tp->default_port] & MediaAlwaysFD)
1684 			tp->full_duplex = 1;
1685 	}
1686 	if (tp->full_duplex)
1687 		tp->full_duplex_lock = 1;
1688 
1689 	if (tulip_media_cap[tp->default_port] & MediaIsMII) {
1690 		u16 media2advert[] = { 0x20, 0x40, 0x03e0, 0x60, 0x80, 0x100, 0x200 };
1691 		tp->mii_advertise = media2advert[tp->default_port - 9];
1692 		tp->mii_advertise |= (tp->flags & HAS_8023X); /* Matching bits! */
1693 	}
1694 
1695 	if (tp->flags & HAS_MEDIA_TABLE) {
1696 		memcpy(tp->eeprom, ee_data, sizeof(tp->eeprom));
1697 
1698 		sprintf(dev->name, "tulip%d", board_idx);	/* hack */
1699 		tulip_parse_eeprom(dev);
1700 		strcpy(dev->name, "eth%d");			/* un-hack */
1701 	}
1702 
1703 	if ((tp->flags & ALWAYS_CHECK_MII) ||
1704 		(tp->mtable  &&  tp->mtable->has_mii) ||
1705 		( ! tp->mtable  &&  (tp->flags & HAS_MII))) {
1706 		if (tp->mtable  &&  tp->mtable->has_mii) {
1707 			for (i = 0; i < tp->mtable->leafcount; i++)
1708 				if (tp->mtable->mleaf[i].media == 11) {
1709 					tp->cur_index = i;
1710 					tp->saved_if_port = dev->if_port;
1711 					tulip_select_media(dev, 2);
1712 					dev->if_port = tp->saved_if_port;
1713 					break;
1714 				}
1715 		}
1716 
1717 		/* Find the connected MII xcvrs.
1718 		   Doing this in open() would allow detecting external xcvrs
1719 		   later, but takes much time. */
1720 		tulip_find_mii (dev, board_idx);
1721 	}
1722 
1723 	/* The Tulip-specific entries in the device structure. */
1724 	dev->open = tulip_open;
1725 	dev->hard_start_xmit = tulip_start_xmit;
1726 	dev->tx_timeout = tulip_tx_timeout;
1727 	dev->watchdog_timeo = TX_TIMEOUT;
1728 	dev->stop = tulip_close;
1729 	dev->get_stats = tulip_get_stats;
1730 	dev->do_ioctl = private_ioctl;
1731 	dev->set_multicast_list = set_rx_mode;
1732 
1733 	if (register_netdev(dev))
1734 		goto err_out_free_ring;
1735 
1736 	printk(KERN_INFO "%s: %s rev %d at %#3lx,",
1737 	       dev->name, tulip_tbl[chip_idx].chip_name, chip_rev, ioaddr);
1738 	pci_set_drvdata(pdev, dev);
1739 
1740 	if (t2104x_mode == 1)
1741 		printk(" 21040 compatible mode,");
1742 	else if (t2104x_mode == 2)
1743 		printk(" 21041 mode,");
1744 	if (eeprom_missing)
1745 		printk(" EEPROM not present,");
1746 	for (i = 0; i < 6; i++)
1747 		printk("%c%2.2X", i ? ':' : ' ', dev->dev_addr[i]);
1748 	printk(", IRQ %d.\n", irq);
1749 
1750         if (tp->chip_id == PNIC2)
1751 		tp->link_change = pnic2_lnk_change;
1752 	else if ((tp->flags & HAS_NWAY)  || tp->chip_id == DC21041)
1753 		tp->link_change = t21142_lnk_change;
1754 	else if (tp->flags & HAS_PNICNWAY)
1755 		tp->link_change = pnic_lnk_change;
1756 
1757 	/* Reset the xcvr interface and turn on heartbeat. */
1758 	switch (chip_idx) {
1759 	case DC21041:
1760 		if (tp->sym_advertise == 0)
1761 			tp->sym_advertise = 0x0061;
1762 		outl(0x00000000, ioaddr + CSR13);
1763 		outl(0xFFFFFFFF, ioaddr + CSR14);
1764 		outl(0x00000008, ioaddr + CSR15); /* Listen on AUI also. */
1765 		outl(inl(ioaddr + CSR6) | csr6_fd, ioaddr + CSR6);
1766 		outl(0x0000EF01, ioaddr + CSR13);
1767 		break;
1768 	case DC21040:
1769 		outl(0x00000000, ioaddr + CSR13);
1770 		outl(0x00000004, ioaddr + CSR13);
1771 		break;
1772 	case DC21140:
1773 	case DM910X:
1774 	default:
1775 		if (tp->mtable)
1776 			outl(tp->mtable->csr12dir | 0x100, ioaddr + CSR12);
1777 		break;
1778 	case DC21142:
1779 		if (tp->mii_cnt  ||  tulip_media_cap[dev->if_port] & MediaIsMII) {
1780 			outl(csr6_mask_defstate, ioaddr + CSR6);
1781 			outl(0x0000, ioaddr + CSR13);
1782 			outl(0x0000, ioaddr + CSR14);
1783 			outl(csr6_mask_hdcap, ioaddr + CSR6);
1784 		} else
1785 			t21142_start_nway(dev);
1786 		break;
1787 	case PNIC2:
1788 	        /* just do a reset for sanity sake */
1789 		outl(0x0000, ioaddr + CSR13);
1790 		outl(0x0000, ioaddr + CSR14);
1791 		break;
1792 	case LC82C168:
1793 		if ( ! tp->mii_cnt) {
1794 			tp->nway = 1;
1795 			tp->nwayset = 0;
1796 			outl(csr6_ttm | csr6_ca, ioaddr + CSR6);
1797 			outl(0x30, ioaddr + CSR12);
1798 			outl(0x0001F078, ioaddr + CSR6);
1799 			outl(0x0201F078, ioaddr + CSR6); /* Turn on autonegotiation. */
1800 		}
1801 		break;
1802 	case MX98713:
1803 	case COMPEX9881:
1804 		outl(0x00000000, ioaddr + CSR6);
1805 		outl(0x000711C0, ioaddr + CSR14); /* Turn on NWay. */
1806 		outl(0x00000001, ioaddr + CSR13);
1807 		break;
1808 	case MX98715:
1809 	case MX98725:
1810 		outl(0x01a80000, ioaddr + CSR6);
1811 		outl(0xFFFFFFFF, ioaddr + CSR14);
1812 		outl(0x00001000, ioaddr + CSR12);
1813 		break;
1814 	case COMET:
1815 		/* No initialization necessary. */
1816 		break;
1817 	}
1818 
1819 	/* put the chip in snooze mode until opened */
1820 	tulip_set_power_state (tp, 0, 1);
1821 
1822 	return 0;
1823 
1824 err_out_free_ring:
1825 	pci_free_consistent (pdev,
1826 			     sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
1827 			     sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
1828 			     tp->rx_ring, tp->rx_ring_dma);
1829 
1830 err_out_mtable:
1831 	if (tp->mtable)
1832 		kfree (tp->mtable);
1833 #ifndef USE_IO_OPS
1834 	iounmap((void *)ioaddr);
1835 
1836 err_out_free_res:
1837 #endif
1838 	pci_release_regions (pdev);
1839 
1840 err_out_free_netdev:
1841 	kfree (dev);
1842 	return -ENODEV;
1843 }
1844 
1845 
1846 #ifdef CONFIG_PM
1847 
tulip_suspend(struct pci_dev * pdev,u32 state)1848 static int tulip_suspend (struct pci_dev *pdev, u32 state)
1849 {
1850 	struct net_device *dev = pci_get_drvdata(pdev);
1851 
1852 	if (dev && netif_running (dev) && netif_device_present (dev)) {
1853 		netif_device_detach (dev);
1854 		tulip_down (dev);
1855 		/* pci_power_off(pdev, -1); */
1856 	}
1857 	return 0;
1858 }
1859 
1860 
tulip_resume(struct pci_dev * pdev)1861 static int tulip_resume(struct pci_dev *pdev)
1862 {
1863 	struct net_device *dev = pci_get_drvdata(pdev);
1864 
1865 	if (dev && netif_running (dev) && !netif_device_present (dev)) {
1866 #if 1
1867 		pci_enable_device (pdev);
1868 #endif
1869 		/* pci_power_on(pdev); */
1870 		tulip_up (dev);
1871 		netif_device_attach (dev);
1872 	}
1873 	return 0;
1874 }
1875 
1876 #endif /* CONFIG_PM */
1877 
1878 
tulip_remove_one(struct pci_dev * pdev)1879 static void __devexit tulip_remove_one (struct pci_dev *pdev)
1880 {
1881 	struct net_device *dev = pci_get_drvdata (pdev);
1882 	struct tulip_private *tp;
1883 
1884 	if (!dev)
1885 		return;
1886 
1887 	tp = dev->priv;
1888 	unregister_netdev (dev);
1889 	pci_free_consistent (pdev,
1890 			     sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
1891 			     sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
1892 			     tp->rx_ring, tp->rx_ring_dma);
1893 	if (tp->mtable)
1894 		kfree (tp->mtable);
1895 #ifndef USE_IO_OPS
1896 	iounmap((void *)dev->base_addr);
1897 #endif
1898 	kfree (dev);
1899 	pci_release_regions (pdev);
1900 	pci_set_drvdata (pdev, NULL);
1901 
1902 	/* pci_power_off (pdev, -1); */
1903 }
1904 
1905 
1906 static struct pci_driver tulip_driver = {
1907 	name:		DRV_NAME,
1908 	id_table:	tulip_pci_tbl,
1909 	probe:		tulip_init_one,
1910 	remove:		__devexit_p(tulip_remove_one),
1911 #ifdef CONFIG_PM
1912 	suspend:	tulip_suspend,
1913 	resume:		tulip_resume,
1914 #endif /* CONFIG_PM */
1915 };
1916 
1917 
tulip_init(void)1918 static int __init tulip_init (void)
1919 {
1920 #ifdef MODULE
1921 	printk (KERN_INFO "%s", version);
1922 #endif
1923 
1924 	/* copy module parms into globals */
1925 	tulip_rx_copybreak = rx_copybreak;
1926 	tulip_max_interrupt_work = max_interrupt_work;
1927 
1928 	/* probe for and init boards */
1929 	return pci_module_init (&tulip_driver);
1930 }
1931 
1932 
tulip_cleanup(void)1933 static void __exit tulip_cleanup (void)
1934 {
1935 	pci_unregister_driver (&tulip_driver);
1936 }
1937 
1938 
1939 module_init(tulip_init);
1940 module_exit(tulip_cleanup);
1941