1 #ifndef _saa7191_h_ 2 #define _saa7191_h_ 3 4 /* Phillips SAA7191 DMSD I2C bus address */ 5 #define SAA7191_ADDR 0x8a 6 7 /* Register subaddresses. */ 8 #define SAA7191_REG_IDEL 0x00 9 #define SAA7191_REG_HSYB 0x01 10 #define SAA7191_REG_HSYS 0x02 11 #define SAA7191_REG_HCLB 0x03 12 #define SAA7191_REG_HCLS 0x04 13 #define SAA7191_REG_HPHI 0x05 14 #define SAA7191_REG_LUMA 0x06 15 #define SAA7191_REG_HUEC 0x07 16 #define SAA7191_REG_CKTQ 0x08 17 #define SAA7191_REG_CKTS 0x09 18 #define SAA7191_REG_PLSE 0x0a 19 #define SAA7191_REG_SESE 0x0b 20 #define SAA7191_REG_GAIN 0x0c 21 #define SAA7191_REG_STDC 0x0d 22 #define SAA7191_REG_IOCK 0x0e 23 #define SAA7191_REG_CTL3 0x0f 24 #define SAA7191_REG_CTL4 0x10 25 #define SAA7191_REG_CHCV 0x11 26 #define SAA7191_REG_HS6B 0x14 27 #define SAA7191_REG_HS6S 0x15 28 #define SAA7191_REG_HC6B 0x16 29 #define SAA7191_REG_HC6S 0x17 30 #define SAA7191_REG_HP6I 0x18 31 #define SAA7191_REG_STATUS 0xff /* not really a subaddress */ 32 33 /* Status Register definitions */ 34 #define SAA7191_STATUS_CODE 0x01 /* color detected flag */ 35 #define SAA7191_STATUS_FIDT 0x20 /* format type NTSC/PAL */ 36 #define SAA7191_STATUS_HLCK 0x40 /* PLL unlocked/locked */ 37 #define SAA7191_STATUS_STTC 0x80 /* tv/vtr time constant */ 38 39 /* Luminance Control Register definitions */ 40 #define SAA7191_LUMA_BYPS 0x80 41 42 /* I/O and Clock Control Register definitions */ 43 #define SAA7191_IOCK_HPLL 0x80 44 #define SAA7191_IOCK_CHRS 0x04 45 46 #endif 47