1 /*
2 * linux/arch/x86-64/kernel/time.c
3 *
4 * "High Precision Event Timer" based timekeeping.
5 *
6 * Copyright (c) 1991,1992,1995 Linus Torvalds
7 * Copyright (c) 1994 Alan Modra
8 * Copyright (c) 1995 Markus Kuhn
9 * Copyright (c) 1996 Ingo Molnar
10 * Copyright (c) 1998 Andrea Arcangeli
11 * Copyright (c) 2002 Vojtech Pavlik
12 *
13 */
14
15 #include <linux/kernel.h>
16 #include <linux/sched.h>
17 #include <linux/interrupt.h>
18 #include <linux/init.h>
19 #include <linux/mc146818rtc.h>
20 #include <linux/irq.h>
21 #include <linux/ioport.h>
22 #include <asm/vsyscall.h>
23 #include <asm/timex.h>
24
25 extern rwlock_t xtime_lock;
26 spinlock_t rtc_lock = SPIN_LOCK_UNLOCKED;
27 spinlock_t i8253_lock = SPIN_LOCK_UNLOCKED;
28
29 unsigned int cpu_khz; /* TSC clocks / usec, not used here */
30 unsigned long hpet_address;
31 unsigned long hpet_period; /* fsecs / HPET clock */
32 unsigned int hpet_tick; /* HPET clocks / interrupt */
33 unsigned long vxtime_hz = 1193182;
34 int report_lost_ticks; /* command line option */
35
36 struct vxtime_data __vxtime __section_vxtime; /* data for vsyscall */
37
38 volatile unsigned long __jiffies __section_jiffies;
39 unsigned long __wall_jiffies __section_wall_jiffies;
40 struct timeval __xtime __section_xtime;
41 struct timezone __sys_tz __section_sys_tz;
42
rdtscll_sync(unsigned long * tsc)43 static inline void rdtscll_sync(unsigned long *tsc)
44 {
45 sync_core();
46 rdtscll(*tsc);
47 }
48
49 /*
50 * do_gettimeoffset() returns microseconds since last timer interrupt was
51 * triggered by hardware.
52 */
53
54 extern spinlock_t i8259A_lock;
55
56 /* This function must be called with interrupts disabled
57 * It was inspired by Steve McCanne's microtime-i386 for BSD. -- jrs
58 *
59 * However, the pc-audio speaker driver changes the divisor so that
60 * it gets interrupted rather more often - it loads 64 into the
61 * counter rather than 11932! This has an adverse impact on
62 * do_gettimeoffset() -- it stops working! What is also not
63 * good is that the interval that our timer function gets called
64 * is no longer 10.0002 ms, but 9.9767 ms. To get around this
65 * would require using a different timing source. Maybe someone
66 * could use the RTC - I know that this can interrupt at frequencies
67 * ranging from 8192Hz to 2Hz. If I had the energy, I'd somehow fix
68 * it so that at startup, the timer code in sched.c would select
69 * using either the RTC or the 8253 timer. The decision would be
70 * based on whether there was any other device around that needed
71 * to trample on the 8253. I'd set up the RTC to interrupt at 1024 Hz,
72 * and then do some jiggery to have a version of do_timer that
73 * advanced the clock by 1/1024 s. Every time that reached over 1/100
74 * of a second, then do all the old code. If the time was kept correct
75 * then do_gettimeoffset could just return 0 - there is no low order
76 * divider that can be accessed.
77 *
78 * Ideally, you would be able to use the RTC for the speaker driver,
79 * but it appears that the speaker driver really needs interrupt more
80 * often than every 120 us or so.
81 *
82 * Anyway, this needs more thought.... pjsg (1993-08-28)
83 *
84 * If you are really that interested, you should be reading
85 * comp.protocols.time.ntp!
86 *
87 * X86_64 port from arch/i386/kernel/time.c - KS (2007-03-12)
88 */
89
do_slow_gettimeoffset(void)90 static unsigned long do_slow_gettimeoffset(void)
91 {
92 int count;
93
94 static int count_p = -1; /* for the first call after boot */
95 static unsigned long jiffies_p = 0;
96
97 /*
98 * cache volatile jiffies temporarily; we have IRQs turned off.
99 */
100 unsigned long jiffies_t;
101
102 if (count_p < 0)
103 count_p = LATCH; /* LATCH is not a constant on x86_64 */
104
105 /* gets recalled with irq locally disabled */
106 spin_lock(&i8253_lock);
107 /* timer count may underflow right here */
108 outb_p(0x00, 0x43); /* latch the count ASAP */
109
110 count = inb_p(0x40); /* read the latched count */
111
112 /*
113 * We do this guaranteed double memory access instead of a _p
114 * postfix in the previous port access. Wheee, hackady hack
115 */
116 jiffies_t = jiffies;
117
118 count |= inb_p(0x40) << 8;
119
120 /* VIA686a test code... reset the latch if count > max + 1 */
121 if (count > LATCH) {
122 outb_p(0x34, 0x43);
123 outb_p(LATCH & 0xff, 0x40);
124 outb(LATCH >> 8, 0x40);
125 count = LATCH - 1;
126 }
127
128 spin_unlock(&i8253_lock);
129
130 /*
131 * avoiding timer inconsistencies (they are rare, but they happen)...
132 * there are two kinds of problems that must be avoided here:
133 * 1. the timer counter underflows
134 * 2. hardware problem with the timer, not giving us continuous time,
135 * the counter does small "jumps" upwards on some Pentium systems,
136 * (see c't 95/10 page 335 for Neptun bug.)
137 */
138
139 if( jiffies_t == jiffies_p ) {
140 if( count > count_p ) {
141 /* the nutcase */
142
143 int i;
144
145 spin_lock(&i8259A_lock);
146 /*
147 * This is tricky when I/O APICs are used;
148 * see do_timer_interrupt().
149 */
150 i = inb(0x20);
151 spin_unlock(&i8259A_lock);
152
153 /* assumption about timer being IRQ0 */
154 if (i & 0x01) {
155 /*
156 * We cannot detect lost timer interrupts ...
157 * well, that's why we call them lost, don't we? :)
158 * [hmm, on the Pentium and Alpha we can ... sort of]
159 */
160 count -= LATCH;
161 } else
162 printk("do_slow_gettimeoffset(): hardware timer problem?\n");
163 }
164 } else
165 jiffies_p = jiffies_t;
166
167 count_p = count;
168
169 count = ((LATCH-1) - count) * tick;
170 count = (count + LATCH/2) / LATCH;
171
172 return count;
173 }
174
do_gettimeoffset_tsc(void)175 static unsigned int do_gettimeoffset_tsc(void)
176 {
177 unsigned long t;
178 rdtscll_sync(&t);
179 return ((t - vxtime.last_tsc) * vxtime.tsc_quot) >> 32;
180 }
181
do_gettimeoffset_hpet(void)182 static unsigned int do_gettimeoffset_hpet(void)
183 {
184 return ((hpet_readl(HPET_COUNTER) - vxtime.last) * vxtime.quot) >> 32;
185 }
186
do_gettimeoffset_pit(void)187 static unsigned int do_gettimeoffset_pit(void)
188 {
189 unsigned long usec, flags;
190 read_lock_irqsave(&xtime_lock, flags);
191 usec = do_slow_gettimeoffset();
192 read_unlock_irqrestore(&xtime_lock, flags);
193 return usec;
194 }
195
196 unsigned int (*do_gettimeoffset)(void) = do_gettimeoffset_tsc;
197
198 /*
199 * This version of gettimeofday() has microsecond resolution and better than
200 * microsecond precision, as we're using at least a 10 MHz (usually 14.31818
201 * MHz) HPET timer.
202 */
203
do_gettimeofday(struct timeval * tv)204 void do_gettimeofday(struct timeval *tv)
205 {
206 unsigned long sequence;
207 unsigned int sec, usec;
208
209 do {
210 sequence = __vxtime_sequence[1];
211 rmb();
212
213 sec = xtime.tv_sec;
214 usec = xtime.tv_usec
215 + (jiffies - wall_jiffies) * tick
216 + do_gettimeoffset();
217
218 rmb();
219 } while (sequence != __vxtime_sequence[0]);
220
221 tv->tv_sec = sec + usec / 1000000;
222 tv->tv_usec = usec % 1000000;
223 }
224
225 /*
226 * settimeofday() first undoes the correction that gettimeofday would do
227 * on the time, and then saves it. This is ugly, but has been like this for
228 * ages already.
229 */
230
do_settimeofday(struct timeval * tv)231 void do_settimeofday(struct timeval *tv)
232 {
233 write_lock_irq(&xtime_lock);
234 vxtime_lock();
235
236 tv->tv_usec -= (jiffies - wall_jiffies) * tick
237 + do_gettimeoffset();
238
239 while (tv->tv_usec < 0) {
240 tv->tv_usec += 1000000;
241 tv->tv_sec--;
242 }
243
244 xtime = *tv;
245 vxtime_unlock();
246
247 time_adjust = 0; /* stop active adjtime() */
248 time_status |= STA_UNSYNC;
249 time_maxerror = NTP_PHASE_LIMIT;
250 time_esterror = NTP_PHASE_LIMIT;
251
252 write_unlock_irq(&xtime_lock);
253 }
254
255 /*
256 * In order to set the CMOS clock precisely, set_rtc_mmss has to be called 500
257 * ms after the second nowtime has started, because when nowtime is written
258 * into the registers of the CMOS clock, it will jump to the next second
259 * precisely 500 ms later. Check the Motorola MC146818A or Dallas DS12887 data
260 * sheet for details.
261 */
262
set_rtc_mmss(unsigned long nowtime)263 static void set_rtc_mmss(unsigned long nowtime)
264 {
265 int real_seconds, real_minutes, cmos_minutes;
266 unsigned char control, freq_select;
267
268 /*
269 * IRQs are disabled when we're called from the timer interrupt,
270 * no need for spin_lock_irqsave()
271 */
272
273 spin_lock(&rtc_lock);
274
275 /*
276 * Tell the clock it's being set and stop it.
277 */
278
279 control = CMOS_READ(RTC_CONTROL);
280 CMOS_WRITE(control | RTC_SET, RTC_CONTROL);
281
282 freq_select = CMOS_READ(RTC_FREQ_SELECT);
283 CMOS_WRITE(freq_select | RTC_DIV_RESET2, RTC_FREQ_SELECT);
284
285 cmos_minutes = CMOS_READ(RTC_MINUTES);
286 BCD_TO_BIN(cmos_minutes);
287
288 /*
289 * since we're only adjusting minutes and seconds, don't interfere with hour
290 * overflow. This avoids messing with unknown time zones but requires your RTC
291 * not to be off by more than 15 minutes. Since we're calling it only when
292 * our clock is externally synchronized using NTP, this shouldn't be a problem.
293 */
294
295 real_seconds = nowtime % 60;
296 real_minutes = nowtime / 60;
297 if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
298 real_minutes += 30; /* correct for half hour time zone */
299 real_minutes %= 60;
300
301 if (abs(real_minutes - cmos_minutes) < 30) {
302 BIN_TO_BCD(real_seconds);
303 BIN_TO_BCD(real_minutes);
304 CMOS_WRITE(real_seconds, RTC_SECONDS);
305 CMOS_WRITE(real_minutes, RTC_MINUTES);
306 } else
307 printk(KERN_WARNING "time.c: can't update CMOS clock from %d to %d\n",
308 cmos_minutes, real_minutes);
309
310 /*
311 * The following flags have to be released exactly in this order, otherwise the
312 * DS12887 (popular MC146818A clone with integrated battery and quartz) will
313 * not reset the oscillator and will not update precisely 500 ms later. You
314 * won't find this mentioned in the Dallas Semiconductor data sheets, but who
315 * believes data sheets anyway ... -- Markus Kuhn
316 */
317
318 CMOS_WRITE(control, RTC_CONTROL);
319 CMOS_WRITE(freq_select, RTC_FREQ_SELECT);
320
321 spin_unlock(&rtc_lock);
322 }
323
timer_interrupt(int irq,void * dev_id,struct pt_regs * regs)324 static void timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
325 {
326 static unsigned long rtc_update = 0;
327
328 /*
329 * Here we are in the timer irq handler. We have irqs locally disabled (so we
330 * don't need spin_lock_irqsave()) but we don't know if the timer_bh is running
331 * on the other CPU, so we need a lock. We also need to lock the vsyscall
332 * variables, because both do_timer() and us change them -arca+vojtech
333 */
334
335 write_lock(&xtime_lock);
336 vxtime_lock();
337
338 {
339 long tsc;
340 int delay, offset = 0;
341
342 if (hpet_address) {
343
344 offset = hpet_readl(HPET_T0_CMP) - hpet_tick;
345 delay = hpet_readl(HPET_COUNTER) - offset;
346
347 } else {
348
349 spin_lock(&i8253_lock);
350 outb_p(0x00, 0x43);
351 delay = inb_p(0x40);
352 delay |= inb(0x40) << 8;
353 spin_unlock(&i8253_lock);
354 delay = LATCH - 1 - delay;
355 }
356
357 rdtscll_sync(&tsc);
358
359 if (vxtime.mode == VXTIME_HPET) {
360
361 if (offset - vxtime.last > hpet_tick) {
362 if (report_lost_ticks)
363 printk(KERN_WARNING "time.c: Lost %d timer tick(s)! (rip %016lx)\n",
364 (offset - vxtime.last) / hpet_tick - 1, regs->rip);
365 jiffies += (offset - vxtime.last) / hpet_tick - 1;
366 }
367
368 vxtime.last = offset;
369
370 } else {
371
372 offset = (((tsc - vxtime.last_tsc) * vxtime.tsc_quot) >> 32) - tick;
373
374 if (offset > tick) {
375 if (report_lost_ticks)
376 printk(KERN_WARNING "time.c: lost %ld tick(s) (rip %016lx)\n",
377 offset / tick, regs->rip);
378 jiffies += offset / tick;
379 offset %= tick;
380 }
381
382 vxtime.last_tsc = tsc - vxtime.quot * delay / vxtime.tsc_quot;
383
384 if ((((tsc - vxtime.last_tsc) * vxtime.tsc_quot) >> 32) < offset)
385 vxtime.last_tsc = tsc - (((long)offset << 32) / vxtime.tsc_quot) - 1;
386
387 }
388 }
389
390 /*
391 * Do the timer stuff.
392 */
393
394 do_timer(regs);
395
396 /*
397 * If we have an externally synchronized Linux clock, then update CMOS clock
398 * accordingly every ~11 minutes. set_rtc_mmss() will be called in the jiffy
399 * closest to exactly 500 ms before the next second. If the update fails, we
400 * don'tcare, as it'll be updated on the next turn, and the problem (time way
401 * off) isn't likely to go away much sooner anyway.
402 */
403
404 if ((~time_status & STA_UNSYNC) && xtime.tv_sec > rtc_update &&
405 abs(xtime.tv_usec - 500000) <= tick / 2) {
406 set_rtc_mmss(xtime.tv_sec);
407 rtc_update = xtime.tv_sec + 660;
408 }
409
410 vxtime_unlock();
411 write_unlock(&xtime_lock);
412 }
413
get_cmos_time(void)414 static unsigned long get_cmos_time(void)
415 {
416 unsigned int timeout, year, mon, day, hour, min, sec;
417 unsigned char last, this;
418
419 /*
420 * The Linux interpretation of the CMOS clock register contents: When the
421 * Update-In-Progress (UIP) flag goes from 1 to 0, the RTC registers show the
422 * second which has precisely just started. Waiting for this can take up to 1
423 * second, we timeout approximately after 2.4 seconds on a machine with
424 * standard 8.3 MHz ISA bus.
425 */
426
427 spin_lock(&rtc_lock);
428
429 timeout = 1000000;
430 last = this = 0;
431
432 while (timeout && last && !this) {
433 last = this;
434 this = CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP;
435 timeout--;
436 }
437
438 /*
439 * Here we are safe to assume the registers won't change for a whole second, so
440 * we just go ahead and read them.
441 */
442
443 sec = CMOS_READ(RTC_SECONDS);
444 min = CMOS_READ(RTC_MINUTES);
445 hour = CMOS_READ(RTC_HOURS);
446 day = CMOS_READ(RTC_DAY_OF_MONTH);
447 mon = CMOS_READ(RTC_MONTH);
448 year = CMOS_READ(RTC_YEAR);
449
450 spin_unlock(&rtc_lock);
451
452 /*
453 * We know that x86-64 always uses BCD format, no need to check the config
454 * register.
455 */
456
457 BCD_TO_BIN(sec);
458 BCD_TO_BIN(min);
459 BCD_TO_BIN(hour);
460 BCD_TO_BIN(day);
461 BCD_TO_BIN(mon);
462 BCD_TO_BIN(year);
463
464 /*
465 * This will work up to Dec 31, 2069.
466 */
467
468 if ((year += 1900) < 1970)
469 year += 100;
470
471 return mktime(year, mon, day, hour, min, sec);
472 }
473
474 /*
475 * calibrate_tsc() calibrates the processor TSC in a very simple way, comparing
476 * it to the HPET timer of known frequency.
477 */
478
479 #define TICK_COUNT 100000000
480
hpet_calibrate_tsc(void)481 static unsigned int __init hpet_calibrate_tsc(void)
482 {
483 int tsc_start, hpet_start;
484 int tsc_now, hpet_now;
485 unsigned long flags;
486
487 __save_flags(flags);
488 __cli();
489
490 hpet_start = hpet_readl(HPET_COUNTER);
491 rdtscl(tsc_start);
492
493 do {
494 __cli();
495 hpet_now = hpet_readl(HPET_COUNTER);
496 sync_core();
497 rdtscl(tsc_now);
498 __restore_flags(flags);
499 } while ((tsc_now - tsc_start) < TICK_COUNT && (hpet_now - hpet_start) < TICK_COUNT);
500
501 return (tsc_now - tsc_start) * 1000000000L
502 / ((hpet_now - hpet_start) * hpet_period / 1000);
503 }
504
505 /*
506 * pit_calibrate_tsc() uses the speaker output (channel 2) of
507 * the PIT. This is better than using the timer interrupt output,
508 * because we can read the value of the speaker with just one inb(),
509 * where we need three i/o operations for the interrupt channel.
510 * We count how many ticks the TSC does in 50 ms.
511 */
512
pit_calibrate_tsc(void)513 static unsigned int __init pit_calibrate_tsc(void)
514 {
515 unsigned long start, end;
516
517 outb((inb(0x61) & ~0x02) | 0x01, 0x61);
518
519 spin_lock_irq(&i8253_lock);
520
521 outb(0xb0, 0x43);
522 outb((1193182 / (1000 / 50)) & 0xff, 0x42);
523 outb((1193182 / (1000 / 50)) >> 8, 0x42);
524 rdtscll(start);
525
526 while ((inb(0x61) & 0x20) == 0);
527 rdtscll(end);
528
529 spin_unlock_irq(&i8253_lock);
530
531 return (end - start) / 50;
532 }
533
hpet_init(void)534 static int hpet_init(void)
535 {
536 unsigned int cfg, id;
537
538 if (!hpet_address)
539 return -1;
540 set_fixmap_nocache(FIX_HPET_BASE, hpet_address);
541
542 /*
543 * Read the period, compute tick and quotient.
544 */
545
546 id = hpet_readl(HPET_ID);
547
548 if (!(id & HPET_ID_VENDOR) || !(id & HPET_ID_NUMBER) || !(id & HPET_ID_LEGSUP))
549 return -1;
550
551 hpet_period = hpet_readl(HPET_PERIOD);
552 if (hpet_period < 100000 || hpet_period > 100000000)
553 return -1;
554
555 hpet_tick = (1000000000L * tick + hpet_period / 2) / hpet_period;
556
557 /*
558 * Stop the timers and reset the main counter.
559 */
560
561 cfg = hpet_readl(HPET_CFG);
562 cfg &= ~(HPET_CFG_ENABLE | HPET_CFG_LEGACY);
563 hpet_writel(cfg, HPET_CFG);
564 hpet_writel(0, HPET_COUNTER);
565 hpet_writel(0, HPET_COUNTER + 4);
566
567 /*
568 * Set up timer 0, as periodic with first interrupt to happen at hpet_tick,
569 * and period also hpet_tick.
570 */
571
572 hpet_writel(HPET_T0_ENABLE | HPET_T0_PERIODIC | HPET_T0_SETVAL | HPET_T0_32BIT, HPET_T0_CFG);
573 hpet_writel(hpet_tick, HPET_T0_CMP);
574 hpet_writel(hpet_tick, HPET_T0_CMP);
575
576 /*
577 * Go!
578 */
579
580 cfg |= HPET_CFG_ENABLE | HPET_CFG_LEGACY;
581 hpet_writel(cfg, HPET_CFG);
582
583 return 0;
584 }
585
pit_init(void)586 void __init pit_init(void)
587 {
588 spin_lock_irq(&i8253_lock);
589 outb_p(0x34, 0x43); /* binary, mode 2, LSB/MSB, ch 0 */
590 outb_p(LATCH & 0xff, 0x40); /* LSB */
591 outb_p(LATCH >> 8, 0x40); /* MSB */
592 spin_unlock_irq(&i8253_lock);
593 }
594
time_setup(char * str)595 static int __init time_setup(char *str)
596 {
597 report_lost_ticks = 1;
598 return 1;
599 }
600
601 /* Only used on SMP */
602 static int notsc __initdata = 0;
603
notsc_setup(char * str)604 static int __init notsc_setup(char *str)
605 {
606 #ifdef CONFIG_SMP
607 printk(KERN_INFO "notsc ignored on non SMP kernel\n");
608 #endif
609 notsc = 1;
610 return 1;
611 }
612
613 static struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, 0, "timer", NULL, NULL};
614
time_init(void)615 void __init time_init(void)
616 {
617 char *timename;
618
619 #ifdef HPET_HACK_ENABLE_DANGEROUS
620 if (!hpet_address) {
621 printk(KERN_WARNING "time.c: WARNING: Enabling HPET base manually!\n");
622 outl(0x800038a0, 0xcf8);
623 outl(0xff000001, 0xcfc);
624 outl(0x800038a0, 0xcf8);
625 hpet_address = inl(0xcfc) & 0xfffffffe;
626 printk(KERN_WARNING "time.c: WARNING: Enabled HPET at at %#lx.\n", hpet_address);
627 }
628 #endif
629
630 #ifndef CONFIG_HPET_TIMER
631 hpet_address = 0;
632 #endif
633
634 write_lock(&xtime_lock);
635 xtime.tv_sec = get_cmos_time();
636 xtime.tv_usec = 0;
637 write_unlock(&xtime_lock);
638
639 if (!hpet_init()) {
640 vxtime_hz = (1000000000000000L + hpet_period / 2) / hpet_period;
641 cpu_khz = hpet_calibrate_tsc();
642 timename = "HPET";
643 } else {
644 pit_init();
645 cpu_khz = pit_calibrate_tsc();
646 timename = "PIT";
647 }
648
649 vxtime.mode = VXTIME_TSC;
650 vxtime.quot = (1000000L << 32) / vxtime_hz;
651 vxtime.tsc_quot = (1000L << 32) / cpu_khz;
652 rdtscll_sync(&vxtime.last_tsc);
653
654 setup_irq(0, &irq0);
655
656 printk(KERN_INFO "time.c: Detected %ld.%06ld MHz %s timer.\n",
657 vxtime_hz / 1000000, vxtime_hz % 1000000, timename);
658 printk(KERN_INFO "time.c: Detected %d.%03d MHz TSC timer.\n",
659 cpu_khz / 1000, cpu_khz % 1000);
660 }
661
time_init_smp(void)662 void __init time_init_smp(void)
663 {
664 char *timetype;
665
666 if (hpet_address) {
667 if (notsc) {
668 timetype = "HPET";
669 vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick;
670 vxtime.mode = VXTIME_HPET;
671 do_gettimeoffset = do_gettimeoffset_hpet;
672 } else {
673 timetype = "HPET/TSC";
674 vxtime.mode = VXTIME_TSC;
675 }
676 } else {
677 if (notsc) {
678 timetype = "PIT";
679 vxtime.mode = VXTIME_STUPID;
680 do_gettimeoffset = do_gettimeoffset_pit;
681 } else {
682 timetype = "PIT/TSC";
683 vxtime.mode = VXTIME_TSC;
684 }
685 }
686 printk(KERN_INFO "time.c: Using %s based timekeeping.\n", timetype);
687 }
688
689 __setup("notsc", notsc_setup);
690 __setup("report_lost_ticks", time_setup);
691
692