1 /* sun4d_smp.c: Sparc SS1000/SC2000 SMP support.
2 *
3 * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
4 *
5 * Based on sun4m's smp.c, which is:
6 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
7 */
8
9 #include <asm/head.h>
10
11 #include <linux/kernel.h>
12 #include <linux/sched.h>
13 #include <linux/threads.h>
14 #include <linux/smp.h>
15 #include <linux/smp_lock.h>
16 #include <linux/interrupt.h>
17 #include <linux/kernel_stat.h>
18 #include <linux/init.h>
19 #include <linux/spinlock.h>
20 #include <linux/mm.h>
21
22 #include <asm/ptrace.h>
23 #include <asm/atomic.h>
24
25 #include <asm/delay.h>
26 #include <asm/irq.h>
27 #include <asm/page.h>
28 #include <asm/pgalloc.h>
29 #include <asm/pgtable.h>
30 #include <asm/oplib.h>
31 #include <asm/hardirq.h>
32 #include <asm/softirq.h>
33 #include <asm/sbus.h>
34 #include <asm/sbi.h>
35
36 #define __KERNEL_SYSCALLS__
37 #include <linux/unistd.h>
38
39 #define IRQ_CROSS_CALL 15
40
41 extern ctxd_t *srmmu_ctx_table_phys;
42 extern int linux_num_cpus;
43
44 extern void calibrate_delay(void);
45
46 extern struct task_struct *current_set[NR_CPUS];
47 extern volatile int smp_processors_ready;
48 extern unsigned long cpu_present_map;
49 extern int smp_num_cpus;
50 static int smp_highest_cpu;
51 extern int smp_threads_ready;
52 extern unsigned char mid_xlate[NR_CPUS];
53 extern volatile unsigned long cpu_callin_map[NR_CPUS];
54 extern unsigned long smp_proc_in_lock[NR_CPUS];
55 extern struct cpuinfo_sparc cpu_data[NR_CPUS];
56 extern unsigned long cpu_offset[NR_CPUS];
57 extern unsigned char boot_cpu_id;
58 extern int smp_activated;
59 extern volatile int __cpu_number_map[NR_CPUS];
60 extern volatile int __cpu_logical_map[NR_CPUS];
61 extern volatile unsigned long ipi_count;
62 extern volatile int smp_process_available;
63 extern volatile int smp_commenced;
64 extern int __smp4d_processor_id(void);
65
66 extern unsigned long totalram_pages;
67
68 /* #define SMP_DEBUG */
69
70 #ifdef SMP_DEBUG
71 #define SMP_PRINTK(x) printk x
72 #else
73 #define SMP_PRINTK(x)
74 #endif
75
swap(volatile unsigned long * ptr,unsigned long val)76 static inline unsigned long swap(volatile unsigned long *ptr, unsigned long val)
77 {
78 __asm__ __volatile__("swap [%1], %0\n\t" :
79 "=&r" (val), "=&r" (ptr) :
80 "0" (val), "1" (ptr));
81 return val;
82 }
83
84 static void smp_setup_percpu_timer(void);
85 extern void cpu_probe(void);
86 extern void sun4d_distribute_irqs(void);
87
smp4d_callin(void)88 void __init smp4d_callin(void)
89 {
90 int cpuid = hard_smp4d_processor_id();
91 extern spinlock_t sun4d_imsk_lock;
92 unsigned long flags;
93
94 /* Show we are alive */
95 cpu_leds[cpuid] = 0x6;
96 show_leds(cpuid);
97
98 /* Enable level15 interrupt, disable level14 interrupt for now */
99 cc_set_imsk((cc_get_imsk() & ~0x8000) | 0x4000);
100
101 local_flush_cache_all();
102 local_flush_tlb_all();
103
104 /*
105 * Unblock the master CPU _only_ when the scheduler state
106 * of all secondary CPUs will be up-to-date, so after
107 * the SMP initialization the master will be just allowed
108 * to call the scheduler code.
109 */
110 init_idle();
111
112 /* Get our local ticker going. */
113 smp_setup_percpu_timer();
114
115 calibrate_delay();
116 smp_store_cpu_info(cpuid);
117 local_flush_cache_all();
118 local_flush_tlb_all();
119
120 /* Allow master to continue. */
121 swap((unsigned long *)&cpu_callin_map[cpuid], 1);
122 local_flush_cache_all();
123 local_flush_tlb_all();
124
125 cpu_probe();
126
127 while((unsigned long)current_set[cpuid] < PAGE_OFFSET)
128 barrier();
129
130 while(current_set[cpuid]->processor != cpuid)
131 barrier();
132
133 /* Fix idle thread fields. */
134 __asm__ __volatile__("ld [%0], %%g6\n\t"
135 : : "r" (¤t_set[cpuid])
136 : "memory" /* paranoid */);
137
138 cpu_leds[cpuid] = 0x9;
139 show_leds(cpuid);
140
141 /* Attach to the address space of init_task. */
142 atomic_inc(&init_mm.mm_count);
143 current->active_mm = &init_mm;
144
145 local_flush_cache_all();
146 local_flush_tlb_all();
147
148 __sti(); /* We don't allow PIL 14 yet */
149
150 while(!smp_commenced)
151 barrier();
152
153 spin_lock_irqsave(&sun4d_imsk_lock, flags);
154 cc_set_imsk(cc_get_imsk() & ~0x4000); /* Allow PIL 14 as well */
155 spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
156 }
157
158 extern int cpu_idle(void *unused);
159 extern void init_IRQ(void);
160 extern void cpu_panic(void);
161 extern int start_secondary(void *unused);
162
163 /*
164 * Cycle through the processors asking the PROM to start each one.
165 */
166
167 extern struct prom_cpuinfo linux_cpus[NR_CPUS];
168 extern struct linux_prom_registers smp_penguin_ctable;
169 extern unsigned long trapbase_cpu1[];
170 extern unsigned long trapbase_cpu2[];
171 extern unsigned long trapbase_cpu3[];
172
smp4d_boot_cpus(void)173 void __init smp4d_boot_cpus(void)
174 {
175 int cpucount = 0;
176 int i = 0;
177
178 printk("Entering SMP Mode...\n");
179
180 for (i = 0; i < NR_CPUS; i++)
181 cpu_offset[i] = (char *)&cpu_data[i] - (char *)&cpu_data;
182
183 if (boot_cpu_id)
184 current_set[0] = NULL;
185
186 __sti();
187 cpu_present_map = 0;
188 for(i=0; i < linux_num_cpus; i++)
189 cpu_present_map |= (1<<linux_cpus[i].mid);
190 SMP_PRINTK(("cpu_present_map %08lx\n", cpu_present_map));
191 for(i=0; i < NR_CPUS; i++)
192 __cpu_number_map[i] = -1;
193 for(i=0; i < NR_CPUS; i++)
194 __cpu_logical_map[i] = -1;
195 for(i=0; i < NR_CPUS; i++)
196 mid_xlate[i] = i;
197 __cpu_number_map[boot_cpu_id] = 0;
198 __cpu_logical_map[0] = boot_cpu_id;
199 current->processor = boot_cpu_id;
200 smp_store_cpu_info(boot_cpu_id);
201 smp_setup_percpu_timer();
202 init_idle();
203 local_flush_cache_all();
204 if(linux_num_cpus == 1)
205 return; /* Not an MP box. */
206 SMP_PRINTK(("Iterating over CPUs\n"));
207 for(i = 0; i < NR_CPUS; i++) {
208 if(i == boot_cpu_id)
209 continue;
210
211 if(cpu_present_map & (1 << i)) {
212 extern unsigned long sun4d_cpu_startup;
213 unsigned long *entry = &sun4d_cpu_startup;
214 struct task_struct *p;
215 int timeout;
216 int no;
217
218 /* Cook up an idler for this guy. */
219 kernel_thread(start_secondary, NULL, CLONE_PID);
220
221 cpucount++;
222
223 p = init_task.prev_task;
224 init_tasks[i] = p;
225
226 p->processor = i;
227 p->cpus_runnable = 1 << i; /* we schedule the first task manually */
228
229 current_set[i] = p;
230
231 del_from_runqueue(p);
232 unhash_process(p);
233
234 for (no = 0; no < linux_num_cpus; no++)
235 if (linux_cpus[no].mid == i)
236 break;
237
238 /*
239 * Initialize the contexts table
240 * Since the call to prom_startcpu() trashes the structure,
241 * we need to re-initialize it for each cpu
242 */
243 smp_penguin_ctable.which_io = 0;
244 smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
245 smp_penguin_ctable.reg_size = 0;
246
247 /* whirrr, whirrr, whirrrrrrrrr... */
248 SMP_PRINTK(("Starting CPU %d at %p task %d node %08x\n", i, entry, cpucount, linux_cpus[no].prom_node));
249 local_flush_cache_all();
250 prom_startcpu(linux_cpus[no].prom_node,
251 &smp_penguin_ctable, 0, (char *)entry);
252
253 SMP_PRINTK(("prom_startcpu returned :)\n"));
254
255 /* wheee... it's going... */
256 for(timeout = 0; timeout < 10000; timeout++) {
257 if(cpu_callin_map[i])
258 break;
259 udelay(200);
260 }
261
262 if(cpu_callin_map[i]) {
263 /* Another "Red Snapper". */
264 __cpu_number_map[i] = cpucount;
265 __cpu_logical_map[cpucount] = i;
266 } else {
267 cpucount--;
268 printk("Processor %d is stuck.\n", i);
269 }
270 }
271 if(!(cpu_callin_map[i])) {
272 cpu_present_map &= ~(1 << i);
273 __cpu_number_map[i] = -1;
274 }
275 }
276 local_flush_cache_all();
277 if(cpucount == 0) {
278 printk("Error: only one Processor found.\n");
279 cpu_present_map = (1 << hard_smp4d_processor_id());
280 } else {
281 unsigned long bogosum = 0;
282
283 for(i = 0; i < NR_CPUS; i++) {
284 if(cpu_present_map & (1 << i)) {
285 bogosum += cpu_data[i].udelay_val;
286 smp_highest_cpu = i;
287 }
288 }
289 SMP_PRINTK(("Total of %d Processors activated (%lu.%02lu BogoMIPS).\n", cpucount + 1, bogosum/(500000/HZ), (bogosum/(5000/HZ))%100));
290 printk("Total of %d Processors activated (%lu.%02lu BogoMIPS).\n",
291 cpucount + 1,
292 bogosum/(500000/HZ),
293 (bogosum/(5000/HZ))%100);
294 smp_activated = 1;
295 smp_num_cpus = cpucount + 1;
296 }
297
298 /* Free unneeded trap tables */
299 ClearPageReserved(virt_to_page(trapbase_cpu1));
300 set_page_count(virt_to_page(trapbase_cpu1), 1);
301 free_page((unsigned long)trapbase_cpu1);
302 totalram_pages++;
303 num_physpages++;
304
305 ClearPageReserved(virt_to_page(trapbase_cpu2));
306 set_page_count(virt_to_page(trapbase_cpu2), 1);
307 free_page((unsigned long)trapbase_cpu2);
308 totalram_pages++;
309 num_physpages++;
310
311 ClearPageReserved(virt_to_page(trapbase_cpu3));
312 set_page_count(virt_to_page(trapbase_cpu3), 1);
313 free_page((unsigned long)trapbase_cpu3);
314 totalram_pages++;
315 num_physpages++;
316
317 /* Ok, they are spinning and ready to go. */
318 smp_processors_ready = 1;
319 sun4d_distribute_irqs();
320 }
321
322 static struct smp_funcall {
323 smpfunc_t func;
324 unsigned long arg1;
325 unsigned long arg2;
326 unsigned long arg3;
327 unsigned long arg4;
328 unsigned long arg5;
329 unsigned char processors_in[NR_CPUS]; /* Set when ipi entered. */
330 unsigned char processors_out[NR_CPUS]; /* Set when ipi exited. */
331 } ccall_info __attribute__((aligned(8)));
332
333 static spinlock_t cross_call_lock = SPIN_LOCK_UNLOCKED;
334
335 /* Cross calls must be serialized, at least currently. */
smp4d_cross_call(smpfunc_t func,unsigned long arg1,unsigned long arg2,unsigned long arg3,unsigned long arg4,unsigned long arg5)336 void smp4d_cross_call(smpfunc_t func, unsigned long arg1, unsigned long arg2,
337 unsigned long arg3, unsigned long arg4, unsigned long arg5)
338 {
339 if(smp_processors_ready) {
340 register int high = smp_highest_cpu;
341 unsigned long flags;
342
343 spin_lock_irqsave(&cross_call_lock, flags);
344
345 {
346 /* If you make changes here, make sure gcc generates proper code... */
347 smpfunc_t f asm("i0") = func;
348 unsigned long a1 asm("i1") = arg1;
349 unsigned long a2 asm("i2") = arg2;
350 unsigned long a3 asm("i3") = arg3;
351 unsigned long a4 asm("i4") = arg4;
352 unsigned long a5 asm("i5") = arg5;
353
354 __asm__ __volatile__(
355 "std %0, [%6]\n\t"
356 "std %2, [%6 + 8]\n\t"
357 "std %4, [%6 + 16]\n\t" : :
358 "r"(f), "r"(a1), "r"(a2), "r"(a3), "r"(a4), "r"(a5),
359 "r" (&ccall_info.func));
360 }
361
362 /* Init receive/complete mapping, plus fire the IPI's off. */
363 {
364 register unsigned long mask;
365 register int i;
366
367 mask = (cpu_present_map & ~(1 << hard_smp4d_processor_id()));
368 for(i = 0; i <= high; i++) {
369 if(mask & (1 << i)) {
370 ccall_info.processors_in[i] = 0;
371 ccall_info.processors_out[i] = 0;
372 sun4d_send_ipi(i, IRQ_CROSS_CALL);
373 }
374 }
375 }
376
377 {
378 register int i;
379
380 i = 0;
381 do {
382 while(!ccall_info.processors_in[i])
383 barrier();
384 } while(++i <= high);
385
386 i = 0;
387 do {
388 while(!ccall_info.processors_out[i])
389 barrier();
390 } while(++i <= high);
391 }
392
393 spin_unlock_irqrestore(&cross_call_lock, flags);
394 }
395 }
396
397 /* Running cross calls. */
smp4d_cross_call_irq(void)398 void smp4d_cross_call_irq(void)
399 {
400 int i = hard_smp4d_processor_id();
401
402 ccall_info.processors_in[i] = 1;
403 ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
404 ccall_info.arg4, ccall_info.arg5);
405 ccall_info.processors_out[i] = 1;
406 }
407
408 static int smp4d_stop_cpu_sender;
409
smp4d_stop_cpu(void)410 static void smp4d_stop_cpu(void)
411 {
412 int me = hard_smp4d_processor_id();
413
414 if (me != smp4d_stop_cpu_sender)
415 while(1) barrier();
416 }
417
418 /* Cross calls, in order to work efficiently and atomically do all
419 * the message passing work themselves, only stopcpu and reschedule
420 * messages come through here.
421 */
smp4d_message_pass(int target,int msg,unsigned long data,int wait)422 void smp4d_message_pass(int target, int msg, unsigned long data, int wait)
423 {
424 int me = hard_smp4d_processor_id();
425
426 SMP_PRINTK(("smp4d_message_pass %d %d %08lx %d\n", target, msg, data, wait));
427 if (msg == MSG_STOP_CPU && target == MSG_ALL_BUT_SELF) {
428 unsigned long flags;
429 static spinlock_t stop_cpu_lock = SPIN_LOCK_UNLOCKED;
430 spin_lock_irqsave(&stop_cpu_lock, flags);
431 smp4d_stop_cpu_sender = me;
432 smp4d_cross_call((smpfunc_t)smp4d_stop_cpu, 0, 0, 0, 0, 0);
433 spin_unlock_irqrestore(&stop_cpu_lock, flags);
434 }
435 printk("Yeeee, trying to send SMP msg(%d) to %d on cpu %d\n", msg, target, me);
436 panic("Bogon SMP message pass.");
437 }
438
439 extern unsigned int prof_multiplier[NR_CPUS];
440 extern unsigned int prof_counter[NR_CPUS];
441
442 extern void sparc_do_profile(unsigned long pc, unsigned long o7);
443
smp4d_percpu_timer_interrupt(struct pt_regs * regs)444 void smp4d_percpu_timer_interrupt(struct pt_regs *regs)
445 {
446 int cpu = hard_smp4d_processor_id();
447 static int cpu_tick[NR_CPUS];
448 static char led_mask[] = { 0xe, 0xd, 0xb, 0x7, 0xb, 0xd };
449
450 bw_get_prof_limit(cpu);
451 bw_clear_intr_mask(0, 1); /* INTR_TABLE[0] & 1 is Profile IRQ */
452
453 cpu_tick[cpu]++;
454 if (!(cpu_tick[cpu] & 15)) {
455 if (cpu_tick[cpu] == 0x60)
456 cpu_tick[cpu] = 0;
457 cpu_leds[cpu] = led_mask[cpu_tick[cpu] >> 4];
458 show_leds(cpu);
459 }
460
461 if(!user_mode(regs))
462 sparc_do_profile(regs->pc, regs->u_regs[UREG_RETPC]);
463
464 if(!--prof_counter[cpu]) {
465 int user = user_mode(regs);
466
467 irq_enter(cpu, 0);
468 update_process_times(user);
469 irq_exit(cpu, 0);
470
471 prof_counter[cpu] = prof_multiplier[cpu];
472 }
473 }
474
475 extern unsigned int lvl14_resolution;
476
smp_setup_percpu_timer(void)477 static void __init smp_setup_percpu_timer(void)
478 {
479 int cpu = hard_smp4d_processor_id();
480
481 prof_counter[cpu] = prof_multiplier[cpu] = 1;
482 load_profile_irq(cpu, lvl14_resolution);
483 }
484
smp4d_blackbox_id(unsigned * addr)485 void __init smp4d_blackbox_id(unsigned *addr)
486 {
487 int rd = *addr & 0x3e000000;
488
489 addr[0] = 0xc0800800 | rd; /* lda [%g0] ASI_M_VIKING_TMP1, reg */
490 addr[1] = 0x01000000; /* nop */
491 addr[2] = 0x01000000; /* nop */
492 }
493
smp4d_blackbox_current(unsigned * addr)494 void __init smp4d_blackbox_current(unsigned *addr)
495 {
496 int rd = *addr & 0x3e000000;
497
498 addr[0] = 0xc0800800 | rd; /* lda [%g0] ASI_M_VIKING_TMP1, reg */
499 addr[2] = 0x81282002 | rd | (rd >> 11); /* sll reg, 2, reg */
500 addr[4] = 0x01000000; /* nop */
501 }
502
sun4d_init_smp(void)503 void __init sun4d_init_smp(void)
504 {
505 int i;
506 extern unsigned int t_nmi[], linux_trap_ipi15_sun4d[], linux_trap_ipi15_sun4m[];
507
508 /* Patch ipi15 trap table */
509 t_nmi[1] = t_nmi[1] + (linux_trap_ipi15_sun4d - linux_trap_ipi15_sun4m);
510
511 /* And set btfixup... */
512 BTFIXUPSET_BLACKBOX(smp_processor_id, smp4d_blackbox_id);
513 BTFIXUPSET_BLACKBOX(load_current, smp4d_blackbox_current);
514 BTFIXUPSET_CALL(smp_cross_call, smp4d_cross_call, BTFIXUPCALL_NORM);
515 BTFIXUPSET_CALL(smp_message_pass, smp4d_message_pass, BTFIXUPCALL_NORM);
516 BTFIXUPSET_CALL(__smp_processor_id, __smp4d_processor_id, BTFIXUPCALL_NORM);
517
518 for (i = 0; i < NR_CPUS; i++) {
519 ccall_info.processors_in[i] = 1;
520 ccall_info.processors_out[i] = 1;
521 }
522 }
523