1 /*
2 * arch/ppc/platform/pmac_feature.c
3 *
4 * Copyright (C) 1996-2002 Paul Mackerras (paulus@cs.anu.edu.au)
5 * Ben. Herrenschmidt (benh@kernel.crashing.org)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 *
12 * TODO:
13 *
14 * - Replace mdelay with some schedule loop if possible
15 * - Shorten some obfuscated delays on some routines (like modem
16 * power)
17 * - Refcount some clocks (see darwin)
18 * - Split split split...
19 *
20 */
21 #include <linux/config.h>
22 #include <linux/types.h>
23 #include <linux/init.h>
24 #include <linux/delay.h>
25 #include <linux/kernel.h>
26 #include <linux/sched.h>
27 #include <linux/spinlock.h>
28 #include <linux/adb.h>
29 #include <linux/pmu.h>
30 #include <linux/ioport.h>
31 #include <linux/pci.h>
32 #include <asm/sections.h>
33 #include <asm/errno.h>
34 #include <asm/ohare.h>
35 #include <asm/heathrow.h>
36 #include <asm/keylargo.h>
37 #include <asm/uninorth.h>
38 #include <asm/io.h>
39 #include <asm/prom.h>
40 #include <asm/machdep.h>
41 #include <asm/pmac_feature.h>
42 #include <asm/dbdma.h>
43 #include <asm/pci-bridge.h>
44
45 #undef DEBUG_FEATURE
46
47 #ifdef DEBUG_FEATURE
48 #define DBG(fmt,...) printk(KERN_DEBUG fmt)
49 #else
50 #define DBG(fmt,...)
51 #endif
52
53 /* Exported from arch/ppc/kernel/idle.c */
54 extern unsigned long powersave_nap;
55 extern unsigned long powersave_lowspeed;
56
57 /*
58 * We use a single global lock to protect accesses. Each driver has
59 * to take care of it's own locking
60 */
61 static spinlock_t feature_lock __pmacdata = SPIN_LOCK_UNLOCKED;
62
63 #define LOCK(flags) spin_lock_irqsave(&feature_lock, flags);
64 #define UNLOCK(flags) spin_unlock_irqrestore(&feature_lock, flags);
65
66 /*
67 * Helper functions regarding the various flavors of mac-io
68 */
69
70 #define MAX_MACIO_CHIPS 2
71
72 enum {
73 macio_unknown = 0,
74 macio_grand_central,
75 macio_ohare,
76 macio_ohareII,
77 macio_heathrow,
78 macio_gatwick,
79 macio_paddington,
80 macio_keylargo,
81 macio_pangea,
82 macio_intrepid,
83 };
84
85 static const char* macio_names[] __pmacdata =
86 {
87 "Unknown",
88 "Grand Central",
89 "OHare",
90 "OHareII",
91 "Heathrow",
92 "Gatwick",
93 "Paddington",
94 "Keylargo",
95 "Pangea",
96 "Intrepid"
97 };
98
99 static struct macio_chip
100 {
101 struct device_node* of_node;
102 int type;
103 int rev;
104 volatile u32* base;
105 unsigned long flags;
106 } macio_chips[MAX_MACIO_CHIPS] __pmacdata;
107
108 #define MACIO_FLAG_SCCA_ON 0x00000001
109 #define MACIO_FLAG_SCCB_ON 0x00000002
110 #define MACIO_FLAG_SCC_LOCKED 0x00000004
111 #define MACIO_FLAG_AIRPORT_ON 0x00000010
112 #define MACIO_FLAG_FW_SUPPORTED 0x00000020
113
114 static struct macio_chip* __pmac
macio_find(struct device_node * child,int type)115 macio_find(struct device_node* child, int type)
116 {
117 while(child) {
118 int i;
119
120 for (i=0; i < MAX_MACIO_CHIPS && macio_chips[i].of_node; i++)
121 if (child == macio_chips[i].of_node &&
122 (!type || macio_chips[i].type == type))
123 return &macio_chips[i];
124 child = child->parent;
125 }
126 return NULL;
127 }
128
129 #define MACIO_FCR32(macio, r) ((macio)->base + ((r) >> 2))
130 #define MACIO_FCR8(macio, r) (((volatile u8*)((macio)->base)) + (r))
131
132 #define MACIO_IN32(r) (in_le32(MACIO_FCR32(macio,r)))
133 #define MACIO_OUT32(r,v) (out_le32(MACIO_FCR32(macio,r), (v)))
134 #define MACIO_BIS(r,v) (MACIO_OUT32((r), MACIO_IN32(r) | (v)))
135 #define MACIO_BIC(r,v) (MACIO_OUT32((r), MACIO_IN32(r) & ~(v)))
136 #define MACIO_IN8(r) (in_8(MACIO_FCR8(macio,r)))
137 #define MACIO_OUT8(r,v) (out_8(MACIO_FCR8(macio,r), (v)))
138
139 /*
140 * Uninorth reg. access. Note that Uni-N regs are big endian
141 */
142
143 #define UN_REG(r) (uninorth_base + ((r) >> 2))
144 #define UN_IN(r) (in_be32(UN_REG(r)))
145 #define UN_OUT(r,v) (out_be32(UN_REG(r), (v)))
146 #define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v)))
147 #define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v)))
148
149 static struct device_node* uninorth_node __pmacdata;
150 static u32* uninorth_base __pmacdata;
151 static u32 uninorth_rev __pmacdata;
152
153
154 /*
155 * For each motherboard family, we have a table of functions pointers
156 * that handle the various features.
157 */
158
159 typedef int (*feature_call)(struct device_node* node, int param, int value);
160
161 struct feature_table_entry {
162 unsigned int selector;
163 feature_call function;
164 };
165
166 struct pmac_mb_def
167 {
168 const char* model_string;
169 const char* model_name;
170 int model_id;
171 struct feature_table_entry* features;
172 unsigned long board_flags;
173 };
174 static struct pmac_mb_def pmac_mb __pmacdata;
175
176 /*
177 * Here are the chip specific feature functions
178 */
179
180 static inline int __pmac
simple_feature_tweak(struct device_node * node,int type,int reg,u32 mask,int value)181 simple_feature_tweak(struct device_node* node, int type, int reg, u32 mask, int value)
182 {
183 struct macio_chip* macio;
184 unsigned long flags;
185
186 macio = macio_find(node, type);
187 if (!macio)
188 return -ENODEV;
189 LOCK(flags);
190 if (value)
191 MACIO_BIS(reg, mask);
192 else
193 MACIO_BIC(reg, mask);
194 (void)MACIO_IN32(reg);
195 UNLOCK(flags);
196
197 return 0;
198 }
199
200 static int __pmac
ohare_htw_scc_enable(struct device_node * node,int param,int value)201 ohare_htw_scc_enable(struct device_node* node, int param, int value)
202 {
203 struct macio_chip* macio;
204 unsigned long chan_mask;
205 unsigned long fcr;
206 unsigned long flags;
207 int htw, trans;
208 unsigned long rmask;
209
210 macio = macio_find(node, 0);
211 if (!macio)
212 return -ENODEV;
213 if (!strcmp(node->name, "ch-a"))
214 chan_mask = MACIO_FLAG_SCCA_ON;
215 else if (!strcmp(node->name, "ch-b"))
216 chan_mask = MACIO_FLAG_SCCB_ON;
217 else
218 return -ENODEV;
219
220 htw = (macio->type == macio_heathrow || macio->type == macio_paddington
221 || macio->type == macio_gatwick);
222 /* On these machines, the HRW_SCC_TRANS_EN_N bit mustn't be touched */
223 trans = (pmac_mb.model_id != PMAC_TYPE_YOSEMITE &&
224 pmac_mb.model_id != PMAC_TYPE_YIKES);
225 if (value) {
226 #ifdef CONFIG_ADB_PMU
227 if ((param & 0xfff) == PMAC_SCC_IRDA)
228 pmu_enable_irled(1);
229 #endif /* CONFIG_ADB_PMU */
230 LOCK(flags);
231 fcr = MACIO_IN32(OHARE_FCR);
232 /* Check if scc cell need enabling */
233 if (!(fcr & OH_SCC_ENABLE)) {
234 fcr |= OH_SCC_ENABLE;
235 if (htw) {
236 /* Side effect: this will also power up the
237 * modem, but it's too messy to figure out on which
238 * ports this controls the tranceiver and on which
239 * it controls the modem
240 */
241 if (trans)
242 fcr &= ~HRW_SCC_TRANS_EN_N;
243 MACIO_OUT32(OHARE_FCR, fcr);
244 fcr |= (rmask = HRW_RESET_SCC);
245 MACIO_OUT32(OHARE_FCR, fcr);
246 } else {
247 fcr |= (rmask = OH_SCC_RESET);
248 MACIO_OUT32(OHARE_FCR, fcr);
249 }
250 UNLOCK(flags);
251 (void)MACIO_IN32(OHARE_FCR);
252 mdelay(15);
253 LOCK(flags);
254 fcr &= ~rmask;
255 MACIO_OUT32(OHARE_FCR, fcr);
256 }
257 if (chan_mask & MACIO_FLAG_SCCA_ON)
258 fcr |= OH_SCCA_IO;
259 if (chan_mask & MACIO_FLAG_SCCB_ON)
260 fcr |= OH_SCCB_IO;
261 MACIO_OUT32(OHARE_FCR, fcr);
262 macio->flags |= chan_mask;
263 UNLOCK(flags);
264 if (param & PMAC_SCC_FLAG_XMON)
265 macio->flags |= MACIO_FLAG_SCC_LOCKED;
266 } else {
267 if (macio->flags & MACIO_FLAG_SCC_LOCKED)
268 return -EPERM;
269 LOCK(flags);
270 fcr = MACIO_IN32(OHARE_FCR);
271 if (chan_mask & MACIO_FLAG_SCCA_ON)
272 fcr &= ~OH_SCCA_IO;
273 if (chan_mask & MACIO_FLAG_SCCB_ON)
274 fcr &= ~OH_SCCB_IO;
275 MACIO_OUT32(OHARE_FCR, fcr);
276 if ((fcr & (OH_SCCA_IO | OH_SCCB_IO)) == 0) {
277 fcr &= ~OH_SCC_ENABLE;
278 if (htw && trans)
279 fcr |= HRW_SCC_TRANS_EN_N;
280 MACIO_OUT32(OHARE_FCR, fcr);
281 }
282 macio->flags &= ~(chan_mask);
283 UNLOCK(flags);
284 mdelay(10);
285 #ifdef CONFIG_ADB_PMU
286 if ((param & 0xfff) == PMAC_SCC_IRDA)
287 pmu_enable_irled(0);
288 #endif /* CONFIG_ADB_PMU */
289 }
290 return 0;
291 }
292
293 static int __pmac
ohare_floppy_enable(struct device_node * node,int param,int value)294 ohare_floppy_enable(struct device_node* node, int param, int value)
295 {
296 return simple_feature_tweak(node, macio_ohare,
297 OHARE_FCR, OH_FLOPPY_ENABLE, value);
298 }
299
300 static int __pmac
ohare_mesh_enable(struct device_node * node,int param,int value)301 ohare_mesh_enable(struct device_node* node, int param, int value)
302 {
303 return simple_feature_tweak(node, macio_ohare,
304 OHARE_FCR, OH_MESH_ENABLE, value);
305 }
306
307 static int __pmac
ohare_ide_enable(struct device_node * node,int param,int value)308 ohare_ide_enable(struct device_node* node, int param, int value)
309 {
310 switch(param) {
311 case 0:
312 /* For some reason, setting the bit in set_initial_features()
313 * doesn't stick. I'm still investigating... --BenH.
314 */
315 if (value)
316 simple_feature_tweak(node, macio_ohare,
317 OHARE_FCR, OH_IOBUS_ENABLE, 1);
318 return simple_feature_tweak(node, macio_ohare,
319 OHARE_FCR, OH_IDE0_ENABLE, value);
320 case 1:
321 return simple_feature_tweak(node, macio_ohare,
322 OHARE_FCR, OH_BAY_IDE_ENABLE, value);
323 default:
324 return -ENODEV;
325 }
326 }
327
328 static int __pmac
ohare_ide_reset(struct device_node * node,int param,int value)329 ohare_ide_reset(struct device_node* node, int param, int value)
330 {
331 switch(param) {
332 case 0:
333 return simple_feature_tweak(node, macio_ohare,
334 OHARE_FCR, OH_IDE0_RESET_N, !value);
335 case 1:
336 return simple_feature_tweak(node, macio_ohare,
337 OHARE_FCR, OH_IDE1_RESET_N, !value);
338 default:
339 return -ENODEV;
340 }
341 }
342
343 static int __pmac
ohare_sleep_state(struct device_node * node,int param,int value)344 ohare_sleep_state(struct device_node* node, int param, int value)
345 {
346 struct macio_chip* macio = &macio_chips[0];
347
348 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
349 return -EPERM;
350 if (value == 1) {
351 MACIO_BIC(OHARE_FCR, OH_IOBUS_ENABLE);
352 } else if (value == 0) {
353 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
354 }
355
356 return 0;
357 }
358
359 static int __pmac
heathrow_modem_enable(struct device_node * node,int param,int value)360 heathrow_modem_enable(struct device_node* node, int param, int value)
361 {
362 struct macio_chip* macio;
363 u8 gpio;
364 unsigned long flags;
365
366 macio = macio_find(node, macio_unknown);
367 if (!macio)
368 return -ENODEV;
369 gpio = MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1;
370 if (!value) {
371 LOCK(flags);
372 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio);
373 UNLOCK(flags);
374 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
375 mdelay(250);
376 }
377 if (pmac_mb.model_id != PMAC_TYPE_YOSEMITE &&
378 pmac_mb.model_id != PMAC_TYPE_YIKES) {
379 LOCK(flags);
380 if (value)
381 MACIO_BIC(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
382 else
383 MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
384 UNLOCK(flags);
385 (void)MACIO_IN32(HEATHROW_FCR);
386 mdelay(250);
387 }
388 if (value) {
389 LOCK(flags);
390 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1);
391 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
392 UNLOCK(flags); mdelay(250); LOCK(flags);
393 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio);
394 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
395 UNLOCK(flags); mdelay(250); LOCK(flags);
396 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1);
397 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
398 UNLOCK(flags); mdelay(250);
399 }
400 return 0;
401 }
402
403 static int __pmac
heathrow_floppy_enable(struct device_node * node,int param,int value)404 heathrow_floppy_enable(struct device_node* node, int param, int value)
405 {
406 return simple_feature_tweak(node, macio_unknown,
407 HEATHROW_FCR,
408 HRW_SWIM_ENABLE|HRW_BAY_FLOPPY_ENABLE,
409 value);
410 }
411
412 static int __pmac
heathrow_mesh_enable(struct device_node * node,int param,int value)413 heathrow_mesh_enable(struct device_node* node, int param, int value)
414 {
415 struct macio_chip* macio;
416 unsigned long flags;
417
418 macio = macio_find(node, macio_unknown);
419 if (!macio)
420 return -ENODEV;
421 LOCK(flags);
422 /* Set clear mesh cell enable */
423 if (value)
424 MACIO_BIS(HEATHROW_FCR, HRW_MESH_ENABLE);
425 else
426 MACIO_BIC(HEATHROW_FCR, HRW_MESH_ENABLE);
427 (void)MACIO_IN32(HEATHROW_FCR);
428 udelay(10);
429 /* Set/Clear termination power (todo: test ! the bit value
430 * used by Darwin doesn't seem to match what we used so
431 * far. If you experience problems, turn #if 1 into #if 0
432 * and tell me about it --BenH.
433 */
434 #if 1
435 if (value)
436 MACIO_BIC(HEATHROW_MBCR, 0x00000004);
437 else
438 MACIO_BIS(HEATHROW_MBCR, 0x00000004);
439 #else
440 if (value)
441 MACIO_BIC(HEATHROW_MBCR, 0x00040000);
442 else
443 MACIO_BIS(HEATHROW_MBCR, 0x00040000);
444 #endif
445 (void)MACIO_IN32(HEATHROW_MBCR);
446 udelay(10);
447 UNLOCK(flags);
448
449 return 0;
450 }
451
452 static int __pmac
heathrow_ide_enable(struct device_node * node,int param,int value)453 heathrow_ide_enable(struct device_node* node, int param, int value)
454 {
455 switch(param) {
456 case 0:
457 return simple_feature_tweak(node, macio_unknown,
458 HEATHROW_FCR, HRW_IDE0_ENABLE, value);
459 case 1:
460 return simple_feature_tweak(node, macio_unknown,
461 HEATHROW_FCR, HRW_BAY_IDE_ENABLE, value);
462 default:
463 return -ENODEV;
464 }
465 }
466
467 static int __pmac
heathrow_ide_reset(struct device_node * node,int param,int value)468 heathrow_ide_reset(struct device_node* node, int param, int value)
469 {
470 switch(param) {
471 case 0:
472 return simple_feature_tweak(node, macio_unknown,
473 HEATHROW_FCR, HRW_IDE0_RESET_N, !value);
474 case 1:
475 return simple_feature_tweak(node, macio_unknown,
476 HEATHROW_FCR, HRW_IDE1_RESET_N, !value);
477 default:
478 return -ENODEV;
479 }
480 }
481
482 static int __pmac
heathrow_bmac_enable(struct device_node * node,int param,int value)483 heathrow_bmac_enable(struct device_node* node, int param, int value)
484 {
485 struct macio_chip* macio;
486 unsigned long flags;
487
488 macio = macio_find(node, 0);
489 if (!macio)
490 return -ENODEV;
491 if (value) {
492 LOCK(flags);
493 MACIO_BIS(HEATHROW_FCR, HRW_BMAC_IO_ENABLE);
494 MACIO_BIS(HEATHROW_FCR, HRW_BMAC_RESET);
495 UNLOCK(flags);
496 (void)MACIO_IN32(HEATHROW_FCR);
497 mdelay(10);
498 LOCK(flags);
499 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_RESET);
500 UNLOCK(flags);
501 (void)MACIO_IN32(HEATHROW_FCR);
502 mdelay(10);
503 } else {
504 LOCK(flags);
505 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE);
506 UNLOCK(flags);
507 }
508 return 0;
509 }
510
511 static int __pmac
heathrow_sound_enable(struct device_node * node,int param,int value)512 heathrow_sound_enable(struct device_node* node, int param, int value)
513 {
514 struct macio_chip* macio;
515 unsigned long flags;
516
517 /* B&W G3 and Yikes don't support that properly (the
518 * sound appear to never come back after beeing shut down).
519 */
520 if (pmac_mb.model_id == PMAC_TYPE_YOSEMITE ||
521 pmac_mb.model_id == PMAC_TYPE_YIKES)
522 return 0;
523
524 macio = macio_find(node, 0);
525 if (!macio)
526 return -ENODEV;
527 if (value) {
528 LOCK(flags);
529 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
530 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N);
531 UNLOCK(flags);
532 (void)MACIO_IN32(HEATHROW_FCR);
533 } else {
534 LOCK(flags);
535 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N);
536 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
537 UNLOCK(flags);
538 }
539 return 0;
540 }
541
542 static u32 save_fcr[6] __pmacdata;
543 static u32 save_mbcr __pmacdata;
544 static u32 save_gpio_levels[2] __pmacdata;
545 static u8 save_gpio_extint[KEYLARGO_GPIO_EXTINT_CNT] __pmacdata;
546 static u8 save_gpio_normal[KEYLARGO_GPIO_CNT] __pmacdata;
547 static u32 save_unin_clock_ctl __pmacdata;
548 static struct dbdma_regs save_dbdma[13] __pmacdata;
549 static struct dbdma_regs save_alt_dbdma[13] __pmacdata;
550
551 static void __pmac
dbdma_save(struct macio_chip * macio,struct dbdma_regs * save)552 dbdma_save(struct macio_chip* macio, struct dbdma_regs* save)
553 {
554 int i;
555
556 /* Save state & config of DBDMA channels */
557 for (i=0; i<13; i++) {
558 volatile struct dbdma_regs* chan = (volatile struct dbdma_regs*)
559 (macio->base + ((0x8000+i*0x100)>>2));
560 save[i].cmdptr_hi = in_le32(&chan->cmdptr_hi);
561 save[i].cmdptr = in_le32(&chan->cmdptr);
562 save[i].intr_sel = in_le32(&chan->intr_sel);
563 save[i].br_sel = in_le32(&chan->br_sel);
564 save[i].wait_sel = in_le32(&chan->wait_sel);
565 }
566 }
567
568 static void __pmac
dbdma_restore(struct macio_chip * macio,struct dbdma_regs * save)569 dbdma_restore(struct macio_chip* macio, struct dbdma_regs* save)
570 {
571 int i;
572
573 /* Save state & config of DBDMA channels */
574 for (i=0; i<13; i++) {
575 volatile struct dbdma_regs* chan = (volatile struct dbdma_regs*)
576 (macio->base + ((0x8000+i*0x100)>>2));
577 out_le32(&chan->control, (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16);
578 while (in_le32(&chan->status) & ACTIVE)
579 mb();
580 out_le32(&chan->cmdptr_hi, save[i].cmdptr_hi);
581 out_le32(&chan->cmdptr, save[i].cmdptr);
582 out_le32(&chan->intr_sel, save[i].intr_sel);
583 out_le32(&chan->br_sel, save[i].br_sel);
584 out_le32(&chan->wait_sel, save[i].wait_sel);
585 }
586 }
587
588 static void __pmac
heathrow_sleep(struct macio_chip * macio,int secondary)589 heathrow_sleep(struct macio_chip* macio, int secondary)
590 {
591 if (secondary) {
592 dbdma_save(macio, save_alt_dbdma);
593 save_fcr[2] = MACIO_IN32(0x38);
594 save_fcr[3] = MACIO_IN32(0x3c);
595 } else {
596 dbdma_save(macio, save_dbdma);
597 save_fcr[0] = MACIO_IN32(0x38);
598 save_fcr[1] = MACIO_IN32(0x3c);
599 save_mbcr = MACIO_IN32(0x34);
600 /* Make sure sound is shut down */
601 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N);
602 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
603 /* This seems to be necessary as well or the fan
604 * keeps coming up and battery drains fast */
605 MACIO_BIC(HEATHROW_FCR, HRW_IOBUS_ENABLE);
606 MACIO_BIC(HEATHROW_FCR, HRW_IDE0_RESET_N);
607 /* Make sure eth is down even if module or sleep
608 * won't work properly */
609 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE | HRW_BMAC_RESET);
610 }
611 /* Make sure modem is shut down */
612 MACIO_OUT8(HRW_GPIO_MODEM_RESET,
613 MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1);
614 MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
615 MACIO_BIC(HEATHROW_FCR, OH_SCCA_IO|OH_SCCB_IO|HRW_SCC_ENABLE);
616
617 /* Let things settle */
618 (void)MACIO_IN32(HEATHROW_FCR);
619 mdelay(1);
620 }
621
622 static void __pmac
heathrow_wakeup(struct macio_chip * macio,int secondary)623 heathrow_wakeup(struct macio_chip* macio, int secondary)
624 {
625 if (secondary) {
626 MACIO_OUT32(0x38, save_fcr[2]);
627 (void)MACIO_IN32(0x38);
628 mdelay(1);
629 MACIO_OUT32(0x3c, save_fcr[3]);
630 (void)MACIO_IN32(0x38);
631 mdelay(10);
632 dbdma_restore(macio, save_alt_dbdma);
633 } else {
634 MACIO_OUT32(0x38, save_fcr[0] | HRW_IOBUS_ENABLE);
635 (void)MACIO_IN32(0x38);
636 mdelay(1);
637 MACIO_OUT32(0x3c, save_fcr[1]);
638 (void)MACIO_IN32(0x38);
639 mdelay(1);
640 MACIO_OUT32(0x34, save_mbcr);
641 (void)MACIO_IN32(0x38);
642 mdelay(10);
643 dbdma_restore(macio, save_dbdma);
644 }
645 }
646
647 static int __pmac
heathrow_sleep_state(struct device_node * node,int param,int value)648 heathrow_sleep_state(struct device_node* node, int param, int value)
649 {
650 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
651 return -EPERM;
652 if (value == 1) {
653 if (macio_chips[1].type == macio_gatwick)
654 heathrow_sleep(&macio_chips[0], 1);
655 heathrow_sleep(&macio_chips[0], 0);
656 } else if (value == 0) {
657 heathrow_wakeup(&macio_chips[0], 0);
658 if (macio_chips[1].type == macio_gatwick)
659 heathrow_wakeup(&macio_chips[0], 1);
660 }
661 return 0;
662 }
663
664 static int __pmac
core99_scc_enable(struct device_node * node,int param,int value)665 core99_scc_enable(struct device_node* node, int param, int value)
666 {
667 struct macio_chip* macio;
668 unsigned long flags;
669 unsigned long chan_mask;
670 u32 fcr;
671
672 macio = macio_find(node, 0);
673 if (!macio)
674 return -ENODEV;
675 if (!strcmp(node->name, "ch-a"))
676 chan_mask = MACIO_FLAG_SCCA_ON;
677 else if (!strcmp(node->name, "ch-b"))
678 chan_mask = MACIO_FLAG_SCCB_ON;
679 else
680 return -ENODEV;
681
682 if (value) {
683 int need_reset_scc = 0;
684 int need_reset_irda = 0;
685
686 LOCK(flags);
687 fcr = MACIO_IN32(KEYLARGO_FCR0);
688 /* Check if scc cell need enabling */
689 if (!(fcr & KL0_SCC_CELL_ENABLE)) {
690 fcr |= KL0_SCC_CELL_ENABLE;
691 need_reset_scc = 1;
692 }
693 if (chan_mask & MACIO_FLAG_SCCA_ON) {
694 fcr |= KL0_SCCA_ENABLE;
695 /* Don't enable line drivers for I2S modem */
696 if ((param & 0xfff) == PMAC_SCC_I2S1)
697 fcr &= ~KL0_SCC_A_INTF_ENABLE;
698 else
699 fcr |= KL0_SCC_A_INTF_ENABLE;
700 }
701 if (chan_mask & MACIO_FLAG_SCCB_ON) {
702 fcr |= KL0_SCCB_ENABLE;
703 /* Perform irda specific inits */
704 if ((param & 0xfff) == PMAC_SCC_IRDA) {
705 fcr &= ~KL0_SCC_B_INTF_ENABLE;
706 fcr |= KL0_IRDA_ENABLE;
707 fcr |= KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE;
708 fcr |= KL0_IRDA_SOURCE1_SEL;
709 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
710 fcr &= ~(KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
711 need_reset_irda = 1;
712 } else
713 fcr |= KL0_SCC_B_INTF_ENABLE;
714 }
715 MACIO_OUT32(KEYLARGO_FCR0, fcr);
716 macio->flags |= chan_mask;
717 if (need_reset_scc) {
718 MACIO_BIS(KEYLARGO_FCR0, KL0_SCC_RESET);
719 (void)MACIO_IN32(KEYLARGO_FCR0);
720 UNLOCK(flags);
721 mdelay(15);
722 LOCK(flags);
723 MACIO_BIC(KEYLARGO_FCR0, KL0_SCC_RESET);
724 }
725 if (need_reset_irda) {
726 MACIO_BIS(KEYLARGO_FCR0, KL0_IRDA_RESET);
727 (void)MACIO_IN32(KEYLARGO_FCR0);
728 UNLOCK(flags);
729 mdelay(15);
730 LOCK(flags);
731 MACIO_BIC(KEYLARGO_FCR0, KL0_IRDA_RESET);
732 }
733 UNLOCK(flags);
734 if (param & PMAC_SCC_FLAG_XMON)
735 macio->flags |= MACIO_FLAG_SCC_LOCKED;
736 } else {
737 if (macio->flags & MACIO_FLAG_SCC_LOCKED)
738 return -EPERM;
739 LOCK(flags);
740 fcr = MACIO_IN32(KEYLARGO_FCR0);
741 if (chan_mask & MACIO_FLAG_SCCA_ON)
742 fcr &= ~KL0_SCCA_ENABLE;
743 if (chan_mask & MACIO_FLAG_SCCB_ON) {
744 fcr &= ~KL0_SCCB_ENABLE;
745 /* Perform irda specific clears */
746 if ((param & 0xfff) == PMAC_SCC_IRDA) {
747 fcr &= ~KL0_IRDA_ENABLE;
748 fcr &= ~(KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE);
749 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
750 fcr &= ~(KL0_IRDA_SOURCE1_SEL|KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
751 }
752 }
753 MACIO_OUT32(KEYLARGO_FCR0, fcr);
754 if ((fcr & (KL0_SCCA_ENABLE | KL0_SCCB_ENABLE)) == 0) {
755 fcr &= ~KL0_SCC_CELL_ENABLE;
756 MACIO_OUT32(KEYLARGO_FCR0, fcr);
757 }
758 macio->flags &= ~(chan_mask);
759 UNLOCK(flags);
760 mdelay(10);
761 }
762 return 0;
763 }
764
765 static int __pmac
core99_modem_enable(struct device_node * node,int param,int value)766 core99_modem_enable(struct device_node* node, int param, int value)
767 {
768 struct macio_chip* macio;
769 u8 gpio;
770 unsigned long flags;
771
772 /* Hack for internal USB modem */
773 if (node == NULL) {
774 if (macio_chips[0].type != macio_keylargo)
775 return -ENODEV;
776 node = macio_chips[0].of_node;
777 }
778 macio = macio_find(node, 0);
779 if (!macio)
780 return -ENODEV;
781 gpio = MACIO_IN8(KL_GPIO_MODEM_RESET);
782 gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE;
783 gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA;
784
785 if (!value) {
786 LOCK(flags);
787 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
788 UNLOCK(flags);
789 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
790 mdelay(250);
791 }
792 LOCK(flags);
793 if (value) {
794 MACIO_BIC(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
795 UNLOCK(flags);
796 (void)MACIO_IN32(KEYLARGO_FCR2);
797 mdelay(250);
798 } else {
799 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
800 UNLOCK(flags);
801 }
802 if (value) {
803 LOCK(flags);
804 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
805 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
806 UNLOCK(flags); mdelay(250); LOCK(flags);
807 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
808 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
809 UNLOCK(flags); mdelay(250); LOCK(flags);
810 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
811 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
812 UNLOCK(flags); mdelay(250);
813 }
814 return 0;
815 }
816
817 static int __pmac
pangea_modem_enable(struct device_node * node,int param,int value)818 pangea_modem_enable(struct device_node* node, int param, int value)
819 {
820 struct macio_chip* macio;
821 u8 gpio;
822 unsigned long flags;
823
824 /* Hack for internal USB modem */
825 if (node == NULL) {
826 if (macio_chips[0].type != macio_pangea &&
827 macio_chips[0].type != macio_intrepid)
828 return -ENODEV;
829 node = macio_chips[0].of_node;
830 }
831 macio = macio_find(node, 0);
832 if (!macio)
833 return -ENODEV;
834 gpio = MACIO_IN8(KL_GPIO_MODEM_RESET);
835 gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE;
836 gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA;
837
838 if (!value) {
839 LOCK(flags);
840 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
841 UNLOCK(flags);
842 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
843 mdelay(250);
844 }
845 LOCK(flags);
846 if (value) {
847 MACIO_OUT8(KL_GPIO_MODEM_POWER,
848 KEYLARGO_GPIO_OUTPUT_ENABLE);
849 UNLOCK(flags);
850 (void)MACIO_IN32(KEYLARGO_FCR2);
851 mdelay(250);
852 } else {
853 MACIO_OUT8(KL_GPIO_MODEM_POWER,
854 KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA);
855 UNLOCK(flags);
856 }
857 if (value) {
858 LOCK(flags);
859 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
860 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
861 UNLOCK(flags); mdelay(250); LOCK(flags);
862 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
863 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
864 UNLOCK(flags); mdelay(250); LOCK(flags);
865 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
866 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
867 UNLOCK(flags); mdelay(250);
868 }
869 return 0;
870 }
871
872 static int __pmac
core99_ata100_enable(struct device_node * node,int value)873 core99_ata100_enable(struct device_node* node, int value)
874 {
875 unsigned long flags;
876 struct pci_dev *pdev = NULL;
877 u8 pbus, pid;
878
879 if (uninorth_rev < 0x24)
880 return -ENODEV;
881
882 LOCK(flags);
883 if (value)
884 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100);
885 else
886 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100);
887 (void)UN_IN(UNI_N_CLOCK_CNTL);
888 UNLOCK(flags);
889 udelay(20);
890
891 if (value) {
892 if (pci_device_from_OF_node(node, &pbus, &pid) == 0)
893 pdev = pci_find_slot(pbus, pid);
894 if (pdev == NULL)
895 return 0;
896 pci_enable_device(pdev);
897 pci_set_master(pdev);
898 }
899 return 0;
900 }
901
902 static int __pmac
core99_ide_enable(struct device_node * node,int param,int value)903 core99_ide_enable(struct device_node* node, int param, int value)
904 {
905 /* Bus ID 0 to 2 are KeyLargo based IDE, busID 3 is U2
906 * based ata-100
907 */
908 switch(param) {
909 case 0:
910 return simple_feature_tweak(node, macio_unknown,
911 KEYLARGO_FCR1, KL1_EIDE0_ENABLE, value);
912 case 1:
913 return simple_feature_tweak(node, macio_unknown,
914 KEYLARGO_FCR1, KL1_EIDE1_ENABLE, value);
915 case 2:
916 return simple_feature_tweak(node, macio_unknown,
917 KEYLARGO_FCR1, KL1_UIDE_ENABLE, value);
918 case 3:
919 return core99_ata100_enable(node, value);
920 default:
921 return -ENODEV;
922 }
923 }
924
925 static int __pmac
core99_ide_reset(struct device_node * node,int param,int value)926 core99_ide_reset(struct device_node* node, int param, int value)
927 {
928 switch(param) {
929 case 0:
930 return simple_feature_tweak(node, macio_unknown,
931 KEYLARGO_FCR1, KL1_EIDE0_RESET_N, !value);
932 case 1:
933 return simple_feature_tweak(node, macio_unknown,
934 KEYLARGO_FCR1, KL1_EIDE1_RESET_N, !value);
935 case 2:
936 return simple_feature_tweak(node, macio_unknown,
937 KEYLARGO_FCR1, KL1_UIDE_RESET_N, !value);
938 default:
939 return -ENODEV;
940 }
941 }
942
943 static int __pmac
core99_gmac_enable(struct device_node * node,int param,int value)944 core99_gmac_enable(struct device_node* node, int param, int value)
945 {
946 unsigned long flags;
947
948 LOCK(flags);
949 if (value)
950 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC);
951 else
952 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC);
953 (void)UN_IN(UNI_N_CLOCK_CNTL);
954 UNLOCK(flags);
955 udelay(20);
956
957 return 0;
958 }
959
960 static int __pmac
core99_gmac_phy_reset(struct device_node * node,int param,int value)961 core99_gmac_phy_reset(struct device_node* node, int param, int value)
962 {
963 unsigned long flags;
964 struct macio_chip* macio;
965
966 macio = &macio_chips[0];
967 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
968 macio->type != macio_intrepid)
969 return -ENODEV;
970
971 LOCK(flags);
972 MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, KEYLARGO_GPIO_OUTPUT_ENABLE);
973 (void)MACIO_IN8(KL_GPIO_ETH_PHY_RESET);
974 UNLOCK(flags);
975 mdelay(10);
976 LOCK(flags);
977 MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, KEYLARGO_GPIO_OUTPUT_ENABLE
978 | KEYLARGO_GPIO_OUTOUT_DATA);
979 UNLOCK(flags);
980 mdelay(10);
981
982 return 0;
983 }
984
985 static int __pmac
core99_sound_chip_enable(struct device_node * node,int param,int value)986 core99_sound_chip_enable(struct device_node* node, int param, int value)
987 {
988 struct macio_chip* macio;
989 unsigned long flags;
990
991 macio = macio_find(node, 0);
992 if (!macio)
993 return -ENODEV;
994
995 /* Do a better probe code, screamer G4 desktops &
996 * iMacs can do that too, add a recalibrate in
997 * the driver as well
998 */
999 if (pmac_mb.model_id == PMAC_TYPE_PISMO ||
1000 pmac_mb.model_id == PMAC_TYPE_TITANIUM) {
1001 LOCK(flags);
1002 if (value)
1003 MACIO_OUT8(KL_GPIO_SOUND_POWER,
1004 KEYLARGO_GPIO_OUTPUT_ENABLE |
1005 KEYLARGO_GPIO_OUTOUT_DATA);
1006 else
1007 MACIO_OUT8(KL_GPIO_SOUND_POWER,
1008 KEYLARGO_GPIO_OUTPUT_ENABLE);
1009 (void)MACIO_IN8(KL_GPIO_SOUND_POWER);
1010 UNLOCK(flags);
1011 }
1012 return 0;
1013 }
1014
1015 static int __pmac
core99_airport_enable(struct device_node * node,int param,int value)1016 core99_airport_enable(struct device_node* node, int param, int value)
1017 {
1018 struct macio_chip* macio;
1019 unsigned long flags;
1020 int state;
1021
1022 macio = macio_find(node, 0);
1023 if (!macio)
1024 return -ENODEV;
1025
1026 /* Hint: we allow passing of macio itself for the sake of the
1027 * sleep code
1028 */
1029 if (node != macio->of_node &&
1030 (!node->parent || node->parent != macio->of_node))
1031 return -ENODEV;
1032 state = (macio->flags & MACIO_FLAG_AIRPORT_ON) != 0;
1033 if (value == state)
1034 return 0;
1035 if (value) {
1036 /* This code is a reproduction of OF enable-cardslot
1037 * and init-wireless methods, slightly hacked until
1038 * I got it working.
1039 */
1040 LOCK(flags);
1041 MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 5);
1042 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf);
1043 UNLOCK(flags);
1044 mdelay(10);
1045 LOCK(flags);
1046 MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 4);
1047 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf);
1048 UNLOCK(flags);
1049
1050 mdelay(10);
1051
1052 LOCK(flags);
1053 MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16);
1054 (void)MACIO_IN32(KEYLARGO_FCR2);
1055 udelay(10);
1056 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xb, 0);
1057 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xb);
1058 udelay(10);
1059 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xa, 0x28);
1060 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xa);
1061 udelay(10);
1062 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xd, 0x28);
1063 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xd);
1064 udelay(10);
1065 MACIO_OUT8(KEYLARGO_GPIO_0+0xd, 0x28);
1066 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xd);
1067 udelay(10);
1068 MACIO_OUT8(KEYLARGO_GPIO_0+0xe, 0x28);
1069 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xe);
1070 UNLOCK(flags);
1071 udelay(10);
1072 MACIO_OUT32(0x1c000, 0);
1073 mdelay(1);
1074 MACIO_OUT8(0x1a3e0, 0x41);
1075 (void)MACIO_IN8(0x1a3e0);
1076 udelay(10);
1077 LOCK(flags);
1078 MACIO_BIS(KEYLARGO_FCR2, KL2_CARDSEL_16);
1079 (void)MACIO_IN32(KEYLARGO_FCR2);
1080 UNLOCK(flags);
1081 mdelay(100);
1082
1083 macio->flags |= MACIO_FLAG_AIRPORT_ON;
1084 } else {
1085 LOCK(flags);
1086 MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16);
1087 (void)MACIO_IN32(KEYLARGO_FCR2);
1088 MACIO_OUT8(KL_GPIO_AIRPORT_0, 0);
1089 MACIO_OUT8(KL_GPIO_AIRPORT_1, 0);
1090 MACIO_OUT8(KL_GPIO_AIRPORT_2, 0);
1091 MACIO_OUT8(KL_GPIO_AIRPORT_3, 0);
1092 MACIO_OUT8(KL_GPIO_AIRPORT_4, 0);
1093 (void)MACIO_IN8(KL_GPIO_AIRPORT_4);
1094 UNLOCK(flags);
1095
1096 macio->flags &= ~MACIO_FLAG_AIRPORT_ON;
1097 }
1098 return 0;
1099 }
1100
1101 #ifdef CONFIG_SMP
1102 static int __pmac
core99_reset_cpu(struct device_node * node,int param,int value)1103 core99_reset_cpu(struct device_node* node, int param, int value)
1104 {
1105 unsigned int reset_io = 0;
1106 unsigned long flags;
1107 struct macio_chip* macio;
1108 struct device_node* np;
1109 const int dflt_reset_lines[] = { KL_GPIO_RESET_CPU0,
1110 KL_GPIO_RESET_CPU1,
1111 KL_GPIO_RESET_CPU2,
1112 KL_GPIO_RESET_CPU3 };
1113
1114 macio = &macio_chips[0];
1115 if (macio->type != macio_keylargo)
1116 return -ENODEV;
1117
1118 np = find_path_device("/cpus");
1119 if (np == NULL)
1120 return -ENODEV;
1121 for (np = np->child; np != NULL; np = np->sibling) {
1122 u32* num = (u32 *)get_property(np, "reg", NULL);
1123 u32* rst = (u32 *)get_property(np, "soft-reset", NULL);
1124 if (num == NULL || rst == NULL)
1125 continue;
1126 if (param == *num) {
1127 reset_io = *rst;
1128 break;
1129 }
1130 }
1131 if (np == NULL || reset_io == 0)
1132 reset_io = dflt_reset_lines[param];
1133
1134 LOCK(flags);
1135 MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE);
1136 (void)MACIO_IN8(reset_io);
1137 udelay(1);
1138 MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTOUT_DATA | KEYLARGO_GPIO_OUTPUT_ENABLE);
1139 (void)MACIO_IN8(reset_io);
1140 UNLOCK(flags);
1141
1142 return 0;
1143 }
1144 #endif /* CONFIG_SMP */
1145
1146 static int __pmac
core99_usb_enable(struct device_node * node,int param,int value)1147 core99_usb_enable(struct device_node* node, int param, int value)
1148 {
1149 struct macio_chip* macio;
1150 unsigned long flags;
1151 char* prop;
1152 int number;
1153 u32 reg;
1154
1155 macio = &macio_chips[0];
1156 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1157 macio->type != macio_intrepid)
1158 return -ENODEV;
1159
1160 prop = (char *)get_property(node, "AAPL,clock-id", NULL);
1161 if (!prop)
1162 return -ENODEV;
1163 if (strncmp(prop, "usb0u048", 8) == 0)
1164 number = 0;
1165 else if (strncmp(prop, "usb1u148", 8) == 0)
1166 number = 2;
1167 else if (strncmp(prop, "usb2u248", 8) == 0)
1168 number = 4;
1169 else
1170 return -ENODEV;
1171
1172 /* Sorry for the brute-force locking, but this is only used during
1173 * sleep and the timing seem to be critical
1174 */
1175 LOCK(flags);
1176 if (value) {
1177 /* Turn ON */
1178 if (number == 0) {
1179 MACIO_BIC(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1));
1180 (void)MACIO_IN32(KEYLARGO_FCR0);
1181 UNLOCK(flags);
1182 mdelay(1);
1183 LOCK(flags);
1184 MACIO_BIS(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE);
1185 } else if (number == 2) {
1186 MACIO_BIC(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1));
1187 UNLOCK(flags);
1188 (void)MACIO_IN32(KEYLARGO_FCR0);
1189 mdelay(1);
1190 LOCK(flags);
1191 MACIO_BIS(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE);
1192 } else if (number == 4) {
1193 MACIO_BIC(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1));
1194 UNLOCK(flags);
1195 (void)MACIO_IN32(KEYLARGO_FCR1);
1196 mdelay(1);
1197 LOCK(flags);
1198 MACIO_BIS(KEYLARGO_FCR0, KL1_USB2_CELL_ENABLE);
1199 }
1200 if (number < 4) {
1201 reg = MACIO_IN32(KEYLARGO_FCR4);
1202 reg &= ~(KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) |
1203 KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number));
1204 reg &= ~(KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) |
1205 KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1));
1206 MACIO_OUT32(KEYLARGO_FCR4, reg);
1207 (void)MACIO_IN32(KEYLARGO_FCR4);
1208 udelay(10);
1209 } else {
1210 reg = MACIO_IN32(KEYLARGO_FCR3);
1211 reg &= ~(KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) |
1212 KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0));
1213 reg &= ~(KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) |
1214 KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1));
1215 MACIO_OUT32(KEYLARGO_FCR3, reg);
1216 (void)MACIO_IN32(KEYLARGO_FCR3);
1217 udelay(10);
1218 }
1219 } else {
1220 /* Turn OFF */
1221 if (number < 4) {
1222 reg = MACIO_IN32(KEYLARGO_FCR4);
1223 reg |= KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) |
1224 KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number);
1225 reg |= KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) |
1226 KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1);
1227 MACIO_OUT32(KEYLARGO_FCR4, reg);
1228 (void)MACIO_IN32(KEYLARGO_FCR4);
1229 udelay(1);
1230 } else {
1231 reg = MACIO_IN32(KEYLARGO_FCR3);
1232 reg |= KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) |
1233 KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0);
1234 reg |= KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) |
1235 KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1);
1236 MACIO_OUT32(KEYLARGO_FCR3, reg);
1237 (void)MACIO_IN32(KEYLARGO_FCR3);
1238 udelay(1);
1239 }
1240 if (number == 0) {
1241 MACIO_BIC(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE);
1242 (void)MACIO_IN32(KEYLARGO_FCR0);
1243 udelay(1);
1244 MACIO_BIS(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1));
1245 (void)MACIO_IN32(KEYLARGO_FCR0);
1246 } else if (number == 2) {
1247 MACIO_BIC(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE);
1248 (void)MACIO_IN32(KEYLARGO_FCR0);
1249 udelay(1);
1250 MACIO_BIS(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1));
1251 (void)MACIO_IN32(KEYLARGO_FCR0);
1252 } else if (number == 4) {
1253 MACIO_BIC(KEYLARGO_FCR1, KL1_USB2_CELL_ENABLE);
1254 (void)MACIO_IN32(KEYLARGO_FCR1);
1255 udelay(1);
1256 MACIO_BIS(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1));
1257 (void)MACIO_IN32(KEYLARGO_FCR1);
1258 }
1259 udelay(1);
1260 }
1261 UNLOCK(flags);
1262
1263 return 0;
1264 }
1265
1266 static int __pmac
core99_firewire_enable(struct device_node * node,int param,int value)1267 core99_firewire_enable(struct device_node* node, int param, int value)
1268 {
1269 unsigned long flags;
1270 struct macio_chip* macio;
1271
1272 macio = &macio_chips[0];
1273 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1274 macio->type != macio_intrepid)
1275 return -ENODEV;
1276 if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED))
1277 return -ENODEV;
1278
1279 LOCK(flags);
1280 if (value) {
1281 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW);
1282 (void)UN_IN(UNI_N_CLOCK_CNTL);
1283 } else {
1284 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW);
1285 (void)UN_IN(UNI_N_CLOCK_CNTL);
1286 }
1287 UNLOCK(flags);
1288 mdelay(1);
1289
1290 return 0;
1291 }
1292
1293 static int __pmac
core99_firewire_cable_power(struct device_node * node,int param,int value)1294 core99_firewire_cable_power(struct device_node* node, int param, int value)
1295 {
1296 unsigned long flags;
1297 struct macio_chip* macio;
1298
1299 /* Trick: we allow NULL node */
1300 if ((pmac_mb.board_flags & PMAC_MB_HAS_FW_POWER) == 0)
1301 return -ENODEV;
1302 macio = &macio_chips[0];
1303 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1304 macio->type != macio_intrepid)
1305 return -ENODEV;
1306 if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED))
1307 return -ENODEV;
1308
1309 LOCK(flags);
1310 if (value) {
1311 MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 0);
1312 MACIO_IN8(KL_GPIO_FW_CABLE_POWER);
1313 udelay(10);
1314 } else {
1315 MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 4);
1316 MACIO_IN8(KL_GPIO_FW_CABLE_POWER); udelay(10);
1317 }
1318 UNLOCK(flags);
1319 mdelay(1);
1320
1321 return 0;
1322 }
1323
1324 static int __pmac
core99_read_gpio(struct device_node * node,int param,int value)1325 core99_read_gpio(struct device_node* node, int param, int value)
1326 {
1327 struct macio_chip* macio = &macio_chips[0];
1328
1329 return MACIO_IN8(param);
1330 }
1331
1332
1333 static int __pmac
core99_write_gpio(struct device_node * node,int param,int value)1334 core99_write_gpio(struct device_node* node, int param, int value)
1335 {
1336 struct macio_chip* macio = &macio_chips[0];
1337
1338 MACIO_OUT8(param, (u8)(value & 0xff));
1339 return 0;
1340 }
1341
1342 static void __pmac
keylargo_shutdown(struct macio_chip * macio,int sleep_mode)1343 keylargo_shutdown(struct macio_chip* macio, int sleep_mode)
1344 {
1345 u32 temp;
1346
1347 if (sleep_mode) {
1348 mdelay(1);
1349 MACIO_BIS(KEYLARGO_FCR0, KL0_USB_REF_SUSPEND);
1350 (void)MACIO_IN32(KEYLARGO_FCR0);
1351 mdelay(1);
1352 }
1353
1354 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1355 KL0_SCC_CELL_ENABLE |
1356 KL0_IRDA_ENABLE | KL0_IRDA_CLK32_ENABLE |
1357 KL0_IRDA_CLK19_ENABLE);
1358
1359 MACIO_BIC(KEYLARGO_MBCR, KL_MBCR_MB0_DEV_MASK);
1360 MACIO_BIS(KEYLARGO_MBCR, KL_MBCR_MB0_IDE_ENABLE);
1361
1362 MACIO_BIC(KEYLARGO_FCR1,
1363 KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT |
1364 KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE |
1365 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1366 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1367 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
1368 KL1_EIDE0_ENABLE | KL1_EIDE0_RESET_N |
1369 KL1_EIDE1_ENABLE | KL1_EIDE1_RESET_N |
1370 KL1_UIDE_ENABLE);
1371
1372 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
1373 MACIO_BIC(KEYLARGO_FCR2, KL2_IOBUS_ENABLE);
1374
1375 temp = MACIO_IN32(KEYLARGO_FCR3);
1376 if (macio->rev >= 2) {
1377 temp |= KL3_SHUTDOWN_PLL2X;
1378 if (sleep_mode)
1379 temp |= KL3_SHUTDOWN_PLL_TOTAL;
1380 }
1381
1382 temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 |
1383 KL3_SHUTDOWN_PLLKW35;
1384 if (sleep_mode)
1385 temp |= KL3_SHUTDOWN_PLLKW12;
1386 temp &= ~(KL3_CLK66_ENABLE | KL3_CLK49_ENABLE | KL3_CLK45_ENABLE
1387 | KL3_CLK31_ENABLE | KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE);
1388 if (sleep_mode)
1389 temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_VIA_CLK16_ENABLE);
1390 MACIO_OUT32(KEYLARGO_FCR3, temp);
1391
1392 /* Flush posted writes & wait a bit */
1393 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
1394 }
1395
1396 static void __pmac
pangea_shutdown(struct macio_chip * macio,int sleep_mode)1397 pangea_shutdown(struct macio_chip* macio, int sleep_mode)
1398 {
1399 u32 temp;
1400
1401 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1402 KL0_SCC_CELL_ENABLE |
1403 KL0_USB0_CELL_ENABLE | KL0_USB1_CELL_ENABLE);
1404
1405 MACIO_BIC(KEYLARGO_FCR1,
1406 KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT |
1407 KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE |
1408 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1409 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1410 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
1411 KL1_UIDE_ENABLE);
1412 if (pmac_mb.board_flags & PMAC_MB_MOBILE)
1413 MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N);
1414
1415 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
1416
1417 temp = MACIO_IN32(KEYLARGO_FCR3);
1418 temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 |
1419 KL3_SHUTDOWN_PLLKW35;
1420 temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE | KL3_CLK31_ENABLE
1421 | KL3_I2S0_CLK18_ENABLE | KL3_I2S1_CLK18_ENABLE);
1422 if (sleep_mode)
1423 temp &= ~(KL3_VIA_CLK16_ENABLE | KL3_TIMER_CLK18_ENABLE);
1424 MACIO_OUT32(KEYLARGO_FCR3, temp);
1425
1426 /* Flush posted writes & wait a bit */
1427 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
1428 }
1429
1430 static void __pmac
intrepid_shutdown(struct macio_chip * macio,int sleep_mode)1431 intrepid_shutdown(struct macio_chip* macio, int sleep_mode)
1432 {
1433 u32 temp;
1434
1435 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1436 KL0_SCC_CELL_ENABLE |
1437 KL0_USB0_CELL_ENABLE | KL0_USB1_CELL_ENABLE);
1438
1439 MACIO_BIC(KEYLARGO_FCR1,
1440 KL1_USB2_CELL_ENABLE |
1441 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1442 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1443 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE);
1444 if (pmac_mb.board_flags & PMAC_MB_MOBILE)
1445 MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N);
1446
1447 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
1448
1449 temp = MACIO_IN32(KEYLARGO_FCR3);
1450 temp |= KL3_IT_SHUTDOWN_PLL1 | KL3_IT_SHUTDOWN_PLL2 |
1451 KL3_IT_SHUTDOWN_PLL3;
1452 temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE |
1453 KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE);
1454 if (sleep_mode)
1455 temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_IT_VIA_CLK32_ENABLE);
1456 MACIO_OUT32(KEYLARGO_FCR3, temp);
1457
1458 /* Flush posted writes & wait a bit */
1459 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
1460 }
1461
1462 static int __pmac
core99_sleep(void)1463 core99_sleep(void)
1464 {
1465 struct macio_chip* macio;
1466 int i;
1467
1468 macio = &macio_chips[0];
1469 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1470 macio->type != macio_intrepid)
1471 return -ENODEV;
1472
1473 /* We power off the wireless slot in case it was not done
1474 * by the driver. We don't power it on automatically however
1475 */
1476 if (macio->flags & MACIO_FLAG_AIRPORT_ON)
1477 core99_airport_enable(macio->of_node, 0, 0);
1478
1479 /* We power off the FW cable. Should be done by the driver... */
1480 if (macio->flags & MACIO_FLAG_FW_SUPPORTED) {
1481 core99_firewire_enable(NULL, 0, 0);
1482 core99_firewire_cable_power(NULL, 0, 0);
1483 }
1484
1485 /* We make sure int. modem is off (in case driver lost it) */
1486 if (macio->type == macio_keylargo)
1487 core99_modem_enable(macio->of_node, 0, 0);
1488 else
1489 pangea_modem_enable(macio->of_node, 0, 0);
1490
1491 /* We make sure the sound is off as well */
1492 core99_sound_chip_enable(macio->of_node, 0, 0);
1493
1494 /*
1495 * Save various bits of KeyLargo
1496 */
1497
1498 /* Save the state of the various GPIOs */
1499 save_gpio_levels[0] = MACIO_IN32(KEYLARGO_GPIO_LEVELS0);
1500 save_gpio_levels[1] = MACIO_IN32(KEYLARGO_GPIO_LEVELS1);
1501 for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++)
1502 save_gpio_extint[i] = MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+i);
1503 for (i=0; i<KEYLARGO_GPIO_CNT; i++)
1504 save_gpio_normal[i] = MACIO_IN8(KEYLARGO_GPIO_0+i);
1505
1506 /* Save the FCRs */
1507 if (macio->type == macio_keylargo)
1508 save_mbcr = MACIO_IN32(KEYLARGO_MBCR);
1509 save_fcr[0] = MACIO_IN32(KEYLARGO_FCR0);
1510 save_fcr[1] = MACIO_IN32(KEYLARGO_FCR1);
1511 save_fcr[2] = MACIO_IN32(KEYLARGO_FCR2);
1512 save_fcr[3] = MACIO_IN32(KEYLARGO_FCR3);
1513 save_fcr[4] = MACIO_IN32(KEYLARGO_FCR4);
1514 if (macio->type == macio_pangea || macio->type == macio_intrepid)
1515 save_fcr[5] = MACIO_IN32(KEYLARGO_FCR5);
1516
1517 /* Save state & config of DBDMA channels */
1518 dbdma_save(macio, save_dbdma);
1519
1520 /*
1521 * Turn off as much as we can
1522 */
1523 if (macio->type == macio_pangea)
1524 pangea_shutdown(macio, 1);
1525 else if (macio->type == macio_intrepid)
1526 intrepid_shutdown(macio, 1);
1527 else if (macio->type == macio_keylargo)
1528 keylargo_shutdown(macio, 1);
1529
1530 /*
1531 * Put the host bridge to sleep
1532 */
1533
1534 save_unin_clock_ctl = UN_IN(UNI_N_CLOCK_CNTL);
1535 UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl &
1536 ~(UNI_N_CLOCK_CNTL_GMAC|UNI_N_CLOCK_CNTL_FW/*|UNI_N_CLOCK_CNTL_PCI*/));
1537 udelay(100);
1538 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING);
1539 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_SLEEP);
1540
1541 /*
1542 * FIXME: A bit of black magic with OpenPIC (don't ask me why)
1543 */
1544 if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) {
1545 MACIO_BIS(0x506e0, 0x00400000);
1546 MACIO_BIS(0x506e0, 0x80000000);
1547 }
1548 return 0;
1549 }
1550
1551 static int __pmac
core99_wake_up(void)1552 core99_wake_up(void)
1553 {
1554 struct macio_chip* macio;
1555 int i;
1556
1557 macio = &macio_chips[0];
1558 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1559 macio->type != macio_intrepid)
1560 return -ENODEV;
1561
1562 /*
1563 * Wakeup the host bridge
1564 */
1565 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL);
1566 udelay(10);
1567 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING);
1568 udelay(10);
1569
1570 /*
1571 * Restore KeyLargo
1572 */
1573
1574 if (macio->type == macio_keylargo) {
1575 MACIO_OUT32(KEYLARGO_MBCR, save_mbcr);
1576 (void)MACIO_IN32(KEYLARGO_MBCR); udelay(10);
1577 }
1578 MACIO_OUT32(KEYLARGO_FCR0, save_fcr[0]);
1579 (void)MACIO_IN32(KEYLARGO_FCR0); udelay(10);
1580 MACIO_OUT32(KEYLARGO_FCR1, save_fcr[1]);
1581 (void)MACIO_IN32(KEYLARGO_FCR1); udelay(10);
1582 MACIO_OUT32(KEYLARGO_FCR2, save_fcr[2]);
1583 (void)MACIO_IN32(KEYLARGO_FCR2); udelay(10);
1584 MACIO_OUT32(KEYLARGO_FCR3, save_fcr[3]);
1585 (void)MACIO_IN32(KEYLARGO_FCR3); udelay(10);
1586 MACIO_OUT32(KEYLARGO_FCR4, save_fcr[4]);
1587 (void)MACIO_IN32(KEYLARGO_FCR4); udelay(10);
1588 if (macio->type == macio_pangea || macio->type == macio_intrepid) {
1589 MACIO_OUT32(KEYLARGO_FCR5, save_fcr[5]);
1590 (void)MACIO_IN32(KEYLARGO_FCR5); udelay(10);
1591 }
1592
1593 dbdma_restore(macio, save_dbdma);
1594
1595 MACIO_OUT32(KEYLARGO_GPIO_LEVELS0, save_gpio_levels[0]);
1596 MACIO_OUT32(KEYLARGO_GPIO_LEVELS1, save_gpio_levels[1]);
1597 for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++)
1598 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+i, save_gpio_extint[i]);
1599 for (i=0; i<KEYLARGO_GPIO_CNT; i++)
1600 MACIO_OUT8(KEYLARGO_GPIO_0+i, save_gpio_normal[i]);
1601
1602 /* FIXME more black magic with OpenPIC ... */
1603 if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) {
1604 MACIO_BIC(0x506e0, 0x00400000);
1605 MACIO_BIC(0x506e0, 0x80000000);
1606 }
1607
1608 UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl);
1609 udelay(100);
1610
1611 return 0;
1612 }
1613
1614 static int __pmac
core99_sleep_state(struct device_node * node,int param,int value)1615 core99_sleep_state(struct device_node* node, int param, int value)
1616 {
1617 /* Param == 1 means to enter the "fake sleep" mode that is
1618 * used for CPU speed switch
1619 */
1620 if (param == 1) {
1621 if (value == 1) {
1622 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING);
1623 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_IDLE2);
1624 } else {
1625 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL);
1626 udelay(10);
1627 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING);
1628 udelay(10);
1629 }
1630 return 0;
1631 }
1632 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
1633 return -EPERM;
1634 if (value == 1)
1635 return core99_sleep();
1636 else if (value == 0)
1637 return core99_wake_up();
1638 return 0;
1639 }
1640
1641 static int __pmac
generic_get_mb_info(struct device_node * node,int param,int value)1642 generic_get_mb_info(struct device_node* node, int param, int value)
1643 {
1644 switch(param) {
1645 case PMAC_MB_INFO_MODEL:
1646 return pmac_mb.model_id;
1647 case PMAC_MB_INFO_FLAGS:
1648 return pmac_mb.board_flags;
1649 case PMAC_MB_INFO_NAME:
1650 /* hack hack hack... but should work */
1651 *((const char **)value) = pmac_mb.model_name;
1652 break;
1653 }
1654 return 0;
1655 }
1656
1657 /*
1658 * Table definitions
1659 */
1660
1661 /* Used on any machine
1662 */
1663 static struct feature_table_entry any_features[] __pmacdata = {
1664 { PMAC_FTR_GET_MB_INFO, generic_get_mb_info },
1665 { 0, NULL }
1666 };
1667
1668 /* OHare based motherboards. Currently, we only use these on the
1669 * 2400,3400 and 3500 series powerbooks. Some older desktops seem
1670 * to have issues with turning on/off those asic cells
1671 */
1672 static struct feature_table_entry ohare_features[] __pmacdata = {
1673 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1674 { PMAC_FTR_SWIM3_ENABLE, ohare_floppy_enable },
1675 { PMAC_FTR_MESH_ENABLE, ohare_mesh_enable },
1676 { PMAC_FTR_IDE_ENABLE, ohare_ide_enable},
1677 { PMAC_FTR_IDE_RESET, ohare_ide_reset},
1678 { PMAC_FTR_SLEEP_STATE, ohare_sleep_state },
1679 { 0, NULL }
1680 };
1681
1682 /* Heathrow desktop machines (Beige G3).
1683 * Separated as some features couldn't be properly tested
1684 * and the serial port control bits appear to confuse it.
1685 */
1686 static struct feature_table_entry heathrow_desktop_features[] __pmacdata = {
1687 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
1688 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable },
1689 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable },
1690 { PMAC_FTR_IDE_RESET, heathrow_ide_reset },
1691 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable },
1692 { 0, NULL }
1693 };
1694
1695 /* Heathrow based laptop, that is the Wallstreet and mainstreet
1696 * powerbooks.
1697 */
1698 static struct feature_table_entry heathrow_laptop_features[] __pmacdata = {
1699 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1700 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable },
1701 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
1702 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable },
1703 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable },
1704 { PMAC_FTR_IDE_RESET, heathrow_ide_reset },
1705 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable },
1706 { PMAC_FTR_SOUND_CHIP_ENABLE, heathrow_sound_enable },
1707 { PMAC_FTR_SLEEP_STATE, heathrow_sleep_state },
1708 { 0, NULL }
1709 };
1710
1711 /* Paddington based machines
1712 * The lombard (101) powerbook, first iMac models, B&W G3 and Yikes G4.
1713 */
1714 static struct feature_table_entry paddington_features[] __pmacdata = {
1715 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1716 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable },
1717 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
1718 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable },
1719 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable },
1720 { PMAC_FTR_IDE_RESET, heathrow_ide_reset },
1721 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable },
1722 { PMAC_FTR_SOUND_CHIP_ENABLE, heathrow_sound_enable },
1723 { PMAC_FTR_SLEEP_STATE, heathrow_sleep_state },
1724 { 0, NULL }
1725 };
1726
1727 /* Core99 & MacRISC 2 machines (all machines released since the
1728 * iBook (included), that is all AGP machines, except pangea
1729 * chipset. The pangea chipset is the "combo" UniNorth/KeyLargo
1730 * used on iBook2 & iMac "flow power".
1731 */
1732 static struct feature_table_entry core99_features[] __pmacdata = {
1733 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
1734 { PMAC_FTR_MODEM_ENABLE, core99_modem_enable },
1735 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
1736 { PMAC_FTR_IDE_RESET, core99_ide_reset },
1737 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable },
1738 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset },
1739 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable },
1740 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable },
1741 { PMAC_FTR_USB_ENABLE, core99_usb_enable },
1742 { PMAC_FTR_1394_ENABLE, core99_firewire_enable },
1743 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power },
1744 { PMAC_FTR_SLEEP_STATE, core99_sleep_state },
1745 #ifdef CONFIG_SMP
1746 { PMAC_FTR_RESET_CPU, core99_reset_cpu },
1747 #endif /* CONFIG_SMP */
1748 { PMAC_FTR_READ_GPIO, core99_read_gpio },
1749 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
1750 { 0, NULL }
1751 };
1752
1753 /* RackMac
1754 */
1755 static struct feature_table_entry rackmac_features[] __pmacdata = {
1756 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
1757 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
1758 { PMAC_FTR_IDE_RESET, core99_ide_reset },
1759 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable },
1760 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset },
1761 { PMAC_FTR_USB_ENABLE, core99_usb_enable },
1762 { PMAC_FTR_1394_ENABLE, core99_firewire_enable },
1763 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power },
1764 { PMAC_FTR_SLEEP_STATE, core99_sleep_state },
1765 #ifdef CONFIG_SMP
1766 { PMAC_FTR_RESET_CPU, core99_reset_cpu },
1767 #endif /* CONFIG_SMP */
1768 { PMAC_FTR_READ_GPIO, core99_read_gpio },
1769 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
1770 { 0, NULL }
1771 };
1772
1773 /* Pangea features
1774 */
1775 static struct feature_table_entry pangea_features[] __pmacdata = {
1776 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
1777 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable },
1778 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
1779 { PMAC_FTR_IDE_RESET, core99_ide_reset },
1780 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable },
1781 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset },
1782 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable },
1783 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable },
1784 { PMAC_FTR_USB_ENABLE, core99_usb_enable },
1785 { PMAC_FTR_1394_ENABLE, core99_firewire_enable },
1786 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power },
1787 { PMAC_FTR_SLEEP_STATE, core99_sleep_state },
1788 { PMAC_FTR_READ_GPIO, core99_read_gpio },
1789 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
1790 { 0, NULL }
1791 };
1792
1793 /* Intrepid features
1794 */
1795 static struct feature_table_entry intrepid_features[] __pmacdata = {
1796 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
1797 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable },
1798 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
1799 { PMAC_FTR_IDE_RESET, core99_ide_reset },
1800 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable },
1801 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset },
1802 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable },
1803 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable },
1804 { PMAC_FTR_USB_ENABLE, core99_usb_enable },
1805 { PMAC_FTR_1394_ENABLE, core99_firewire_enable },
1806 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power },
1807 { PMAC_FTR_SLEEP_STATE, core99_sleep_state },
1808 { PMAC_FTR_READ_GPIO, core99_read_gpio },
1809 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
1810 { 0, NULL }
1811 };
1812
1813 static struct pmac_mb_def pmac_mb_defs[] __pmacdata = {
1814 /* Warning: ordering is important as some models may claim
1815 * beeing compatible with several types
1816 */
1817 { "AAPL,8500", "PowerMac 8500/8600",
1818 PMAC_TYPE_PSURGE, NULL,
1819 0
1820 },
1821 { "AAPL,9500", "PowerMac 9500/9600",
1822 PMAC_TYPE_PSURGE, NULL,
1823 0
1824 },
1825 { "AAPL,7500", "PowerMac 7500",
1826 PMAC_TYPE_PSURGE, NULL,
1827 0
1828 },
1829 { "AAPL,ShinerESB", "Apple Network Server",
1830 PMAC_TYPE_ANS, NULL,
1831 0
1832 },
1833 { "AAPL,e407", "Alchemy",
1834 PMAC_TYPE_ALCHEMY, NULL,
1835 0
1836 },
1837 { "AAPL,e411", "Gazelle",
1838 PMAC_TYPE_GAZELLE, NULL,
1839 0
1840 },
1841 { "AAPL,3400/2400", "PowerBook 3400",
1842 PMAC_TYPE_HOOPER, ohare_features,
1843 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
1844 },
1845 { "AAPL,3500", "PowerBook 3500",
1846 PMAC_TYPE_KANGA, ohare_features,
1847 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
1848 },
1849 { "AAPL,Gossamer", "PowerMac G3 (Gossamer)",
1850 PMAC_TYPE_GOSSAMER, heathrow_desktop_features,
1851 0
1852 },
1853 { "AAPL,PowerMac G3", "PowerMac G3 (Silk)",
1854 PMAC_TYPE_SILK, heathrow_desktop_features,
1855 0
1856 },
1857 { "AAPL,PowerBook1998", "PowerBook Wallstreet",
1858 PMAC_TYPE_WALLSTREET, heathrow_laptop_features,
1859 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
1860 },
1861 { "PowerBook1,1", "PowerBook 101 (Lombard)",
1862 PMAC_TYPE_101_PBOOK, paddington_features,
1863 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
1864 },
1865 { "iMac,1", "iMac (first generation)",
1866 PMAC_TYPE_ORIG_IMAC, paddington_features,
1867 0
1868 },
1869 { "PowerMac4,1", "iMac \"Flower Power\"",
1870 PMAC_TYPE_PANGEA_IMAC, pangea_features,
1871 PMAC_MB_CAN_SLEEP
1872 },
1873 { "PowerBook4,3", "iBook 2 rev. 2",
1874 PMAC_TYPE_IBOOK2, pangea_features,
1875 PMAC_MB_CAN_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
1876 },
1877 { "PowerBook4,2", "iBook 2",
1878 PMAC_TYPE_IBOOK2, pangea_features,
1879 PMAC_MB_CAN_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
1880 },
1881 { "PowerBook4,1", "iBook 2",
1882 PMAC_TYPE_IBOOK2, pangea_features,
1883 PMAC_MB_CAN_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
1884 },
1885 { "PowerMac4,4", "eMac",
1886 PMAC_TYPE_EMAC, core99_features,
1887 PMAC_MB_CAN_SLEEP
1888 },
1889 { "PowerMac4,2", "Flat panel iMac",
1890 PMAC_TYPE_FLAT_PANEL_IMAC, pangea_features,
1891 PMAC_MB_CAN_SLEEP
1892 },
1893 { "PowerMac1,1", "Blue&White G3",
1894 PMAC_TYPE_YOSEMITE, paddington_features,
1895 0
1896 },
1897 { "PowerMac1,2", "PowerMac G4 PCI Graphics",
1898 PMAC_TYPE_YIKES, paddington_features,
1899 0
1900 },
1901 { "PowerBook2,1", "iBook (first generation)",
1902 PMAC_TYPE_ORIG_IBOOK, core99_features,
1903 PMAC_MB_CAN_SLEEP | PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
1904 },
1905 { "PowerMac3,1", "PowerMac G4 AGP Graphics",
1906 PMAC_TYPE_SAWTOOTH, core99_features,
1907 PMAC_MB_OLD_CORE99
1908 },
1909 { "PowerMac3,2", "PowerMac G4 AGP Graphics",
1910 PMAC_TYPE_SAWTOOTH, core99_features,
1911 PMAC_MB_OLD_CORE99
1912 },
1913 { "PowerMac3,3", "PowerMac G4 AGP Graphics",
1914 PMAC_TYPE_SAWTOOTH, core99_features,
1915 PMAC_MB_OLD_CORE99
1916 },
1917 { "PowerMac2,1", "iMac FireWire",
1918 PMAC_TYPE_FW_IMAC, core99_features,
1919 PMAC_MB_CAN_SLEEP | PMAC_MB_OLD_CORE99
1920 },
1921 { "PowerMac2,2", "iMac FireWire",
1922 PMAC_TYPE_FW_IMAC, core99_features,
1923 PMAC_MB_CAN_SLEEP | PMAC_MB_OLD_CORE99
1924 },
1925 { "PowerBook2,2", "iBook FireWire",
1926 PMAC_TYPE_FW_IBOOK, core99_features,
1927 PMAC_MB_CAN_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
1928 },
1929 { "PowerMac5,1", "PowerMac G4 Cube",
1930 PMAC_TYPE_CUBE, core99_features,
1931 PMAC_MB_OLD_CORE99
1932 },
1933 { "PowerMac3,4", "PowerMac G4 Silver",
1934 PMAC_TYPE_QUICKSILVER, core99_features,
1935 0
1936 },
1937 { "PowerMac3,5", "PowerMac G4 Silver",
1938 PMAC_TYPE_QUICKSILVER, core99_features,
1939 0
1940 },
1941 { "PowerBook3,1", "PowerBook Pismo",
1942 PMAC_TYPE_PISMO, core99_features,
1943 PMAC_MB_CAN_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
1944 },
1945 { "PowerBook3,2", "PowerBook Titanium",
1946 PMAC_TYPE_TITANIUM, core99_features,
1947 PMAC_MB_CAN_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
1948 },
1949 { "PowerBook3,3", "PowerBook Titanium II",
1950 PMAC_TYPE_TITANIUM2, core99_features,
1951 PMAC_MB_CAN_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
1952 },
1953 { "PowerBook3,4", "PowerBook Titanium III",
1954 PMAC_TYPE_TITANIUM3, core99_features,
1955 PMAC_MB_CAN_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
1956 },
1957 { "PowerBook3,5", "PowerBook Titanium IV",
1958 PMAC_TYPE_TITANIUM4, core99_features,
1959 PMAC_MB_CAN_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
1960 },
1961 { "RackMac1,1", "XServe",
1962 PMAC_TYPE_RACKMAC, rackmac_features,
1963 0,
1964 },
1965 { "RackMac1,2", "XServe rev. 2",
1966 PMAC_TYPE_RACKMAC, rackmac_features,
1967 0,
1968 },
1969 { "PowerMac3,6", "PowerMac G4 Windtunnel",
1970 PMAC_TYPE_WINDTUNNEL, rackmac_features,
1971 0,
1972 },
1973 { "PowerBook5,1", "PowerBook G4 17\"",
1974 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
1975 PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
1976 },
1977 { "PowerBook6,1", "PowerBook G4 12\"",
1978 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
1979 PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
1980 },
1981 };
1982
1983 /*
1984 * The toplevel feature_call callback
1985 */
1986 int __pmac
pmac_do_feature_call(unsigned int selector,...)1987 pmac_do_feature_call(unsigned int selector, ...)
1988 {
1989 struct device_node* node;
1990 int param, value, i;
1991 feature_call func = NULL;
1992 va_list args;
1993
1994 if (pmac_mb.features)
1995 for (i=0; pmac_mb.features[i].function; i++)
1996 if (pmac_mb.features[i].selector == selector) {
1997 func = pmac_mb.features[i].function;
1998 break;
1999 }
2000 if (!func)
2001 for (i=0; any_features[i].function; i++)
2002 if (any_features[i].selector == selector) {
2003 func = any_features[i].function;
2004 break;
2005 }
2006 if (!func)
2007 return -ENODEV;
2008
2009 va_start(args, selector);
2010 node = (struct device_node*)va_arg(args, void*);
2011 param = va_arg(args, int);
2012 value = va_arg(args, int);
2013 va_end(args);
2014
2015 return func(node, param, value);
2016 }
2017
2018 static int __init
probe_motherboard(void)2019 probe_motherboard(void)
2020 {
2021 int i;
2022 struct macio_chip* macio = &macio_chips[0];
2023 const char* model = NULL;
2024 struct device_node *dt;
2025
2026 /* Lookup known motherboard type in device-tree. First try an
2027 * exact match on the "model" property, then try a "compatible"
2028 * match is none is found.
2029 */
2030 dt = find_devices("device-tree");
2031 if (dt != NULL)
2032 model = (const char *) get_property(dt, "model", NULL);
2033 for(i=0; model && i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) {
2034 if (strcmp(model, pmac_mb_defs[i].model_string) == 0) {
2035 pmac_mb = pmac_mb_defs[i];
2036 goto found;
2037 }
2038 }
2039 for(i=0; i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) {
2040 if (machine_is_compatible(pmac_mb_defs[i].model_string)) {
2041 pmac_mb = pmac_mb_defs[i];
2042 goto found;
2043 }
2044 }
2045
2046 /* Fallback to selection depending on mac-io chip type */
2047 switch(macio->type) {
2048 case macio_grand_central:
2049 pmac_mb.model_id = PMAC_TYPE_PSURGE;
2050 pmac_mb.model_name = "Unknown PowerSurge";
2051 break;
2052 case macio_ohare:
2053 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_OHARE;
2054 pmac_mb.model_name = "Unknown OHare-based";
2055 break;
2056 case macio_heathrow:
2057 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_HEATHROW;
2058 pmac_mb.model_name = "Unknown Heathrow-based";
2059 pmac_mb.features = heathrow_desktop_features;
2060 break;
2061 case macio_paddington:
2062 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PADDINGTON;
2063 pmac_mb.model_name = "Unknown Paddington-based";
2064 pmac_mb.features = paddington_features;
2065 break;
2066 case macio_keylargo:
2067 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_CORE99;
2068 pmac_mb.model_name = "Unknown Keylargo-based";
2069 pmac_mb.features = core99_features;
2070 break;
2071 case macio_pangea:
2072 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PANGEA;
2073 pmac_mb.model_name = "Unknown Pangea-based";
2074 pmac_mb.features = pangea_features;
2075 break;
2076 case macio_intrepid:
2077 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_INTREPID;
2078 pmac_mb.model_name = "Unknown Intrepid-based";
2079 pmac_mb.features = intrepid_features;
2080 break;
2081 default:
2082 return -ENODEV;
2083 }
2084 found:
2085 /* Fixup Hooper vs. Comet */
2086 if (pmac_mb.model_id == PMAC_TYPE_HOOPER) {
2087 u32* mach_id_ptr = (u32*)ioremap(0xf3000034, 4);
2088 if (!mach_id_ptr)
2089 return -ENODEV;
2090 /* Here, I used to disable the media-bay on comet. It
2091 * appears this is wrong, the floppy connector is actually
2092 * a kind of media-bay and works with the current driver.
2093 */
2094 if ((*mach_id_ptr) & 0x20000000UL)
2095 pmac_mb.model_id = PMAC_TYPE_COMET;
2096 iounmap(mach_id_ptr);
2097 }
2098
2099 /* Set default value of powersave_nap on machines that support it.
2100 * It appears that uninorth rev 3 has a problem with it, we don't
2101 * enable it on those. In theory, the flush-on-lock property is
2102 * supposed to be set when not supported, but I'm not very confident
2103 * that all Apple OF revs did it properly, I do it the paranoid way.
2104 */
2105 while (uninorth_base && uninorth_rev > 3) {
2106 struct device_node* np = find_path_device("/cpus");
2107 if (!np || !np->child) {
2108 printk(KERN_WARNING "Can't find CPU(s) in device tree !\n");
2109 break;
2110 }
2111 np = np->child;
2112 /* Nap mode not supported on SMP */
2113 if (np->sibling)
2114 break;
2115 /* Nap mode not supported if flush-on-lock property is present */
2116 if (get_property(np, "flush-on-lock", NULL))
2117 break;
2118 powersave_nap = 1;
2119 printk(KERN_INFO "Processor NAP mode on idle enabled.\n");
2120 break;
2121 }
2122
2123 /* On CPUs that support it (750FX), lowspeed by default during
2124 * NAP mode
2125 */
2126 powersave_lowspeed = 1;
2127
2128 /* Check for "mobile" machine */
2129 if (model && (strncmp(model, "PowerBook", 9) == 0
2130 || strncmp(model, "iBook", 5) == 0))
2131 pmac_mb.board_flags |= PMAC_MB_MOBILE;
2132
2133
2134 printk(KERN_INFO "PowerMac motherboard: %s\n", pmac_mb.model_name);
2135 return 0;
2136 }
2137
2138 /* Initialize the Core99 UniNorth host bridge and memory controller
2139 */
2140 static void __init
probe_uninorth(void)2141 probe_uninorth(void)
2142 {
2143 unsigned long actrl;
2144
2145 /* Locate core99 Uni-N */
2146 uninorth_node = find_devices("uni-n");
2147 if (uninorth_node && uninorth_node->n_addrs > 0) {
2148 uninorth_base = ioremap(uninorth_node->addrs[0].address, 0x4000);
2149 uninorth_rev = in_be32(UN_REG(UNI_N_VERSION));
2150 } else
2151 uninorth_node = NULL;
2152
2153 if (!uninorth_node)
2154 return;
2155
2156 printk(KERN_INFO "Found Uninorth memory controller & host bridge, revision: %d\n",
2157 uninorth_rev);
2158 printk(KERN_INFO "Mapped at 0x%08lx\n", (unsigned long)uninorth_base);
2159
2160 /* Set the arbitrer QAck delay according to what Apple does
2161 */
2162 if (uninorth_rev < 0x11) {
2163 actrl = UN_IN(UNI_N_ARB_CTRL) & ~UNI_N_ARB_CTRL_QACK_DELAY_MASK;
2164 actrl |= ((uninorth_rev < 3) ? UNI_N_ARB_CTRL_QACK_DELAY105 :
2165 UNI_N_ARB_CTRL_QACK_DELAY) << UNI_N_ARB_CTRL_QACK_DELAY_SHIFT;
2166 UN_OUT(UNI_N_ARB_CTRL, actrl);
2167 }
2168
2169 /* Some more magic as done by them in recent MacOS X on UniNorth
2170 * revs 1.5 to 2.O and Pangea. Seem to toggle the UniN Maxbus/PCI
2171 * memory timeout
2172 */
2173 if ((uninorth_rev >= 0x11 && uninorth_rev <= 0x24) || uninorth_rev == 0xc0)
2174 UN_OUT(0x2160, UN_IN(0x2160) & 0x00ffffff);
2175 }
2176
2177 static void __init
probe_one_macio(const char * name,const char * compat,int type)2178 probe_one_macio(const char* name, const char* compat, int type)
2179 {
2180 struct device_node* node;
2181 int i;
2182 volatile u32* base;
2183 u32* revp;
2184
2185 node = find_devices(name);
2186 if (!node || !node->n_addrs)
2187 return;
2188 if (compat)
2189 do {
2190 if (device_is_compatible(node, compat))
2191 break;
2192 node = node->next;
2193 } while (node);
2194 if (!node)
2195 return;
2196 for(i=0; i<MAX_MACIO_CHIPS; i++) {
2197 if (!macio_chips[i].of_node)
2198 break;
2199 if (macio_chips[i].of_node == node)
2200 return;
2201 }
2202 if (i >= MAX_MACIO_CHIPS) {
2203 printk(KERN_ERR "pmac_feature: Please increase MAX_MACIO_CHIPS !\n");
2204 printk(KERN_ERR "pmac_feature: %s skipped\n", node->full_name);
2205 return;
2206 }
2207 base = (volatile u32*)ioremap(node->addrs[0].address, node->addrs[0].size);
2208 if (!base) {
2209 printk(KERN_ERR "pmac_feature: Can't map mac-io chip !\n");
2210 return;
2211 }
2212 if (type == macio_keylargo) {
2213 u32* did = (u32 *)get_property(node, "device-id", NULL);
2214 if (*did == 0x00000025)
2215 type = macio_pangea;
2216 if (*did == 0x0000003e)
2217 type = macio_intrepid;
2218 }
2219 macio_chips[i].of_node = node;
2220 macio_chips[i].type = type;
2221 macio_chips[i].base = base;
2222 macio_chips[i].flags = MACIO_FLAG_SCCB_ON | MACIO_FLAG_SCCB_ON;
2223 revp = (u32 *)get_property(node, "revision-id", NULL);
2224 if (revp)
2225 macio_chips[i].rev = *revp;
2226 printk(KERN_INFO "Found a %s mac-io controller, rev: %d, mapped at 0x%p\n",
2227 macio_names[type], macio_chips[i].rev, macio_chips[i].base);
2228 }
2229
2230 static int __init
probe_macios(void)2231 probe_macios(void)
2232 {
2233 /* Warning, ordering is important */
2234 probe_one_macio("gc", NULL, macio_grand_central);
2235 probe_one_macio("ohare", NULL, macio_ohare);
2236 probe_one_macio("pci106b,7", NULL, macio_ohareII);
2237 probe_one_macio("mac-io", "keylargo", macio_keylargo);
2238 probe_one_macio("mac-io", "paddington", macio_paddington);
2239 probe_one_macio("mac-io", "gatwick", macio_gatwick);
2240 probe_one_macio("mac-io", "heathrow", macio_heathrow);
2241
2242 /* Make sure the "main" macio chip appear first */
2243 if (macio_chips[0].type == macio_gatwick
2244 && macio_chips[1].type == macio_heathrow) {
2245 struct macio_chip temp = macio_chips[0];
2246 macio_chips[0] = macio_chips[1];
2247 macio_chips[1] = temp;
2248 }
2249 if (macio_chips[0].type == macio_ohareII
2250 && macio_chips[1].type == macio_ohare) {
2251 struct macio_chip temp = macio_chips[0];
2252 macio_chips[0] = macio_chips[1];
2253 macio_chips[1] = temp;
2254 }
2255
2256 return (macio_chips[0].of_node == NULL) ? -ENODEV : 0;
2257 }
2258
2259 static void __init
initial_serial_shutdown(struct device_node * np)2260 initial_serial_shutdown(struct device_node* np)
2261 {
2262 int len;
2263 struct slot_names_prop {
2264 int count;
2265 char name[1];
2266 } *slots;
2267 char *conn;
2268 int port_type = PMAC_SCC_ASYNC;
2269 int modem = 0;
2270
2271 slots = (struct slot_names_prop *)get_property(np, "slot-names", &len);
2272 conn = get_property(np, "AAPL,connector", &len);
2273 if (conn && (strcmp(conn, "infrared") == 0))
2274 port_type = PMAC_SCC_IRDA;
2275 else if (device_is_compatible(np, "cobalt"))
2276 modem = 1;
2277 else if (slots && slots->count > 0) {
2278 if (strcmp(slots->name, "IrDA") == 0)
2279 port_type = PMAC_SCC_IRDA;
2280 else if (strcmp(slots->name, "Modem") == 0)
2281 modem = 1;
2282 }
2283 if (modem)
2284 pmac_call_feature(PMAC_FTR_MODEM_ENABLE, np, 0, 0);
2285 pmac_call_feature(PMAC_FTR_SCC_ENABLE, np, port_type, 0);
2286 }
2287
2288 static void __init
set_initial_features(void)2289 set_initial_features(void)
2290 {
2291 struct device_node* np;
2292
2293 /* That hack appears to be necessary for some StarMax motherboards
2294 * but I'm not too sure it was audited for side-effects on other
2295 * ohare based machines...
2296 * Since I still have difficulties figuring the right way to
2297 * differenciate them all and since that hack was there for a long
2298 * time, I'll keep it around
2299 */
2300 if (macio_chips[0].type == macio_ohare && !find_devices("via-pmu")) {
2301 struct macio_chip* macio = &macio_chips[0];
2302 MACIO_OUT32(OHARE_FCR, STARMAX_FEATURES);
2303 } else if (macio_chips[0].type == macio_ohare) {
2304 struct macio_chip* macio = &macio_chips[0];
2305 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
2306 } else if (macio_chips[1].type == macio_ohare) {
2307 struct macio_chip* macio = &macio_chips[1];
2308 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
2309 }
2310
2311 if (macio_chips[0].type == macio_keylargo ||
2312 macio_chips[0].type == macio_pangea ||
2313 macio_chips[0].type == macio_intrepid) {
2314 /* Enable GMAC for now for PCI probing. It will be disabled
2315 * later on after PCI probe
2316 */
2317 np = find_devices("ethernet");
2318 while(np) {
2319 if (np->parent
2320 && device_is_compatible(np->parent, "uni-north")
2321 && device_is_compatible(np, "gmac"))
2322 core99_gmac_enable(np, 0, 1);
2323 np = np->next;
2324 }
2325
2326 /* Enable FW before PCI probe. Will be disabled later on
2327 * Note: We should have a batter way to check that we are
2328 * dealing with uninorth internal cell and not a PCI cell
2329 * on the external PCI. The code below works though.
2330 */
2331 np = find_devices("firewire");
2332 while(np) {
2333 if (np->parent
2334 && device_is_compatible(np->parent, "uni-north")
2335 && (device_is_compatible(np, "pci106b,18") ||
2336 device_is_compatible(np, "pci106b,30") ||
2337 device_is_compatible(np, "pci11c1,5811"))) {
2338 macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED;
2339 core99_firewire_enable(np, 0, 1);
2340 }
2341 np = np->next;
2342 }
2343
2344 /* Enable ATA-100 before PCI probe. */
2345 np = find_devices("ata-6");
2346 while(np) {
2347 if (np->parent
2348 && device_is_compatible(np->parent, "uni-north")
2349 && device_is_compatible(np, "kauai-ata")) {
2350 core99_ata100_enable(np, 1);
2351 }
2352 np = np->next;
2353 }
2354
2355 /* Switch airport off */
2356 np = find_devices("radio");
2357 while(np) {
2358 if (np && np->parent == macio_chips[0].of_node) {
2359 macio_chips[0].flags |= MACIO_FLAG_AIRPORT_ON;
2360 core99_airport_enable(np, 0, 0);
2361 }
2362 np = np->next;
2363 }
2364 }
2365
2366 /* On all machines that support sound PM, switch sound off */
2367 if (macio_chips[0].of_node)
2368 pmac_do_feature_call(PMAC_FTR_SOUND_CHIP_ENABLE,
2369 macio_chips[0].of_node, 0, 0);
2370
2371 /* While on some desktop G3s, we turn it back on */
2372 if (macio_chips[0].of_node && macio_chips[0].type == macio_heathrow
2373 && (pmac_mb.model_id == PMAC_TYPE_GOSSAMER ||
2374 pmac_mb.model_id == PMAC_TYPE_SILK)) {
2375 struct macio_chip* macio = &macio_chips[0];
2376 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
2377 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N);
2378 }
2379
2380
2381 /* On all machines, switch modem & serial ports off */
2382 np = find_devices("ch-a");
2383 while(np) {
2384 initial_serial_shutdown(np);
2385 np = np->next;
2386 }
2387 np = find_devices("ch-b");
2388 while(np) {
2389 initial_serial_shutdown(np);
2390 np = np->next;
2391 }
2392 }
2393
2394 void __init
pmac_feature_init(void)2395 pmac_feature_init(void)
2396 {
2397 /* Detect the UniNorth memory controller */
2398 probe_uninorth();
2399
2400 /* Probe mac-io controllers */
2401 if (probe_macios()) {
2402 printk(KERN_WARNING "No mac-io chip found\n");
2403 return;
2404 }
2405
2406 /* Probe machine type */
2407 if (probe_motherboard())
2408 printk(KERN_WARNING "Unknown PowerMac !\n");
2409
2410 /* Set some initial features (turn off some chips that will
2411 * be later turned on)
2412 */
2413 set_initial_features();
2414 }
2415
2416 void __init
pmac_feature_late_init(void)2417 pmac_feature_late_init(void)
2418 {
2419 struct device_node* np;
2420
2421 /* Request some resources late */
2422 if (uninorth_node)
2423 request_OF_resource(uninorth_node, 0, NULL);
2424 np = find_devices("hammerhead");
2425 if (np)
2426 request_OF_resource(np, 0, NULL);
2427 np = find_devices("interrupt-controller");
2428 if (np)
2429 request_OF_resource(np, 0, NULL);
2430 }
2431