1 /*
2 * Modifications by Matt Porter (mporter@mvista.com) to support
3 * PPC44x Book E processors.
4 *
5 * This file contains the routines for initializing the MMU
6 * on the 4xx series of chips.
7 * -- paulus
8 *
9 * Derived from arch/ppc/mm/init.c:
10 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
11 *
12 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
13 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
14 * Copyright (C) 1996 Paul Mackerras
15 * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
16 *
17 * Derived from "arch/i386/mm/init.c"
18 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
19 *
20 * This program is free software; you can redistribute it and/or
21 * modify it under the terms of the GNU General Public License
22 * as published by the Free Software Foundation; either version
23 * 2 of the License, or (at your option) any later version.
24 *
25 */
26
27 #include <linux/config.h>
28 #include <linux/signal.h>
29 #include <linux/sched.h>
30 #include <linux/kernel.h>
31 #include <linux/errno.h>
32 #include <linux/string.h>
33 #include <linux/types.h>
34 #include <linux/ptrace.h>
35 #include <linux/mman.h>
36 #include <linux/mm.h>
37 #include <linux/swap.h>
38 #include <linux/stddef.h>
39 #include <linux/vmalloc.h>
40 #include <linux/init.h>
41 #include <linux/delay.h>
42 #include <linux/bootmem.h>
43 #include <linux/highmem.h>
44
45 #include <asm/pgalloc.h>
46 #include <asm/prom.h>
47 #include <asm/io.h>
48 #include <asm/mmu_context.h>
49 #include <asm/pgtable.h>
50 #include <asm/mmu.h>
51 #include <asm/uaccess.h>
52 #include <asm/smp.h>
53 #include <asm/bootx.h>
54 #include <asm/machdep.h>
55 #include <asm/setup.h>
56 #include <asm/ibm44x.h>
57
58 #include "mmu_decl.h"
59 #include "mem_pieces.h"
60
61 extern char etext[], _stext[];
62 extern struct mem_pieces phys_avail;
63
64 /* Used by the 44x TLB replacement exception handler.
65 * Just needed it declared someplace.
66 */
67 unsigned int tlb_44x_index = 0;
68 unsigned int tlb_44x_hwater = 61;
69
70 /*
71 * "Pins" a 256MB TLB entry in AS0 for kernel lowmem
72 */
73 static void __init
ppc44x_pin_tlb(int slot,unsigned int virt,unsigned int phys)74 ppc44x_pin_tlb(int slot, unsigned int virt, unsigned int phys)
75 {
76 unsigned long attrib;
77
78 __asm__ __volatile__("\
79 clrrwi %2,%2,10\n\
80 ori %2,%2,%4\n\
81 clrrwi %1,%1,10\n\
82 li %0,0\n\
83 ori %0,%0,%5\n\
84 tlbwe %2,%3,%6\n\
85 tlbwe %1,%3,%7\n\
86 tlbwe %0,%3,%8"
87 :
88 : "r" (attrib), "r" (phys), "r" (virt), "r" (slot),
89 "i" (PPC44x_TLB_VALID | PPC44x_TLB_PAGESZ(PPC44x_PAGESZ_256M)),
90 "i" (PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G),
91 "i" (PPC44x_TLB_PAGEID),
92 "i" (PPC44x_TLB_XLAT),
93 "i" (PPC44x_TLB_ATTRIB));
94 }
95
96 /*
97 * Configure PPC44x TLB for AS0 exception processing.
98 */
99 static void __init
ppc44x_tlb_config(void)100 ppc44x_tlb_config(void)
101 {
102 unsigned int pinned_tlbs = 1;
103 int i;
104
105 /*
106 * If lowmem is not on a pin tlb entry size boundary,
107 * then reserve the last page of system memory. This
108 * eliminates the possibility of a speculative dcache
109 * fetch past the end of system memory that would
110 * result in a machine check exception.
111 */
112 if (total_lowmem & (PPC44x_PIN_SIZE - 1))
113 mem_pieces_remove(&phys_avail, total_lowmem - PAGE_SIZE, PAGE_SIZE, 1);
114
115 /* Determine number of entries necessary to cover lowmem */
116 pinned_tlbs = (unsigned int)
117 (_ALIGN(total_lowmem, PPC44x_PIN_SIZE) >> PPC44x_PIN_SHIFT);
118
119 /* Write upper watermark to save location */
120 tlb_44x_hwater = PPC44x_LOW_SLOT - pinned_tlbs;
121
122 /* If necessary, set additional pinned TLBs */
123 if (pinned_tlbs > 1)
124 for (i = (PPC44x_LOW_SLOT-(pinned_tlbs-1)); i < PPC44x_LOW_SLOT; i++) {
125 unsigned int phys_addr = (PPC44x_LOW_SLOT-i) * PPC44x_PIN_SIZE;
126 ppc44x_pin_tlb(i, phys_addr+PAGE_OFFSET, phys_addr);
127 }
128
129 /* Make sure vmalloc doesn't use virtual space covered by
130 the last pinned TLB entry. */
131 vmalloc_start = KERNELBASE + _ALIGN(total_lowmem, PPC44x_PIN_SIZE);
132 }
133
134 /*
135 * MMU_init_hw does the chip-specific initialization of the MMU hardware.
136 */
MMU_init_hw(void)137 void __init MMU_init_hw(void)
138 {
139 flush_instruction_cache();
140
141 ppc44x_tlb_config();
142 }
143