1/* 2 * HPMC (High Priority Machine Check) handler. 3 * 4 * Copyright (C) 1999 Philipp Rumpf <prumpf@tux.org> 5 * Copyright (C) 1999 Hewlett-Packard (Frank Rowand) 6 * Copyright (C) 2000 Hewlett-Packard (John Marvin) 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2, or (at your option) 11 * any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 */ 22 23 24/* 25 * This HPMC handler retrieves the HPMC pim data, resets IO and 26 * returns to the default trap handler with code set to 1 (HPMC). 27 * The default trap handler calls handle interruption, which 28 * does a stack and register dump. This at least allows kernel 29 * developers to get back to C code in virtual mode, where they 30 * have the option to examine and print values from memory that 31 * would help in debugging an HPMC caused by a software bug. 32 * 33 * There is more to do here: 34 * 35 * 1) On MP systems we need to synchronize processors 36 * before calling pdc/iodc. 37 * 2) We should be checking the system state and not 38 * returning to the fault handler if things are really 39 * bad. 40 * 41 */ 42 43 .level 1.1 44 .data 45 46#include <asm/assembly.h> 47#include <asm/pdc.h> 48 49 /* 50 * stack for os_hpmc, the HPMC handler. 51 * buffer for IODC procedures (for the HPMC handler). 52 * 53 * IODC requires 7K byte stack. That leaves 1K byte for os_hpmc. 54 */ 55 56 .align 4096 57hpmc_stack: 58 .block 16384 59 60#define HPMC_IODC_BUF_SIZE 0x8000 61 62 .align 4096 63hpmc_iodc_buf: 64 .block HPMC_IODC_BUF_SIZE 65 66 .align 8 67hpmc_raddr: 68 .block 128 69 70#define HPMC_PIM_DATA_SIZE 896 /* Enough to hold all architected 2.0 state */ 71 72 .export hpmc_pim_data, data 73 .align 8 74hpmc_pim_data: 75 .block HPMC_PIM_DATA_SIZE 76 77 .text 78 79 .export os_hpmc, code 80 .import intr_save, code 81 82os_hpmc: 83 84 /* 85 * registers modified: 86 * 87 * Using callee saves registers without saving them. The 88 * original values are in the pim dump if we need them. 89 * 90 * r2 (rp) return pointer 91 * r3 address of PDCE_PROC 92 * r4 scratch 93 * r5 scratch 94 * r23 (arg3) procedure arg 95 * r24 (arg2) procedure arg 96 * r25 (arg1) procedure arg 97 * r26 (arg0) procedure arg 98 * r30 (sp) stack pointer 99 * 100 * registers read: 101 * 102 * r26 contains address of PDCE_PROC on entry 103 * r28 (ret0) return value from procedure 104 */ 105 106 copy arg0, %r3 /* save address of PDCE_PROC */ 107 108 /* 109 * disable nested HPMCs 110 * 111 * Increment os_hpmc checksum to invalidate it. 112 * Do this before turning the PSW M bit off. 113 */ 114 115 mfctl %cr14, %r4 116 ldw 52(%r4),%r5 117 addi 1,%r5,%r5 118 stw %r5,52(%r4) 119 120 /* MP_FIXME: synchronize all processors. */ 121 122 /* Setup stack pointer. */ 123 124 ldil L%PA(hpmc_stack),sp 125 ldo R%PA(hpmc_stack)(sp),sp 126 127 ldo 128(sp),sp /* leave room for arguments */ 128 129 /* 130 * Most PDC routines require that the M bit be off. 131 * So turn on the Q bit and turn off the M bit. 132 */ 133 134 ldo 8(%r0),%r4 /* PSW Q on, PSW M off */ 135 mtctl %r4,ipsw 136 mtctl %r0,pcsq 137 mtctl %r0,pcsq 138 ldil L%PA(os_hpmc_1),%r4 139 ldo R%PA(os_hpmc_1)(%r4),%r4 140 mtctl %r4,pcoq 141 ldo 4(%r4),%r4 142 mtctl %r4,pcoq 143 rfi 144 nop 145 146os_hpmc_1: 147 148 /* Call PDC_PIM to get HPMC pim info */ 149 150 /* 151 * Note that on some newer boxes, PDC_PIM must be called 152 * before PDC_IO if you want IO to be reset. PDC_PIM sets 153 * a flag that PDC_IO examines. 154 */ 155 156 ldo PDC_PIM(%r0), arg0 157 ldo PDC_PIM_HPMC(%r0),arg1 /* Transfer HPMC data */ 158 ldil L%PA(hpmc_raddr),arg2 159 ldo R%PA(hpmc_raddr)(arg2),arg2 160 ldil L%PA(hpmc_pim_data),arg3 161 ldo R%PA(hpmc_pim_data)(arg3),arg3 162 ldil L%HPMC_PIM_DATA_SIZE,%r4 163 ldo R%HPMC_PIM_DATA_SIZE(%r4),%r4 164 stw %r4,-52(sp) 165 166 ldil L%PA(os_hpmc_2), rp 167 bv (r3) /* call pdce_proc */ 168 ldo R%PA(os_hpmc_2)(rp), rp 169 170os_hpmc_2: 171 comib,<> 0,ret0, os_hpmc_fail 172 173 /* Reset IO by calling the hversion dependent PDC_IO routine */ 174 175 ldo PDC_IO(%r0),arg0 176 ldo 0(%r0),arg1 /* log IO errors */ 177 ldo 0(%r0),arg2 /* reserved */ 178 ldo 0(%r0),arg3 /* reserved */ 179 stw %r0,-52(sp) /* reserved */ 180 181 ldil L%PA(os_hpmc_3),rp 182 bv (%r3) /* call pdce_proc */ 183 ldo R%PA(os_hpmc_3)(rp),rp 184 185os_hpmc_3: 186 187 /* FIXME? Check for errors from PDC_IO (-1 might be OK) */ 188 189 /* 190 * Initialize the IODC console device (HPA,SPA, path etc. 191 * are stored on page 0. 192 */ 193 194 /* 195 * Load IODC into hpmc_iodc_buf by calling PDC_IODC. 196 * Note that PDC_IODC handles flushing the appropriate 197 * data and instruction cache lines. 198 */ 199 200 ldo PDC_IODC(%r0),arg0 201 ldo PDC_IODC_READ(%r0),arg1 202 ldil L%PA(hpmc_raddr),arg2 203 ldo R%PA(hpmc_raddr)(arg2),arg2 204 ldw BOOT_CONSOLE_HPA_OFFSET(%r0),arg3 /* console hpa */ 205 ldo PDC_IODC_RI_INIT(%r0),%r4 206 stw %r4,-52(sp) 207 ldil L%PA(hpmc_iodc_buf),%r4 208 ldo R%PA(hpmc_iodc_buf)(%r4),%r4 209 stw %r4,-56(sp) 210 ldil L%HPMC_IODC_BUF_SIZE,%r4 211 ldo R%HPMC_IODC_BUF_SIZE(%r4),%r4 212 stw %r4,-60(sp) 213 214 ldil L%PA(os_hpmc_4),rp 215 bv (%r3) /* call pdce_proc */ 216 ldo R%PA(os_hpmc_4)(rp),rp 217 218os_hpmc_4: 219 comib,<> 0,ret0,os_hpmc_fail 220 221 /* Call the entry init (just loaded by PDC_IODC) */ 222 223 ldw BOOT_CONSOLE_HPA_OFFSET(%r0),arg0 /* console hpa */ 224 ldo ENTRY_INIT_MOD_DEV(%r0), arg1 225 ldw BOOT_CONSOLE_SPA_OFFSET(%r0),arg2 /* console spa */ 226 depi 0,31,11,arg2 /* clear bits 21-31 */ 227 ldo BOOT_CONSOLE_PATH_OFFSET(%r0),arg3 /* console path */ 228 ldil L%PA(hpmc_raddr),%r4 229 ldo R%PA(hpmc_raddr)(%r4),%r4 230 stw %r4, -52(sp) 231 stw %r0, -56(sp) /* HV */ 232 stw %r0, -60(sp) /* HV */ 233 stw %r0, -64(sp) /* HV */ 234 stw %r0, -68(sp) /* lang, must be zero */ 235 236 ldil L%PA(hpmc_iodc_buf),%r5 237 ldo R%PA(hpmc_iodc_buf)(%r5),%r5 238 ldil L%PA(os_hpmc_5),rp 239 bv (%r5) 240 ldo R%PA(os_hpmc_5)(rp),rp 241 242os_hpmc_5: 243 comib,<> 0,ret0,os_hpmc_fail 244 245 /* Prepare to call intr_save */ 246 247 /* 248 * Load kernel page directory (load into user also, since 249 * we don't intend to ever return to user land anyway) 250 */ 251 252 ldil L%PA(swapper_pg_dir),%r4 253 ldo R%PA(swapper_pg_dir)(%r4),%r4 254 mtctl %r4,%cr24 /* Initialize kernel root pointer */ 255 mtctl %r4,%cr25 /* Initialize user root pointer */ 256 257 /* Clear sr4-sr7 */ 258 259 mtsp %r0, %sr4 260 mtsp %r0, %sr5 261 mtsp %r0, %sr6 262 mtsp %r0, %sr7 263 264 tovirt_r1 %r30 /* make sp virtual */ 265 266 rsm 8,%r0 /* Clear Q bit */ 267 ldi 1,%r8 /* Set trap code to "1" for HPMC */ 268 ldil L%PA(intr_save), %r1 269 ldo R%PA(intr_save)(%r1), %r1 270 be 0(%sr7,%r1) 271 nop 272 273os_hpmc_fail: 274 275 /* 276 * Reset the system 277 * 278 * Some systems may lockup from a broadcast reset, so try the 279 * hversion PDC_BROADCAST_RESET() first. 280 * MP_FIXME: reset all processors if more than one central bus. 281 */ 282 283 /* PDC_BROADCAST_RESET() */ 284 285 ldo PDC_BROADCAST_RESET(%r0),arg0 286 ldo 0(%r0),arg1 /* do reset */ 287 288 ldil L%PA(os_hpmc_6),rp 289 bv (%r3) /* call pdce_proc */ 290 ldo R%PA(os_hpmc_6)(rp),rp 291 292os_hpmc_6: 293 294 /* 295 * possible return values: 296 * -1 non-existent procedure 297 * -2 non-existent option 298 * -16 unaligned stack 299 * 300 * If call returned, do a broadcast reset. 301 */ 302 303 ldil L%0xfffc0000,%r4 /* IO_BROADCAST */ 304 ldo 5(%r0),%r5 305 stw %r5,48(%r4) /* CMD_RESET to IO_COMMAND offset */ 306 307 b . 308 nop 309 310 /* this label used to compute os_hpmc checksum */ 311 312 .export os_hpmc_end, code 313 314os_hpmc_end: 315 316 nop 317