1 /*
2 * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */
18
19 #include <linux/kernel.h>
20 #include <linux/reboot.h>
21 #include <linux/string.h>
22
23 #include <asm/bootinfo.h>
24 #include <asm/mipsregs.h>
25 #include <asm/io.h>
26 #include <asm/sibyte/sb1250.h>
27 #include <asm/sibyte/sb1250_regs.h>
28 #include <asm/sibyte/sb1250_scd.h>
29 #include <asm/sibyte/64bit.h>
30
31 unsigned int sb1_pass;
32 unsigned int soc_pass;
33 unsigned int soc_type;
34 unsigned int periph_rev;
35 unsigned int zbbus_mhz;
36
37 static char *soc_str;
38 static char *pass_str;
39 static unsigned int war_pass; /* XXXKW don't overload PASS defines? */
40
41 static inline int setup_bcm1250(void);
42 static inline int setup_bcm112x(void);
43
44 /* Setup code likely to be common to all SiByte platforms */
45
sys_rev_decode(void)46 static inline int sys_rev_decode(void)
47 {
48 int ret = 0;
49
50 war_pass = soc_pass;
51 switch (soc_type) {
52 case K_SYS_SOC_TYPE_BCM1250:
53 case K_SYS_SOC_TYPE_BCM1250_ALT:
54 case K_SYS_SOC_TYPE_BCM1250_ALT2:
55 soc_str = "BCM1250";
56 ret = setup_bcm1250();
57 break;
58 case K_SYS_SOC_TYPE_BCM1120:
59 soc_str = "BCM1120";
60 ret = setup_bcm112x();
61 break;
62 case K_SYS_SOC_TYPE_BCM1125:
63 soc_str = "BCM1125";
64 ret = setup_bcm112x();
65 break;
66 case K_SYS_SOC_TYPE_BCM1125H:
67 soc_str = "BCM1125H";
68 ret = setup_bcm112x();
69 break;
70 default:
71 prom_printf("Unknown SOC type %x\n", soc_type);
72 ret = 1;
73 break;
74 }
75 return ret;
76 }
77
setup_bcm1250(void)78 static inline int setup_bcm1250(void)
79 {
80 int ret = 0;
81
82 switch (soc_pass) {
83 case K_SYS_REVISION_BCM1250_PASS1:
84 periph_rev = 1;
85 pass_str = "Pass 1";
86 break;
87 case K_SYS_REVISION_BCM1250_A10:
88 periph_rev = 2;
89 pass_str = "A8/A10";
90 /* XXXKW different war_pass? */
91 war_pass = K_SYS_REVISION_BCM1250_PASS2;
92 break;
93 case K_SYS_REVISION_BCM1250_PASS2_2:
94 periph_rev = 2;
95 pass_str = "B1";
96 break;
97 case K_SYS_REVISION_BCM1250_B2:
98 periph_rev = 2;
99 pass_str = "B2";
100 war_pass = K_SYS_REVISION_BCM1250_PASS2_2;
101 break;
102 case K_SYS_REVISION_BCM1250_PASS3:
103 periph_rev = 3;
104 pass_str = "C0";
105 break;
106 case K_SYS_REVISION_BCM1250_C1:
107 periph_rev = 3;
108 pass_str = "C1";
109 break;
110 default:
111 if (soc_pass < K_SYS_REVISION_BCM1250_PASS2_2) {
112 periph_rev = 2;
113 pass_str = "A0-A6";
114 war_pass = K_SYS_REVISION_BCM1250_PASS2;
115 } else {
116 prom_printf("Unknown BCM1250 rev %x\n", soc_pass);
117 ret = 1;
118 }
119 break;
120 }
121 return ret;
122 }
123
setup_bcm112x(void)124 static inline int setup_bcm112x(void)
125 {
126 int ret = 0;
127
128 switch (soc_pass) {
129 case 0:
130 /* Early build didn't have revid set */
131 periph_rev = 3;
132 pass_str = "A1";
133 war_pass = K_SYS_REVISION_BCM112x_A1;
134 break;
135 case K_SYS_REVISION_BCM112x_A1:
136 periph_rev = 3;
137 pass_str = "A1";
138 break;
139 case K_SYS_REVISION_BCM112x_A2:
140 periph_rev = 3;
141 pass_str = "A2";
142 break;
143 default:
144 prom_printf("Unknown %s rev %x\n", soc_str, soc_pass);
145 ret = 1;
146 }
147 return ret;
148 }
149
sb1250_setup(void)150 void sb1250_setup(void)
151 {
152 uint64_t sys_rev;
153 int plldiv;
154 int bad_config = 0;
155
156 sb1_pass = read_c0_prid() & 0xff;
157 sys_rev = in64(IO_SPACE_BASE | A_SCD_SYSTEM_REVISION);
158 soc_type = SYS_SOC_TYPE(sys_rev);
159 soc_pass = G_SYS_REVISION(sys_rev);
160
161 if (sys_rev_decode()) {
162 prom_printf("Restart after failure to identify SiByte chip\n");
163 machine_restart(NULL);
164 }
165
166 plldiv = G_SYS_PLL_DIV(in64(IO_SPACE_BASE | A_SCD_SYSTEM_CFG));
167 zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25);
168 #ifndef CONFIG_SB1_PASS_1_WORKAROUNDS
169 out64(0, KSEG1 + A_SCD_ZBBUS_CYCLE_COUNT);
170 #endif
171
172 prom_printf("Broadcom SiByte %s %s @ %d MHz (SB1 rev %d)\n",
173 soc_str, pass_str, zbbus_mhz * 2, sb1_pass);
174 prom_printf("Board type: %s\n", get_system_type());
175
176 switch(war_pass) {
177 case K_SYS_REVISION_BCM1250_PASS1:
178 #ifndef CONFIG_SB1_PASS_1_WORKAROUNDS
179 prom_printf("@@@@ This is a BCM1250 A0-A2 (Pass 1) board, and the kernel doesn't have the proper workarounds compiled in. @@@@\n");
180 bad_config = 1;
181 #endif
182 break;
183 case K_SYS_REVISION_BCM1250_PASS2:
184 /* Pass 2 - easiest as default for now - so many numbers */
185 #if !defined(CONFIG_SB1_PASS_2_WORKAROUNDS) || !defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS)
186 prom_printf("@@@@ This is a BCM1250 A3-A10 board, and the kernel doesn't have the proper workarounds compiled in. @@@@\n");
187 bad_config = 1;
188 #endif
189 #ifdef CONFIG_CPU_HAS_PREFETCH
190 prom_printf("@@@@ Prefetches may be enabled in this kernel, but are buggy on this board. @@@@\n");
191 bad_config = 1;
192 #endif
193 break;
194 case K_SYS_REVISION_BCM1250_PASS2_2:
195 #ifndef CONFIG_SB1_PASS_2_WORKAROUNDS
196 prom_printf("@@@@ This is a BCM1250 B1/B2. board, and the kernel doesn't have the proper workarounds compiled in. @@@@\n");
197 bad_config = 1;
198 #endif
199 #if defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS) || !defined(CONFIG_CPU_HAS_PREFETCH)
200 prom_printf("@@@@ This is a BCM1250 B1/B2, but the kernel is conservatively configured for an 'A' stepping. @@@@\n");
201 #endif
202 break;
203 default:
204 break;
205 }
206 if (bad_config) {
207 prom_printf("Invalid configuration for this chip.\n");
208 machine_restart(NULL);
209 }
210 }
211