1 /* 2 * Ocelot-C Board Register Definitions 3 * 4 * (C) 2002 Momentum Computer Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or (at your 9 * option) any later version. 10 * 11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 21 * 22 * You should have received a copy of the GNU General Public License along 23 * with this program; if not, write to the Free Software Foundation, Inc., 24 * 675 Mass Ave, Cambridge, MA 02139, USA. 25 * 26 * Louis Hamilton, Red Hat, Inc. 27 * hamilton@redhat.com [MIPS64 modifications] 28 */ 29 30 #ifndef __OCELOT_C_FPGA_H__ 31 #define __OCELOT_C_FPGA_H__ 32 33 #ifdef CONFIG_MIPS64 34 #define OCELOT_C_CS0_ADDR (0xfffffffffc000000) 35 #else 36 #define OCELOT_C_CS0_ADDR (0xfc000000) 37 #endif 38 39 #define OCELOT_C_REG_BOARDREV 0x0 40 #define OCELOT_C_REG_FPGA_REV 0x1 41 #define OCELOT_C_REG_FPGA_TYPE 0x2 42 #define OCELOT_C_REG_RESET_STATUS 0x3 43 #define OCELOT_C_REG_BOARD_STATUS 0x4 44 #define OCELOT_C_REG_CPCI_ID 0x5 45 #define OCELOT_C_REG_SET 0x6 46 #define OCELOT_C_REG_CLR 0x7 47 #define OCELOT_C_REG_EEPROM_MODE 0x9 48 #define OCELOT_C_REG_INTMASK 0xa 49 #define OCELOT_C_REG_INTSTAT 0xb 50 #define OCELOT_C_REG_UART_INTMASK 0xc 51 #define OCELOT_C_REG_UART_INTSTAT 0xd 52 #define OCELOT_C_REG_INTSET 0xe 53 #define OCELOT_C_REG_INTCLR 0xf 54 55 #define OCELOT_FPGA_WRITE(x, y) writeb(x, OCELOT_C_CS0_ADDR + OCELOT_C_REG_##y) 56 #define OCELOT_FPGA_READ(x) readb(OCELOT_C_CS0_ADDR + OCELOT_C_REG_##x) 57 58 #endif 59