1 /*
2  * Copyright 2001 MontaVista Software Inc.
3  * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
4  *
5  *  arch/mips/ddb5xxx/ddb5477/irq_5477.c
6  *     This file defines the irq handler for Vrc5477.
7  *
8  * This program is free software; you can redistribute  it and/or modify it
9  * under  the terms of  the GNU General  Public License as published by the
10  * Free Software Foundation;  either version 2 of the  License, or (at your
11  * option) any later version.
12  *
13  */
14 
15 /*
16  * Vrc5477 defines 32 IRQs.
17  *
18  * This file exports one function:
19  *	vrc5477_irq_init(u32 irq_base);
20  */
21 
22 #include <linux/interrupt.h>
23 #include <linux/types.h>
24 #include <linux/ptrace.h>
25 
26 #include <asm/debug.h>
27 
28 #include <asm/ddb5xxx/ddb5xxx.h>
29 
30 /* number of total irqs supported by Vrc5477 */
31 #define	NUM_5477_IRQ		32
32 
33 static int vrc5477_irq_base = -1;
34 
35 
36 static void
vrc5477_irq_enable(unsigned int irq)37 vrc5477_irq_enable(unsigned int irq)
38 {
39 	db_assert(vrc5477_irq_base != -1);
40 	db_assert(irq >= vrc5477_irq_base);
41 	db_assert(irq < vrc5477_irq_base+ NUM_5477_IRQ);
42 
43 	ll_vrc5477_irq_enable(irq - vrc5477_irq_base);
44 }
45 
46 static void
vrc5477_irq_disable(unsigned int irq)47 vrc5477_irq_disable(unsigned int irq)
48 {
49 	db_assert(vrc5477_irq_base != -1);
50 	db_assert(irq >= vrc5477_irq_base);
51 	db_assert(irq < vrc5477_irq_base + NUM_5477_IRQ);
52 
53 	ll_vrc5477_irq_disable(irq - vrc5477_irq_base);
54 }
55 
vrc5477_irq_startup(unsigned int irq)56 static unsigned int vrc5477_irq_startup(unsigned int irq)
57 {
58 	vrc5477_irq_enable(irq);
59 	return 0;
60 }
61 
62 #define	vrc5477_irq_shutdown	vrc5477_irq_disable
63 
64 static void
vrc5477_irq_ack(unsigned int irq)65 vrc5477_irq_ack(unsigned int irq)
66 {
67 	db_assert(vrc5477_irq_base != -1);
68 	db_assert(irq >= vrc5477_irq_base);
69 	db_assert(irq < vrc5477_irq_base+ NUM_5477_IRQ);
70 
71 	/* clear the interrupt bit */
72 	/* some irqs require the driver to clear the sources */
73 	ddb_out32(DDB_INTCLR32, 1 << (irq - vrc5477_irq_base));
74 
75 	/* disable interrupt - some handler will re-enable the irq
76 	 * and if the interrupt is leveled, we will have infinite loop
77 	 */
78 	ll_vrc5477_irq_disable(irq - vrc5477_irq_base);
79 }
80 
81 static void
vrc5477_irq_end(unsigned int irq)82 vrc5477_irq_end(unsigned int irq)
83 {
84 	db_assert(vrc5477_irq_base != -1);
85 	db_assert(irq >= vrc5477_irq_base);
86 	db_assert(irq < vrc5477_irq_base + NUM_5477_IRQ);
87 
88 	if(!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
89 		ll_vrc5477_irq_enable( irq - vrc5477_irq_base);
90 }
91 
92 hw_irq_controller vrc5477_irq_controller = {
93 	"vrc5477_irq",
94 	vrc5477_irq_startup,
95 	vrc5477_irq_shutdown,
96 	vrc5477_irq_enable,
97 	vrc5477_irq_disable,
98 	vrc5477_irq_ack,
99 	vrc5477_irq_end,
100 	NULL			/* no affinity stuff for UP */
101 };
102 
103 void
vrc5477_irq_init(u32 irq_base)104 vrc5477_irq_init(u32 irq_base)
105 {
106 	extern irq_desc_t irq_desc[];
107 	u32 i;
108 
109 	for (i= irq_base; i< irq_base+ NUM_5477_IRQ; i++) {
110 		irq_desc[i].status = IRQ_DISABLED;
111 		irq_desc[i].action = NULL;
112 		irq_desc[i].depth = 1;
113 		irq_desc[i].handler = &vrc5477_irq_controller;
114 	}
115 
116 	vrc5477_irq_base = irq_base;
117 }
118 
ll_vrc5477_irq_route(int vrc5477_irq,int ip)119 void ll_vrc5477_irq_route(int vrc5477_irq, int ip)
120 {
121 	u32 reg_value;
122 	u32 reg_bitmask;
123 	u32 reg_index;
124 
125 	db_assert(vrc5477_irq >= 0);
126 	db_assert(vrc5477_irq < NUM_5477_IRQ);
127 	db_assert(ip >= 0);
128 	db_assert((ip < 5) || (ip == 6));
129 
130 	reg_index = DDB_INTCTRL0 + vrc5477_irq/8*4;
131 	reg_value = ddb_in32(reg_index);
132 	reg_bitmask = 7 << (vrc5477_irq % 8 * 4);
133 	reg_value &= ~reg_bitmask;
134 	reg_value |= ip << (vrc5477_irq % 8 * 4);
135 	ddb_out32(reg_index, reg_value);
136 }
137 
ll_vrc5477_irq_enable(int vrc5477_irq)138 void ll_vrc5477_irq_enable(int vrc5477_irq)
139 {
140 	u32 reg_value;
141 	u32 reg_bitmask;
142 	u32 reg_index;
143 
144 	db_assert(vrc5477_irq >= 0);
145 	db_assert(vrc5477_irq < NUM_5477_IRQ);
146 
147 	reg_index = DDB_INTCTRL0 + vrc5477_irq/8*4;
148 	reg_value = ddb_in32(reg_index);
149 	reg_bitmask = 8 << (vrc5477_irq % 8 * 4);
150 	db_assert((reg_value & reg_bitmask) == 0);
151 	ddb_out32(reg_index, reg_value | reg_bitmask);
152 }
153 
ll_vrc5477_irq_disable(int vrc5477_irq)154 void ll_vrc5477_irq_disable(int vrc5477_irq)
155 {
156 	u32 reg_value;
157 	u32 reg_bitmask;
158 	u32 reg_index;
159 
160 	db_assert(vrc5477_irq >= 0);
161 	db_assert(vrc5477_irq < NUM_5477_IRQ);
162 
163 	reg_index = DDB_INTCTRL0 + vrc5477_irq/8*4;
164 	reg_value = ddb_in32(reg_index);
165 	reg_bitmask = 8 << (vrc5477_irq % 8 * 4);
166 
167 	/* we assert that the interrupt is enabled (perhaps over-zealous) */
168 	db_assert( (reg_value & reg_bitmask) != 0);
169 	ddb_out32(reg_index, reg_value & ~reg_bitmask);
170 }
171