xref: /DragonStub/inc/protocol/efidbg.h (revision 530d68ba191850edafc6da22cb2df55bec0c5fa5)
1*530d68baSNigel Croxon /*
2*530d68baSNigel Croxon  * Copyright (c) 1999, 2000
3*530d68baSNigel Croxon  * Intel Corporation.
4*530d68baSNigel Croxon  * All rights reserved.
5*530d68baSNigel Croxon  *
6*530d68baSNigel Croxon  * Redistribution and use in source and binary forms, with or without
7*530d68baSNigel Croxon  * modification, are permitted provided that the following conditions
8*530d68baSNigel Croxon  * are met:
9*530d68baSNigel Croxon  *
10*530d68baSNigel Croxon  * 1. Redistributions of source code must retain the above copyright
11*530d68baSNigel Croxon  *    notice, this list of conditions and the following disclaimer.
12*530d68baSNigel Croxon  *
13*530d68baSNigel Croxon  * 2. Redistributions in binary form must reproduce the above copyright
14*530d68baSNigel Croxon  *    notice, this list of conditions and the following disclaimer in the
15*530d68baSNigel Croxon  *    documentation and/or other materials provided with the distribution.
16*530d68baSNigel Croxon  *
17*530d68baSNigel Croxon  * 3. All advertising materials mentioning features or use of this software
18*530d68baSNigel Croxon  *    must display the following acknowledgement:
19*530d68baSNigel Croxon  *
20*530d68baSNigel Croxon  *    This product includes software developed by Intel Corporation and
21*530d68baSNigel Croxon  *    its contributors.
22*530d68baSNigel Croxon  *
23*530d68baSNigel Croxon  * 4. Neither the name of Intel Corporation or its contributors may be
24*530d68baSNigel Croxon  *    used to endorse or promote products derived from this software
25*530d68baSNigel Croxon  *    without specific prior written permission.
26*530d68baSNigel Croxon  *
27*530d68baSNigel Croxon  * THIS SOFTWARE IS PROVIDED BY INTEL CORPORATION AND CONTRIBUTORS ``AS IS''
28*530d68baSNigel Croxon  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29*530d68baSNigel Croxon  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30*530d68baSNigel Croxon  * ARE DISCLAIMED.  IN NO EVENT SHALL INTEL CORPORATION OR CONTRIBUTORS BE
31*530d68baSNigel Croxon  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32*530d68baSNigel Croxon  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33*530d68baSNigel Croxon  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34*530d68baSNigel Croxon  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35*530d68baSNigel Croxon  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36*530d68baSNigel Croxon  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
37*530d68baSNigel Croxon  * THE POSSIBILITY OF SUCH DAMAGE.
38*530d68baSNigel Croxon  *
39*530d68baSNigel Croxon  */
40*530d68baSNigel Croxon 
41*530d68baSNigel Croxon 
42*530d68baSNigel Croxon #ifndef _EFIDBG_H_
43*530d68baSNigel Croxon #define _EFIDBG_H_
44*530d68baSNigel Croxon 
45*530d68baSNigel Croxon #include "eficontext.h"
46*530d68baSNigel Croxon #include "efiser.h"
47*530d68baSNigel Croxon 
48*530d68baSNigel Croxon typedef struct _DEBUGPORT_16550_CONFIG_DATA {
49*530d68baSNigel Croxon         UINT32							PortAddress;
50*530d68baSNigel Croxon         UINT64                          BaudRate;
51*530d68baSNigel Croxon     	UINT32               			ReceiveFifoDepth;
52*530d68baSNigel Croxon     	UINT32               			Timeout;
53*530d68baSNigel Croxon         UINT8                           Parity;
54*530d68baSNigel Croxon         UINT8                           DataBits;
55*530d68baSNigel Croxon         UINT8                           StopBits;
56*530d68baSNigel Croxon 	    UINT32                       	ControlMask;
57*530d68baSNigel Croxon         BOOLEAN							RtsCtsEnable;		// RTS, CTS control
58*530d68baSNigel Croxon } DEBUGPORT_16550_CONFIG_DATA;
59*530d68baSNigel Croxon 
60*530d68baSNigel Croxon typedef struct _DEBUGPORT_16550_DEVICE_PATH {
61*530d68baSNigel Croxon         EFI_DEVICE_PATH                 Header;
62*530d68baSNigel Croxon         DEBUGPORT_16550_CONFIG_DATA		ConfigData;
63*530d68baSNigel Croxon } DEBUGPORT_16550_DEVICE_PATH;
64*530d68baSNigel Croxon 
65*530d68baSNigel Croxon typedef union {
66*530d68baSNigel Croxon     EFI_DEVICE_PATH                     DevPath;
67*530d68baSNigel Croxon     DEBUGPORT_16550_DEVICE_PATH         Uart;
68*530d68baSNigel Croxon     // add new types of debugport device paths to this union...
69*530d68baSNigel Croxon } DEBUGPORT_DEV_PATH;
70*530d68baSNigel Croxon 
71*530d68baSNigel Croxon 
72*530d68baSNigel Croxon //
73*530d68baSNigel Croxon // Debug Support protocol {2755590C-6F3C-42FA-9EA4-A3BA543CDA25}
74*530d68baSNigel Croxon //
75*530d68baSNigel Croxon 
76*530d68baSNigel Croxon #define DEBUG_SUPPORT_PROTOCOL \
77*530d68baSNigel Croxon { 0x2755590C, 0x6F3C, 0x42fa, 0x9E, 0xA4, 0xA3, 0xBA, 0x54, 0x3C, 0xDA, 0x25 }
78*530d68baSNigel Croxon 
79*530d68baSNigel Croxon 
80*530d68baSNigel Croxon typedef UINTN EXCEPTION_TYPE;
81*530d68baSNigel Croxon 
82*530d68baSNigel Croxon typedef
83*530d68baSNigel Croxon VOID
84*530d68baSNigel Croxon (*EXCEPTION_HANDLER) (
85*530d68baSNigel Croxon 	IN EXCEPTION_TYPE ExceptionType,
86*530d68baSNigel Croxon     IN SYSTEM_CONTEXT *SystemContext
87*530d68baSNigel Croxon     );
88*530d68baSNigel Croxon 
89*530d68baSNigel Croxon typedef
90*530d68baSNigel Croxon EFI_STATUS
91*530d68baSNigel Croxon (EFIAPI *EFI_REGISTER_TIMER_TICK_CALLBACK) (
92*530d68baSNigel Croxon     IN struct _EFI_DEBUG_SUPPORT_INTERFACE  *This,
93*530d68baSNigel Croxon     IN EXCEPTION_HANDLER	                TimerTickCallback
94*530d68baSNigel Croxon     );
95*530d68baSNigel Croxon 
96*530d68baSNigel Croxon typedef
97*530d68baSNigel Croxon EFI_STATUS
98*530d68baSNigel Croxon (EFIAPI *EFI_REGISTER_EXCEPTION_HANDLER) (
99*530d68baSNigel Croxon     IN     struct _EFI_DEBUG_SUPPORT_INTERFACE  *This,
100*530d68baSNigel Croxon     IN     EXCEPTION_HANDLER                    ExceptionHandler,
101*530d68baSNigel Croxon     IN     EXCEPTION_TYPE                       ExceptionType
102*530d68baSNigel Croxon     );
103*530d68baSNigel Croxon 
104*530d68baSNigel Croxon typedef
105*530d68baSNigel Croxon EFI_STATUS
106*530d68baSNigel Croxon (EFIAPI *EFI_IP_CALL_TRACE) (
107*530d68baSNigel Croxon     IN     struct _EFI_DEBUG_SUPPORT_INTERFACE  *This
108*530d68baSNigel Croxon     );
109*530d68baSNigel Croxon 
110*530d68baSNigel Croxon 
111*530d68baSNigel Croxon #define EFI_DEBUG_SUPPORT_INTERFACE_REVISION     0x00010000
112*530d68baSNigel Croxon 
113*530d68baSNigel Croxon typedef struct _EFI_DEBUG_SUPPORT_INTERFACE {
114*530d68baSNigel Croxon     UINT32                          	Revision;
115*530d68baSNigel Croxon     EFI_REGISTER_TIMER_TICK_CALLBACK	RegisterTimerTickCallback;
116*530d68baSNigel Croxon     EFI_REGISTER_EXCEPTION_HANDLER  	RegisterExceptionHandler;
117*530d68baSNigel Croxon     EFI_IP_CALL_TRACE               	IpCallTrace;
118*530d68baSNigel Croxon } EFI_DEBUG_SUPPORT_INTERFACE;
119*530d68baSNigel Croxon 
120*530d68baSNigel Croxon 
121*530d68baSNigel Croxon //
122*530d68baSNigel Croxon // Debugport io protocol {EBA4E8D2-3858-41EC-A281-2647BA9660D0}
123*530d68baSNigel Croxon //
124*530d68baSNigel Croxon 
125*530d68baSNigel Croxon #define DEBUGPORT_IO_PROTOCOL \
126*530d68baSNigel Croxon { 0XEBA4E8D2, 0X3858, 0X41EC, 0XA2, 0X81, 0X26, 0X47, 0XBA, 0X96, 0X60, 0XD0 }
127*530d68baSNigel Croxon 
128*530d68baSNigel Croxon 
129*530d68baSNigel Croxon typedef
130*530d68baSNigel Croxon EFI_STATUS
131*530d68baSNigel Croxon (EFIAPI *EFI_DEBUGPORT_IO_RESET) (
132*530d68baSNigel Croxon     IN struct _EFI_DEBUGPORT_IO_INTERFACE  	*This
133*530d68baSNigel Croxon     );
134*530d68baSNigel Croxon 
135*530d68baSNigel Croxon typedef
136*530d68baSNigel Croxon EFI_STATUS
137*530d68baSNigel Croxon (EFIAPI *EFI_DEBUGPORT_IO_READ) (
138*530d68baSNigel Croxon     IN     struct _EFI_DEBUGPORT_IO_INTERFACE	*This,
139*530d68baSNigel Croxon     IN OUT UINTN                    		*BufferSize,
140*530d68baSNigel Croxon     OUT VOID                         		*Buffer
141*530d68baSNigel Croxon     );
142*530d68baSNigel Croxon 
143*530d68baSNigel Croxon typedef
144*530d68baSNigel Croxon EFI_STATUS
145*530d68baSNigel Croxon (EFIAPI *EFI_DEBUGPORT_IO_WRITE) (
146*530d68baSNigel Croxon     IN     struct _EFI_DEBUGPORT_IO_INTERFACE *This,
147*530d68baSNigel Croxon     IN OUT UINTN                    		*BufferSize,
148*530d68baSNigel Croxon     IN VOID                         		*Buffer
149*530d68baSNigel Croxon     );
150*530d68baSNigel Croxon 
151*530d68baSNigel Croxon #define EFI_DEBUGPORT_IO_INTERFACE_REVISION   0x00010000
152*530d68baSNigel Croxon 
153*530d68baSNigel Croxon typedef struct _EFI_DEBUGPORT_IO_INTERFACE {
154*530d68baSNigel Croxon     UINT32                          		Revision;
155*530d68baSNigel Croxon     EFI_DEBUGPORT_IO_READ					Read;
156*530d68baSNigel Croxon     EFI_DEBUGPORT_IO_WRITE					Write;
157*530d68baSNigel Croxon     EFI_DEBUGPORT_IO_RESET					Reset;
158*530d68baSNigel Croxon } EFI_DEBUGPORT_IO_INTERFACE;
159*530d68baSNigel Croxon 
160*530d68baSNigel Croxon 
161*530d68baSNigel Croxon //
162*530d68baSNigel Croxon // Debugport UART16550 control protocol {628EA978-4C26-4605-BC02-A42A496917DD}
163*530d68baSNigel Croxon //
164*530d68baSNigel Croxon 
165*530d68baSNigel Croxon #define DEBUGPORT_UART16550_CONTROL_PROTOCOL \
166*530d68baSNigel Croxon { 0X628EA978, 0X4C26, 0X4605, 0XBC, 0X2, 0XA4, 0X2A, 0X49, 0X69, 0X17, 0XDD }
167*530d68baSNigel Croxon 
168*530d68baSNigel Croxon // Note: The definitions for EFI_PARITY_TYPE, EFI_STOP_BITS_TYPE, and
169*530d68baSNigel Croxon // SERIAL_IO_MODE are included from efiser.h
170*530d68baSNigel Croxon 
171*530d68baSNigel Croxon typedef
172*530d68baSNigel Croxon EFI_STATUS
173*530d68baSNigel Croxon (EFIAPI *EFI_UART16550_SET_ATTRIBUTES) (
174*530d68baSNigel Croxon     IN struct _EFI_DEBUGPORT_UART16550_CONTROL_INTERFACE  	*This,
175*530d68baSNigel Croxon     IN UINT64                       	BaudRate,
176*530d68baSNigel Croxon     IN UINT32                       	ReceiveFifoDepth,
177*530d68baSNigel Croxon     IN UINT32                       	Timeout,
178*530d68baSNigel Croxon     IN EFI_PARITY_TYPE       			Parity,
179*530d68baSNigel Croxon     IN UINT8                        	DataBits,
180*530d68baSNigel Croxon     IN EFI_STOP_BITS_TYPE    			StopBits
181*530d68baSNigel Croxon     );
182*530d68baSNigel Croxon 
183*530d68baSNigel Croxon typedef
184*530d68baSNigel Croxon EFI_STATUS
185*530d68baSNigel Croxon (EFIAPI *EFI_UART16550_SET_CONTROL_BITS) (
186*530d68baSNigel Croxon     IN struct _EFI_DEBUGPORT_UART16550_CONTROL_INTERFACE  	*This,
187*530d68baSNigel Croxon     IN UINT32                       	Control
188*530d68baSNigel Croxon     );
189*530d68baSNigel Croxon 
190*530d68baSNigel Croxon typedef
191*530d68baSNigel Croxon EFI_STATUS
192*530d68baSNigel Croxon (EFIAPI *EFI_UART16550_GET_CONTROL_BITS) (
193*530d68baSNigel Croxon     IN struct _EFI_DEBUGPORT_UART16550_CONTROL_INTERFACE	*This,
194*530d68baSNigel Croxon     OUT UINT32                      	*Control
195*530d68baSNigel Croxon     );
196*530d68baSNigel Croxon 
197*530d68baSNigel Croxon #define EFI_DEBUGPORT_UART16550_CONTROL_INTERFACE_REVISION   0x00010000
198*530d68baSNigel Croxon 
199*530d68baSNigel Croxon typedef struct _EFI_DEBUGPORT_UART16550_CONTROL_INTERFACE {
200*530d68baSNigel Croxon     UINT32                          	Revision;
201*530d68baSNigel Croxon 	EFI_UART16550_SET_ATTRIBUTES		SetAttributes;
202*530d68baSNigel Croxon 	EFI_UART16550_SET_CONTROL_BITS		SetControl;
203*530d68baSNigel Croxon 	EFI_UART16550_GET_CONTROL_BITS 		GetControl;
204*530d68baSNigel Croxon 	DEBUGPORT_16550_CONFIG_DATA			*Mode;
205*530d68baSNigel Croxon } EFI_DEBUGPORT_UART16550_CONTROL_INTERFACE;
206*530d68baSNigel Croxon 
207*530d68baSNigel Croxon 
208*530d68baSNigel Croxon #define DEVICE_PATH_DEBUGPORT DEBUGPORT_IO_PROTOCOL
209*530d68baSNigel Croxon 
210*530d68baSNigel Croxon #endif /* _EFIDBG_H_ */
211