xref: /DragonStub/inc/ia64/salproc.h (revision 530d68ba191850edafc6da22cb2df55bec0c5fa5)
1*530d68baSNigel Croxon #ifndef _SAL_PROC_H
2*530d68baSNigel Croxon #define _SAL_PROC_H
3*530d68baSNigel Croxon //
4*530d68baSNigel Croxon //
5*530d68baSNigel Croxon //Copyright (c) 1999  Intel Corporation
6*530d68baSNigel Croxon //
7*530d68baSNigel Croxon //Module Name:
8*530d68baSNigel Croxon //
9*530d68baSNigel Croxon //    SalProc.h
10*530d68baSNigel Croxon //
11*530d68baSNigel Croxon //Abstract:
12*530d68baSNigel Croxon //
13*530d68baSNigel Croxon //    Main SAL interface routins for IA-64 calls.
14*530d68baSNigel Croxon //
15*530d68baSNigel Croxon //
16*530d68baSNigel Croxon //Revision History
17*530d68baSNigel Croxon //
18*530d68baSNigel Croxon //
19*530d68baSNigel Croxon 
20*530d68baSNigel Croxon //  return value that mimicks r8,r9,r10 & r11 registers
21*530d68baSNigel Croxon typedef struct {
22*530d68baSNigel Croxon     UINT64     p0;
23*530d68baSNigel Croxon     UINT64     p1;
24*530d68baSNigel Croxon     UINT64     p2;
25*530d68baSNigel Croxon     UINT64     p3;
26*530d68baSNigel Croxon } rArg;
27*530d68baSNigel Croxon 
28*530d68baSNigel Croxon #define  SAL_PCI_CONFIG_READ                    0x01000010
29*530d68baSNigel Croxon #define  SAL_PCI_CONFIG_WRITE                   0x01000011
30*530d68baSNigel Croxon 
31*530d68baSNigel Croxon typedef VOID (*PFN)();
32*530d68baSNigel Croxon typedef rArg (*PFN_SAL_PROC)(UINT64,UINT64,UINT64,UINT64,UINT64,UINT64,UINT64,UINT64);
33*530d68baSNigel Croxon typedef rArg (*PFN_SAL_CALLBACK)(UINT64,UINT64,UINT64,UINT64,UINT64,UINT64,UINT64,UINT64);
34*530d68baSNigel Croxon 
35*530d68baSNigel Croxon typedef struct _PLABEL {
36*530d68baSNigel Croxon    UINT64 ProcEntryPoint;
37*530d68baSNigel Croxon    UINT64 GP;
38*530d68baSNigel Croxon } PLABEL;
39*530d68baSNigel Croxon 
40*530d68baSNigel Croxon typedef struct tagIA32_BIOS_REGISTER_STATE {
41*530d68baSNigel Croxon 
42*530d68baSNigel Croxon     // general registers
43*530d68baSNigel Croxon     UINT32 eax;
44*530d68baSNigel Croxon     UINT32 ecx;
45*530d68baSNigel Croxon     UINT32 edx;
46*530d68baSNigel Croxon     UINT32 ebx;
47*530d68baSNigel Croxon 
48*530d68baSNigel Croxon     // stack registers
49*530d68baSNigel Croxon     UINT32 esp;
50*530d68baSNigel Croxon     UINT32 ebp;
51*530d68baSNigel Croxon     UINT32 esi;
52*530d68baSNigel Croxon     UINT32 edi;
53*530d68baSNigel Croxon 
54*530d68baSNigel Croxon     // eflags
55*530d68baSNigel Croxon     UINT32 eflags;
56*530d68baSNigel Croxon 
57*530d68baSNigel Croxon     // instruction pointer
58*530d68baSNigel Croxon     UINT32 eip;
59*530d68baSNigel Croxon 
60*530d68baSNigel Croxon     UINT16 cs;
61*530d68baSNigel Croxon     UINT16 ds;
62*530d68baSNigel Croxon     UINT16 es;
63*530d68baSNigel Croxon     UINT16 fs;
64*530d68baSNigel Croxon     UINT16 gs;
65*530d68baSNigel Croxon     UINT16 ss;
66*530d68baSNigel Croxon 
67*530d68baSNigel Croxon     // Reserved
68*530d68baSNigel Croxon     UINT32 Reserved1;
69*530d68baSNigel Croxon     UINT64 Reserved2;
70*530d68baSNigel Croxon } IA32_BIOS_REGISTER_STATE;
71*530d68baSNigel Croxon 
72*530d68baSNigel Croxon VOID EFIInitMsg(VOID);
73*530d68baSNigel Croxon 
74*530d68baSNigel Croxon EFI_STATUS
75*530d68baSNigel Croxon PlRegisterAndStartTimer(
76*530d68baSNigel Croxon     IN UINTN Period
77*530d68baSNigel Croxon     );
78*530d68baSNigel Croxon 
79*530d68baSNigel Croxon EFI_STATUS
80*530d68baSNigel Croxon PlDeRegisterAndCancelTimer(VOID);
81*530d68baSNigel Croxon 
82*530d68baSNigel Croxon VOID
83*530d68baSNigel Croxon SalProc (
84*530d68baSNigel Croxon     IN  UINT64    Arg1,
85*530d68baSNigel Croxon     IN  UINT64    Arg2,
86*530d68baSNigel Croxon     IN  UINT64    Arg3,
87*530d68baSNigel Croxon     IN  UINT64    Arg4,
88*530d68baSNigel Croxon     IN  UINT64    Arg5,
89*530d68baSNigel Croxon     IN  UINT64    Arg6,
90*530d68baSNigel Croxon     IN  UINT64    Arg7,
91*530d68baSNigel Croxon     IN  UINT64    Arg8,
92*530d68baSNigel Croxon     OUT rArg      *Results  OPTIONAL
93*530d68baSNigel Croxon     );
94*530d68baSNigel Croxon 
95*530d68baSNigel Croxon VOID
96*530d68baSNigel Croxon SalCallBack (
97*530d68baSNigel Croxon     IN  UINT64    Arg1,
98*530d68baSNigel Croxon     IN  UINT64    Arg2,
99*530d68baSNigel Croxon     IN  UINT64    Arg3,
100*530d68baSNigel Croxon     IN  UINT64    Arg4,
101*530d68baSNigel Croxon     IN  UINT64    Arg5,
102*530d68baSNigel Croxon     IN  UINT64    Arg6,
103*530d68baSNigel Croxon     IN  UINT64    Arg7,
104*530d68baSNigel Croxon     IN  UINT64    Arg8,
105*530d68baSNigel Croxon     OUT rArg      *Results  OPTIONAL
106*530d68baSNigel Croxon     );
107*530d68baSNigel Croxon 
108*530d68baSNigel Croxon VOID
109*530d68baSNigel Croxon RUNTIMEFUNCTION
110*530d68baSNigel Croxon RtSalCallBack (
111*530d68baSNigel Croxon     IN  UINT64    Arg1,
112*530d68baSNigel Croxon     IN  UINT64    Arg2,
113*530d68baSNigel Croxon     IN  UINT64    Arg3,
114*530d68baSNigel Croxon     IN  UINT64    Arg4,
115*530d68baSNigel Croxon     IN  UINT64    Arg5,
116*530d68baSNigel Croxon     IN  UINT64    Arg6,
117*530d68baSNigel Croxon     IN  UINT64    Arg7,
118*530d68baSNigel Croxon     IN  UINT64    Arg8,
119*530d68baSNigel Croxon     OUT rArg      *Results  OPTIONAL
120*530d68baSNigel Croxon     );
121*530d68baSNigel Croxon 
122*530d68baSNigel Croxon 
123*530d68baSNigel Croxon extern PLABEL   RtGlobalSalProcEntry;
124*530d68baSNigel Croxon extern PLABEL   RtGlobalSALCallBack;
125*530d68baSNigel Croxon 
126*530d68baSNigel Croxon #pragma pack(1)
127*530d68baSNigel Croxon //
128*530d68baSNigel Croxon // SAL System Table
129*530d68baSNigel Croxon //
130*530d68baSNigel Croxon typedef struct {
131*530d68baSNigel Croxon     UINT32 Signature;
132*530d68baSNigel Croxon     UINT32 Length;
133*530d68baSNigel Croxon     UINT16 Revision;
134*530d68baSNigel Croxon     UINT16 EntryCount;
135*530d68baSNigel Croxon     UINT8  CheckSum;
136*530d68baSNigel Croxon     UINT8  Reserved[7];
137*530d68baSNigel Croxon     UINT16 SALA_Ver;
138*530d68baSNigel Croxon     UINT16 SALB_Ver;
139*530d68baSNigel Croxon     UINT8  OemId[32];
140*530d68baSNigel Croxon     UINT8  ProductID[32];
141*530d68baSNigel Croxon     UINT8  Reserved2[8];
142*530d68baSNigel Croxon } SAL_SYSTEM_TABLE_HDR;
143*530d68baSNigel Croxon 
144*530d68baSNigel Croxon #define SAL_ST_ENTRY_POINT          0
145*530d68baSNigel Croxon #define SAL_ST_MEMORY_DESCRIPTOR    1
146*530d68baSNigel Croxon #define SAL_ST_PLATFORM_FEATURES    2
147*530d68baSNigel Croxon #define SAL_ST_TR_USAGE             3
148*530d68baSNigel Croxon #define SAL_ST_PTC                  4
149*530d68baSNigel Croxon #define SAL_ST_AP_WAKEUP            5
150*530d68baSNigel Croxon 
151*530d68baSNigel Croxon typedef struct {
152*530d68baSNigel Croxon     UINT8   Type;   //  Type == 0
153*530d68baSNigel Croxon     UINT8   Reserved[7];
154*530d68baSNigel Croxon     UINT64  PalProcEntry;
155*530d68baSNigel Croxon     UINT64  SalProcEntry;
156*530d68baSNigel Croxon     UINT64  GlobalDataPointer;
157*530d68baSNigel Croxon     UINT64  Reserved2[2];
158*530d68baSNigel Croxon } SAL_ST_ENTRY_POINT_DESCRIPTOR;
159*530d68baSNigel Croxon 
160*530d68baSNigel Croxon typedef struct {
161*530d68baSNigel Croxon     UINT8   Type;   //  Type == 1
162*530d68baSNigel Croxon     UINT8   NeedVirtualRegistration;
163*530d68baSNigel Croxon     UINT8   MemoryAttributes;
164*530d68baSNigel Croxon     UINT8   PageAccessRights;
165*530d68baSNigel Croxon     UINT8   SupportedAttributes;
166*530d68baSNigel Croxon     UINT8   Reserved;
167*530d68baSNigel Croxon     UINT16  MemoryType;
168*530d68baSNigel Croxon     UINT64  PhysicalMemoryAddress;
169*530d68baSNigel Croxon     UINT32  Length;
170*530d68baSNigel Croxon     UINT32  Reserved1;
171*530d68baSNigel Croxon     UINT64  OemReserved;
172*530d68baSNigel Croxon } SAL_ST_MEMORY_DESCRIPTOR_ENTRY;
173*530d68baSNigel Croxon 
174*530d68baSNigel Croxon //
175*530d68baSNigel Croxon // MemoryType info
176*530d68baSNigel Croxon //
177*530d68baSNigel Croxon #define SAL_SAPIC_IPI_BLOCK 0x0002
178*530d68baSNigel Croxon #define SAL_IO_PORT_MAPPING 0x0003
179*530d68baSNigel Croxon 
180*530d68baSNigel Croxon typedef struct {
181*530d68baSNigel Croxon     UINT8   Type;   // Type == 2
182*530d68baSNigel Croxon     UINT8   PlatformFeatures;
183*530d68baSNigel Croxon     UINT8   Reserved[14];
184*530d68baSNigel Croxon } SAL_ST_MEMORY_DECRIPTOR;
185*530d68baSNigel Croxon 
186*530d68baSNigel Croxon typedef struct {
187*530d68baSNigel Croxon     UINT8   Type;   // Type == 3
188*530d68baSNigel Croxon     UINT8   TRType;
189*530d68baSNigel Croxon     UINT8   TRNumber;
190*530d68baSNigel Croxon     UINT8   Reserved[5];
191*530d68baSNigel Croxon     UINT64  VirtualAddress;
192*530d68baSNigel Croxon     UINT64  EncodedPageSize;
193*530d68baSNigel Croxon     UINT64  Reserved1;
194*530d68baSNigel Croxon } SAL_ST_TR_DECRIPTOR;
195*530d68baSNigel Croxon 
196*530d68baSNigel Croxon typedef struct {
197*530d68baSNigel Croxon     UINT64  NumberOfProcessors;
198*530d68baSNigel Croxon     UINT64  LocalIDRegister;
199*530d68baSNigel Croxon } SAL_COHERENCE_DOMAIN_INFO;
200*530d68baSNigel Croxon 
201*530d68baSNigel Croxon typedef struct {
202*530d68baSNigel Croxon     UINT8                       Type;   // Type == 4
203*530d68baSNigel Croxon     UINT8                       Reserved[3];
204*530d68baSNigel Croxon     UINT32                      NumberOfDomains;
205*530d68baSNigel Croxon     SAL_COHERENCE_DOMAIN_INFO  *DomainInformation;
206*530d68baSNigel Croxon } SAL_ST_CACHE_COHERENCE_DECRIPTOR;
207*530d68baSNigel Croxon 
208*530d68baSNigel Croxon typedef struct {
209*530d68baSNigel Croxon     UINT8   Type;   // Type == 5
210*530d68baSNigel Croxon     UINT8   WakeUpType;
211*530d68baSNigel Croxon     UINT8   Reserved[6];
212*530d68baSNigel Croxon     UINT64  ExternalInterruptVector;
213*530d68baSNigel Croxon } SAL_ST_AP_WAKEUP_DECRIPTOR;
214*530d68baSNigel Croxon 
215*530d68baSNigel Croxon typedef struct {
216*530d68baSNigel Croxon     SAL_SYSTEM_TABLE_HDR            Header;
217*530d68baSNigel Croxon     SAL_ST_ENTRY_POINT_DESCRIPTOR   Entry0;
218*530d68baSNigel Croxon } SAL_SYSTEM_TABLE_ASCENDING_ORDER;
219*530d68baSNigel Croxon 
220*530d68baSNigel Croxon #define     FIT_ENTRY_PTR       (0x100000000 - 32)  // 4GB - 24
221*530d68baSNigel Croxon #define     FIT_PALA_ENTRY      (0x100000000 - 48)  // 4GB - 32
222*530d68baSNigel Croxon #define     FIT_PALB_TYPE       01
223*530d68baSNigel Croxon 
224*530d68baSNigel Croxon typedef struct {
225*530d68baSNigel Croxon     UINT64  Address;
226*530d68baSNigel Croxon     UINT8   Size[3];
227*530d68baSNigel Croxon     UINT8   Reserved;
228*530d68baSNigel Croxon     UINT16  Revision;
229*530d68baSNigel Croxon     UINT8   Type:7;
230*530d68baSNigel Croxon     UINT8   CheckSumValid:1;
231*530d68baSNigel Croxon     UINT8   CheckSum;
232*530d68baSNigel Croxon } FIT_ENTRY;
233*530d68baSNigel Croxon 
234*530d68baSNigel Croxon #pragma pack()
235*530d68baSNigel Croxon 
236*530d68baSNigel Croxon typedef
237*530d68baSNigel Croxon  rArg
238*530d68baSNigel Croxon (*CALL_SAL_PROC)(
239*530d68baSNigel Croxon     IN  UINT64    Arg1,
240*530d68baSNigel Croxon     IN  UINT64    Arg2,
241*530d68baSNigel Croxon     IN  UINT64    Arg3,
242*530d68baSNigel Croxon     IN  UINT64    Arg4,
243*530d68baSNigel Croxon     IN  UINT64    Arg5,
244*530d68baSNigel Croxon     IN  UINT64    Arg6,
245*530d68baSNigel Croxon     IN  UINT64    Arg7,
246*530d68baSNigel Croxon     IN  UINT64    Arg8
247*530d68baSNigel Croxon     );
248*530d68baSNigel Croxon 
249*530d68baSNigel Croxon typedef
250*530d68baSNigel Croxon  rArg
251*530d68baSNigel Croxon (*CALL_PAL_PROC)(
252*530d68baSNigel Croxon     IN  UINT64    Arg1,
253*530d68baSNigel Croxon     IN  UINT64    Arg2,
254*530d68baSNigel Croxon     IN  UINT64    Arg3,
255*530d68baSNigel Croxon     IN  UINT64    Arg4
256*530d68baSNigel Croxon     );
257*530d68baSNigel Croxon 
258*530d68baSNigel Croxon extern CALL_SAL_PROC   GlobalSalProc;
259*530d68baSNigel Croxon extern CALL_PAL_PROC   GlobalPalProc;
260*530d68baSNigel Croxon extern PLABEL   SalProcPlabel;
261*530d68baSNigel Croxon extern PLABEL   PalProcPlabel;
262*530d68baSNigel Croxon 
263*530d68baSNigel Croxon #endif
264*530d68baSNigel Croxon 
265