1530d68baSNigel Croxon #ifndef _EFI_SER_H 2530d68baSNigel Croxon #define _EFI_SER_H 3530d68baSNigel Croxon 4530d68baSNigel Croxon /*++ 5530d68baSNigel Croxon 6530d68baSNigel Croxon Copyright (c) 1998 Intel Corporation 7530d68baSNigel Croxon 8530d68baSNigel Croxon Module Name: 9530d68baSNigel Croxon 10530d68baSNigel Croxon efiser.h 11530d68baSNigel Croxon 12530d68baSNigel Croxon Abstract: 13530d68baSNigel Croxon 14530d68baSNigel Croxon EFI serial protocol 15530d68baSNigel Croxon 16530d68baSNigel Croxon Revision History 17530d68baSNigel Croxon 18530d68baSNigel Croxon --*/ 19530d68baSNigel Croxon 20530d68baSNigel Croxon // 21530d68baSNigel Croxon // Serial protocol 22530d68baSNigel Croxon // 23530d68baSNigel Croxon 24*751cbce3SNigel Croxon #define EFI_SERIAL_IO_PROTOCOL_GUID \ 25530d68baSNigel Croxon { 0xBB25CF6F, 0xF1D4, 0x11D2, {0x9A, 0x0C, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0xFD} } 26*751cbce3SNigel Croxon #define SERIAL_IO_PROTOCOL EFI_SERIAL_IO_PROTOCOL_GUID 27530d68baSNigel Croxon 28*751cbce3SNigel Croxon INTERFACE_DECL(_EFI_SERIAL_IO_PROTOCOL); 29530d68baSNigel Croxon 30530d68baSNigel Croxon typedef enum { 31530d68baSNigel Croxon DefaultParity, 32530d68baSNigel Croxon NoParity, 33530d68baSNigel Croxon EvenParity, 34530d68baSNigel Croxon OddParity, 35530d68baSNigel Croxon MarkParity, 36530d68baSNigel Croxon SpaceParity 37530d68baSNigel Croxon } EFI_PARITY_TYPE; 38530d68baSNigel Croxon 39530d68baSNigel Croxon typedef enum { 40530d68baSNigel Croxon DefaultStopBits, 41530d68baSNigel Croxon OneStopBit, // 1 stop bit 42530d68baSNigel Croxon OneFiveStopBits, // 1.5 stop bits 43530d68baSNigel Croxon TwoStopBits // 2 stop bits 44530d68baSNigel Croxon } EFI_STOP_BITS_TYPE; 45530d68baSNigel Croxon 46530d68baSNigel Croxon #define EFI_SERIAL_CLEAR_TO_SEND 0x0010 // RO 47530d68baSNigel Croxon #define EFI_SERIAL_DATA_SET_READY 0x0020 // RO 48530d68baSNigel Croxon #define EFI_SERIAL_RING_INDICATE 0x0040 // RO 49530d68baSNigel Croxon #define EFI_SERIAL_CARRIER_DETECT 0x0080 // RO 50530d68baSNigel Croxon #define EFI_SERIAL_REQUEST_TO_SEND 0x0002 // WO 51530d68baSNigel Croxon #define EFI_SERIAL_DATA_TERMINAL_READY 0x0001 // WO 52530d68baSNigel Croxon #define EFI_SERIAL_INPUT_BUFFER_EMPTY 0x0100 // RO 53530d68baSNigel Croxon #define EFI_SERIAL_OUTPUT_BUFFER_EMPTY 0x0200 // RO 54530d68baSNigel Croxon #define EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE 0x1000 // RW 55530d68baSNigel Croxon #define EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE 0x2000 // RW 56530d68baSNigel Croxon #define EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE 0x4000 // RW 57530d68baSNigel Croxon 58530d68baSNigel Croxon typedef 59530d68baSNigel Croxon EFI_STATUS 60530d68baSNigel Croxon (EFIAPI *EFI_SERIAL_RESET) ( 61*751cbce3SNigel Croxon IN struct _EFI_SERIAL_IO_PROTOCOL *This 62530d68baSNigel Croxon ); 63530d68baSNigel Croxon 64530d68baSNigel Croxon typedef 65530d68baSNigel Croxon EFI_STATUS 66530d68baSNigel Croxon (EFIAPI *EFI_SERIAL_SET_ATTRIBUTES) ( 67*751cbce3SNigel Croxon IN struct _EFI_SERIAL_IO_PROTOCOL *This, 68530d68baSNigel Croxon IN UINT64 BaudRate, 69530d68baSNigel Croxon IN UINT32 ReceiveFifoDepth, 70530d68baSNigel Croxon IN UINT32 Timeout, 71530d68baSNigel Croxon IN EFI_PARITY_TYPE Parity, 72530d68baSNigel Croxon IN UINT8 DataBits, 73530d68baSNigel Croxon IN EFI_STOP_BITS_TYPE StopBits 74530d68baSNigel Croxon ); 75530d68baSNigel Croxon 76530d68baSNigel Croxon typedef 77530d68baSNigel Croxon EFI_STATUS 78530d68baSNigel Croxon (EFIAPI *EFI_SERIAL_SET_CONTROL_BITS) ( 79*751cbce3SNigel Croxon IN struct _EFI_SERIAL_IO_PROTOCOL *This, 80530d68baSNigel Croxon IN UINT32 Control 81530d68baSNigel Croxon ); 82530d68baSNigel Croxon 83530d68baSNigel Croxon typedef 84530d68baSNigel Croxon EFI_STATUS 85530d68baSNigel Croxon (EFIAPI *EFI_SERIAL_GET_CONTROL_BITS) ( 86*751cbce3SNigel Croxon IN struct _EFI_SERIAL_IO_PROTOCOL *This, 87530d68baSNigel Croxon OUT UINT32 *Control 88530d68baSNigel Croxon ); 89530d68baSNigel Croxon 90530d68baSNigel Croxon typedef 91530d68baSNigel Croxon EFI_STATUS 92530d68baSNigel Croxon (EFIAPI *EFI_SERIAL_WRITE) ( 93*751cbce3SNigel Croxon IN struct _EFI_SERIAL_IO_PROTOCOL *This, 94530d68baSNigel Croxon IN OUT UINTN *BufferSize, 95530d68baSNigel Croxon IN VOID *Buffer 96530d68baSNigel Croxon ); 97530d68baSNigel Croxon 98530d68baSNigel Croxon typedef 99530d68baSNigel Croxon EFI_STATUS 100530d68baSNigel Croxon (EFIAPI *EFI_SERIAL_READ) ( 101*751cbce3SNigel Croxon IN struct _EFI_SERIAL_IO_PROTOCOL *This, 102530d68baSNigel Croxon IN OUT UINTN *BufferSize, 103530d68baSNigel Croxon OUT VOID *Buffer 104530d68baSNigel Croxon ); 105530d68baSNigel Croxon 106530d68baSNigel Croxon typedef struct { 107530d68baSNigel Croxon UINT32 ControlMask; 108530d68baSNigel Croxon 109530d68baSNigel Croxon // current Attributes 110530d68baSNigel Croxon UINT32 Timeout; 111530d68baSNigel Croxon UINT64 BaudRate; 112530d68baSNigel Croxon UINT32 ReceiveFifoDepth; 113530d68baSNigel Croxon UINT32 DataBits; 114530d68baSNigel Croxon UINT32 Parity; 115530d68baSNigel Croxon UINT32 StopBits; 116530d68baSNigel Croxon } SERIAL_IO_MODE; 117530d68baSNigel Croxon 118530d68baSNigel Croxon #define SERIAL_IO_INTERFACE_REVISION 0x00010000 119530d68baSNigel Croxon 120*751cbce3SNigel Croxon typedef struct _EFI_SERIAL_IO_PROTOCOL { 121530d68baSNigel Croxon UINT32 Revision; 122530d68baSNigel Croxon EFI_SERIAL_RESET Reset; 123530d68baSNigel Croxon EFI_SERIAL_SET_ATTRIBUTES SetAttributes; 124530d68baSNigel Croxon EFI_SERIAL_SET_CONTROL_BITS SetControl; 125530d68baSNigel Croxon EFI_SERIAL_GET_CONTROL_BITS GetControl; 126530d68baSNigel Croxon EFI_SERIAL_WRITE Write; 127530d68baSNigel Croxon EFI_SERIAL_READ Read; 128530d68baSNigel Croxon 129530d68baSNigel Croxon SERIAL_IO_MODE *Mode; 130*751cbce3SNigel Croxon } EFI_SERIAL_IO_PROTOCOL; 131*751cbce3SNigel Croxon 132*751cbce3SNigel Croxon typedef struct _EFI_SERIAL_IO_PROTOCOL _SERIAL_IO_INTERFACE; 133*751cbce3SNigel Croxon typedef EFI_SERIAL_IO_PROTOCOL SERIAL_IO_INTERFACE; 134530d68baSNigel Croxon 135530d68baSNigel Croxon #endif 136530d68baSNigel Croxon 137