1ce5850adSLoGin use core::fmt::Debug; 2ce5850adSLoGin 3ce5850adSLoGin use alloc::{ 4ce5850adSLoGin string::String, 5ce5850adSLoGin sync::{Arc, Weak}, 6ce5850adSLoGin vec::Vec, 7ce5850adSLoGin }; 8ce5850adSLoGin use hashbrown::HashMap; 9ce5850adSLoGin use system_error::SystemError; 10ce5850adSLoGin 11ce5850adSLoGin use crate::{ 12ce5850adSLoGin driver::{base::device::Device, open_firmware::device_node::DeviceNode}, 13ce5850adSLoGin libs::{rwlock::RwLock, spinlock::SpinLock}, 14ce5850adSLoGin }; 15ce5850adSLoGin 16ce5850adSLoGin use super::{ 17ce5850adSLoGin irqchip::{IrqChipGeneric, IrqGcFlags}, 18ce5850adSLoGin HardwareIrqNumber, IrqNumber, 19ce5850adSLoGin }; 20ce5850adSLoGin 21ce5850adSLoGin /// 中断域 22ce5850adSLoGin /// 23ce5850adSLoGin /// 用于把硬件中断号翻译为软件中断号的映射的对象 24ce5850adSLoGin /// 25ce5850adSLoGin /// 参考 https://code.dragonos.org.cn/xref/linux-6.1.9/include/linux/irqdomain.h#164 26ce5850adSLoGin #[allow(dead_code)] 27ce5850adSLoGin #[derive(Debug)] 28ce5850adSLoGin pub struct IrqDomain { 29ce5850adSLoGin /// 中断域的名字 (二选一) 30ce5850adSLoGin name: Option<&'static str>, 31ce5850adSLoGin allocated_name: Option<String>, 32ce5850adSLoGin /// 中断域的操作 33ce5850adSLoGin ops: &'static dyn IrqDomainOps, 34ce5850adSLoGin inner: SpinLock<InnerIrqDomain>, 35ce5850adSLoGin /// 中断号反向映射 36ce5850adSLoGin revmap: RwLock<IrqDomainRevMap>, 37ce5850adSLoGin } 38ce5850adSLoGin 39ce5850adSLoGin #[allow(dead_code)] 40ce5850adSLoGin #[derive(Debug)] 41ce5850adSLoGin struct InnerIrqDomain { 42ce5850adSLoGin /// host per irq_domain flags 43ce5850adSLoGin flags: IrqDomainFlags, 44ce5850adSLoGin /// The number of mapped interrupts 45ce5850adSLoGin mapcount: u32, 46ce5850adSLoGin bus_token: IrqDomainBusToken, 47ce5850adSLoGin /// 指向 generic chip 列表的指针。 48ce5850adSLoGin /// 有一个辅助函数用于为中断控制器驱动程序设置一个或 49ce5850adSLoGin /// 多个 generic chip,该函数使用此指针并依赖于 generic chip 库。 50ce5850adSLoGin generic_chip: Option<Arc<IrqDomainChipGeneric>>, 51ce5850adSLoGin /// Pointer to a device that the domain represent, and that will be 52ce5850adSLoGin /// used for power management purposes. 53ce5850adSLoGin device: Option<Arc<dyn Device>>, 54ce5850adSLoGin /// Pointer to parent irq_domain to support hierarchy irq_domains 55ce5850adSLoGin parent: Option<Weak<IrqDomain>>, 56ce5850adSLoGin } 57ce5850adSLoGin 58ce5850adSLoGin impl IrqDomain { 59ce5850adSLoGin #[allow(dead_code)] 60ce5850adSLoGin pub fn new( 61ce5850adSLoGin name: Option<&'static str>, 62ce5850adSLoGin allocated_name: Option<String>, 63ce5850adSLoGin ops: &'static dyn IrqDomainOps, 64ce5850adSLoGin flags: IrqDomainFlags, 65ce5850adSLoGin bus_token: IrqDomainBusToken, 66ce5850adSLoGin ) -> Option<Arc<Self>> { 67ce5850adSLoGin if name.is_none() && allocated_name.is_none() { 68ce5850adSLoGin return None; 69ce5850adSLoGin } 70ce5850adSLoGin 71ce5850adSLoGin let x = IrqDomain { 72ce5850adSLoGin name, 73ce5850adSLoGin allocated_name, 74ce5850adSLoGin ops, 75ce5850adSLoGin inner: SpinLock::new(InnerIrqDomain { 76ce5850adSLoGin flags, 77ce5850adSLoGin mapcount: 0, 78ce5850adSLoGin bus_token, 79ce5850adSLoGin generic_chip: None, 80ce5850adSLoGin device: None, 81ce5850adSLoGin parent: None, 82ce5850adSLoGin }), 83ce5850adSLoGin revmap: RwLock::new(IrqDomainRevMap { 84ce5850adSLoGin map: HashMap::new(), 85ce5850adSLoGin hwirq_max: HardwareIrqNumber::new(0), 86ce5850adSLoGin }), 87ce5850adSLoGin }; 88ce5850adSLoGin 89ce5850adSLoGin return Some(Arc::new(x)); 90ce5850adSLoGin } 91ce5850adSLoGin } 92ce5850adSLoGin 93ce5850adSLoGin /// 参考 https://code.dragonos.org.cn/xref/linux-6.1.9/include/linux/irqdomain.h#190 94ce5850adSLoGin #[allow(dead_code)] 95ce5850adSLoGin #[derive(Debug)] 96ce5850adSLoGin struct IrqDomainRevMap { 97ce5850adSLoGin map: HashMap<HardwareIrqNumber, IrqNumber>, 98ce5850adSLoGin hwirq_max: HardwareIrqNumber, 99ce5850adSLoGin } 100ce5850adSLoGin 101ce5850adSLoGin bitflags! { 102ce5850adSLoGin pub struct IrqDomainFlags: u32 { 103ce5850adSLoGin /// Irq domain is hierarchical 104ce5850adSLoGin const HIERARCHY = (1 << 0); 105ce5850adSLoGin /// Irq domain name was allocated dynamically 106ce5850adSLoGin const NAME_ALLOCATED = (1 << 1); 107ce5850adSLoGin /// Irq domain is an IPI domain with virq per cpu 108ce5850adSLoGin const IPI_PER_CPU = (1 << 2); 109ce5850adSLoGin /// Irq domain is an IPI domain with single virq 110ce5850adSLoGin const IPI_SINGLE = (1 << 3); 111ce5850adSLoGin /// Irq domain implements MSIs 112ce5850adSLoGin const MSI = (1 << 4); 113ce5850adSLoGin /// Irq domain implements MSI remapping 114ce5850adSLoGin const MSI_REMAP = (1 << 5); 115ce5850adSLoGin /// Quirk to handle MSI implementations which do not provide masking 116ce5850adSLoGin const MSI_NOMASK_QUIRK = (1 << 6); 117ce5850adSLoGin /// Irq domain doesn't translate anything 118ce5850adSLoGin const NO_MAP = (1 << 7); 119ce5850adSLoGin /// Flags starting from IRQ_DOMAIN_FLAG_NONCORE are reserved 120ce5850adSLoGin /// for implementation specific purposes and ignored by the core code 121ce5850adSLoGin const NONCORE = (1 << 16); 122ce5850adSLoGin } 123ce5850adSLoGin } 124ce5850adSLoGin 125ce5850adSLoGin /// 如果多个域有相同的设备节点,但服务于不同的目的(例如,一个域用于PCI/MSI,另一个用于有线IRQs), 126ce5850adSLoGin /// 它们可以使用特定于总线的token进行区分。预计大多数域只会携带`DomainBusAny`。 127ce5850adSLoGin /// 128ce5850adSLoGin /// 参考 https://code.dragonos.org.cn/xref/linux-6.1.9/include/linux/irqdomain.h#78 129ce5850adSLoGin #[allow(dead_code)] 130ce5850adSLoGin #[derive(Debug, Clone, Copy, PartialEq, Eq)] 131ce5850adSLoGin pub enum IrqDomainBusToken { 132ce5850adSLoGin Any = 0, 133ce5850adSLoGin Wired, 134ce5850adSLoGin GenericMsi, 135ce5850adSLoGin PciMsi, 136ce5850adSLoGin PlatformMsi, 137ce5850adSLoGin Nexus, 138ce5850adSLoGin Ipi, 139ce5850adSLoGin FslMcMsi, 140ce5850adSLoGin TiSciIntaMsi, 141ce5850adSLoGin Wakeup, 142ce5850adSLoGin VmdMsi, 143ce5850adSLoGin } 144ce5850adSLoGin 145ce5850adSLoGin /// IrqDomain的操作方法 146ce5850adSLoGin /// 147ce5850adSLoGin /// 参考 https://code.dragonos.org.cn/xref/linux-6.1.9/include/linux/irqdomain.h#107 148*3bc96fa4SLoGin pub trait IrqDomainOps: Debug + Send + Sync { 149ce5850adSLoGin /// 匹配一个中断控制器设备节点到一个主机。 150ce5850adSLoGin fn match_node( 151ce5850adSLoGin &self, 152ce5850adSLoGin irq_domain: &Arc<IrqDomain>, 153ce5850adSLoGin device_node: &Arc<DeviceNode>, 154ce5850adSLoGin bus_token: IrqDomainBusToken, 155ce5850adSLoGin ) -> bool; 156ce5850adSLoGin 157ce5850adSLoGin /// 创建或更新一个虚拟中断号与一个硬件中断号之间的映射。 158ce5850adSLoGin /// 对于给定的映射,这只会被调用一次。 159ce5850adSLoGin fn map( 160ce5850adSLoGin &self, 161ce5850adSLoGin irq_domain: &Arc<IrqDomain>, 162ce5850adSLoGin hwirq: HardwareIrqNumber, 163ce5850adSLoGin virq: IrqNumber, 164ce5850adSLoGin ) -> Result<(), SystemError>; 165ce5850adSLoGin 166ce5850adSLoGin /// 删除一个虚拟中断号与一个硬件中断号之间的映射。 167ce5850adSLoGin fn unmap(&self, irq_domain: &Arc<IrqDomain>, virq: IrqNumber); 168ce5850adSLoGin } 169ce5850adSLoGin 170ce5850adSLoGin #[allow(dead_code)] 171ce5850adSLoGin #[derive(Debug)] 172ce5850adSLoGin pub struct IrqDomainChipGeneric { 173ce5850adSLoGin inner: SpinLock<InnerIrqDomainChipGeneric>, 174ce5850adSLoGin } 175ce5850adSLoGin 176ce5850adSLoGin #[allow(dead_code)] 177ce5850adSLoGin #[derive(Debug)] 178ce5850adSLoGin struct InnerIrqDomainChipGeneric { 179ce5850adSLoGin irqs_per_chip: u32, 180ce5850adSLoGin flags_to_clear: IrqGcFlags, 181ce5850adSLoGin flags_to_set: IrqGcFlags, 182ce5850adSLoGin gc_flags: IrqGcFlags, 183ce5850adSLoGin gc: Vec<Arc<IrqChipGeneric>>, 184ce5850adSLoGin } 185