xref: /DragonOS/kernel/src/driver/virtio/transport_pci.rs (revision e28411791f090c421fe4b6fa5956fb1bd362a8d9)
126d84a31SYJwu2023 //! PCI transport for VirtIO.
278bf93f0SYJwu2023 use crate::arch::{PciArch, TraitPciArch};
3*e2841179SLoGin use crate::driver::base::device::DeviceId;
426d84a31SYJwu2023 use crate::driver::pci::pci::{
578bf93f0SYJwu2023     BusDeviceFunction, PciDeviceStructure, PciDeviceStructureGeneralDevice, PciError,
678bf93f0SYJwu2023     PciStandardDeviceBar, PCI_CAP_ID_VNDR,
726d84a31SYJwu2023 };
873c607aaSYJwu2023 
9ce5850adSLoGin use crate::driver::pci::pci_irq::{IrqCommonMsg, IrqSpecificMsg, PciInterrupt, PciIrqMsg, IRQ};
10*e2841179SLoGin use crate::driver::virtio::irq::virtio_irq_manager;
11*e2841179SLoGin use crate::exception::irqdata::IrqHandlerData;
12*e2841179SLoGin use crate::exception::irqdesc::{IrqHandler, IrqReturn};
13*e2841179SLoGin 
14*e2841179SLoGin use crate::exception::IrqNumber;
15*e2841179SLoGin 
1673c607aaSYJwu2023 use crate::libs::volatile::{
1773c607aaSYJwu2023     volread, volwrite, ReadOnly, Volatile, VolatileReadable, VolatileWritable, WriteOnly,
1873c607aaSYJwu2023 };
192dd9f0c7SLoGin use crate::mm::VirtAddr;
20*e2841179SLoGin 
21*e2841179SLoGin use alloc::string::ToString;
22*e2841179SLoGin use alloc::sync::Arc;
2326d84a31SYJwu2023 use core::{
2426d84a31SYJwu2023     fmt::{self, Display, Formatter},
2526d84a31SYJwu2023     mem::{align_of, size_of},
2626d84a31SYJwu2023     ptr::{self, addr_of_mut, NonNull},
2726d84a31SYJwu2023 };
28*e2841179SLoGin use system_error::SystemError;
2926d84a31SYJwu2023 use virtio_drivers::{
3026d84a31SYJwu2023     transport::{DeviceStatus, DeviceType, Transport},
3173c607aaSYJwu2023     Error, Hal, PhysAddr,
3226d84a31SYJwu2023 };
3326d84a31SYJwu2023 
3426d84a31SYJwu2023 /// The PCI vendor ID for VirtIO devices.
3526d84a31SYJwu2023 /// PCI Virtio设备的vendor ID
3626d84a31SYJwu2023 const VIRTIO_VENDOR_ID: u16 = 0x1af4;
3726d84a31SYJwu2023 
3826d84a31SYJwu2023 /// The offset to add to a VirtIO device ID to get the corresponding PCI device ID.
3926d84a31SYJwu2023 /// PCI Virtio设备的DEVICE_ID 的offset
4026d84a31SYJwu2023 const PCI_DEVICE_ID_OFFSET: u16 = 0x1040;
4126d84a31SYJwu2023 /// PCI Virtio 设备的DEVICE_ID及其对应的设备类型
4226d84a31SYJwu2023 const TRANSITIONAL_NETWORK: u16 = 0x1000;
4326d84a31SYJwu2023 const TRANSITIONAL_BLOCK: u16 = 0x1001;
4426d84a31SYJwu2023 const TRANSITIONAL_MEMORY_BALLOONING: u16 = 0x1002;
4526d84a31SYJwu2023 const TRANSITIONAL_CONSOLE: u16 = 0x1003;
4626d84a31SYJwu2023 const TRANSITIONAL_SCSI_HOST: u16 = 0x1004;
4726d84a31SYJwu2023 const TRANSITIONAL_ENTROPY_SOURCE: u16 = 0x1005;
4826d84a31SYJwu2023 const TRANSITIONAL_9P_TRANSPORT: u16 = 0x1009;
4926d84a31SYJwu2023 
5026d84a31SYJwu2023 /// The offset of the bar field within `virtio_pci_cap`.
5126d84a31SYJwu2023 const CAP_BAR_OFFSET: u8 = 4;
5226d84a31SYJwu2023 /// The offset of the offset field with `virtio_pci_cap`.
5326d84a31SYJwu2023 const CAP_BAR_OFFSET_OFFSET: u8 = 8;
5426d84a31SYJwu2023 /// The offset of the `length` field within `virtio_pci_cap`.
5526d84a31SYJwu2023 const CAP_LENGTH_OFFSET: u8 = 12;
5626d84a31SYJwu2023 /// The offset of the`notify_off_multiplier` field within `virtio_pci_notify_cap`.
5726d84a31SYJwu2023 const CAP_NOTIFY_OFF_MULTIPLIER_OFFSET: u8 = 16;
5826d84a31SYJwu2023 
5926d84a31SYJwu2023 /// Common configuration.
6026d84a31SYJwu2023 const VIRTIO_PCI_CAP_COMMON_CFG: u8 = 1;
6126d84a31SYJwu2023 /// Notifications.
6226d84a31SYJwu2023 const VIRTIO_PCI_CAP_NOTIFY_CFG: u8 = 2;
6326d84a31SYJwu2023 /// ISR Status.
6426d84a31SYJwu2023 const VIRTIO_PCI_CAP_ISR_CFG: u8 = 3;
6526d84a31SYJwu2023 /// Device specific configuration.
6626d84a31SYJwu2023 const VIRTIO_PCI_CAP_DEVICE_CFG: u8 = 4;
6726d84a31SYJwu2023 
680dd8ff43SYJwu2023 /// Virtio设备接收中断的设备号
69*e2841179SLoGin const VIRTIO_RECV_VECTOR: IrqNumber = IrqNumber::new(56);
700dd8ff43SYJwu2023 /// Virtio设备接收中断的设备号的表项号
710dd8ff43SYJwu2023 const VIRTIO_RECV_VECTOR_INDEX: u16 = 0;
72afc95d5cSYJwu2023 // 接收的queue号
730dd8ff43SYJwu2023 const QUEUE_RECEIVE: u16 = 0;
7426d84a31SYJwu2023 ///@brief device id 转换为设备类型
7526d84a31SYJwu2023 ///@param pci_device_id,device_id
7626d84a31SYJwu2023 ///@return DeviceType 对应的设备类型
7726d84a31SYJwu2023 fn device_type(pci_device_id: u16) -> DeviceType {
7826d84a31SYJwu2023     match pci_device_id {
7926d84a31SYJwu2023         TRANSITIONAL_NETWORK => DeviceType::Network,
8026d84a31SYJwu2023         TRANSITIONAL_BLOCK => DeviceType::Block,
8126d84a31SYJwu2023         TRANSITIONAL_MEMORY_BALLOONING => DeviceType::MemoryBalloon,
8226d84a31SYJwu2023         TRANSITIONAL_CONSOLE => DeviceType::Console,
8326d84a31SYJwu2023         TRANSITIONAL_SCSI_HOST => DeviceType::ScsiHost,
8426d84a31SYJwu2023         TRANSITIONAL_ENTROPY_SOURCE => DeviceType::EntropySource,
8526d84a31SYJwu2023         TRANSITIONAL_9P_TRANSPORT => DeviceType::_9P,
8626d84a31SYJwu2023         id if id >= PCI_DEVICE_ID_OFFSET => DeviceType::from(id - PCI_DEVICE_ID_OFFSET),
8726d84a31SYJwu2023         _ => DeviceType::Invalid,
8826d84a31SYJwu2023     }
8926d84a31SYJwu2023 }
9026d84a31SYJwu2023 
9126d84a31SYJwu2023 /// PCI transport for VirtIO.
9226d84a31SYJwu2023 ///
9326d84a31SYJwu2023 /// Ref: 4.1 Virtio Over PCI Bus
94*e2841179SLoGin #[allow(dead_code)]
9513776c11Slogin #[derive(Debug, Clone)]
9626d84a31SYJwu2023 pub struct PciTransport {
9726d84a31SYJwu2023     device_type: DeviceType,
9826d84a31SYJwu2023     /// The bus, device and function identifier for the VirtIO device.
991496ba7bSLoGin     _bus_device_function: BusDeviceFunction,
10026d84a31SYJwu2023     /// The common configuration structure within some BAR.
10126d84a31SYJwu2023     common_cfg: NonNull<CommonCfg>,
10226d84a31SYJwu2023     /// The start of the queue notification region within some BAR.
10326d84a31SYJwu2023     notify_region: NonNull<[WriteOnly<u16>]>,
10426d84a31SYJwu2023     notify_off_multiplier: u32,
10526d84a31SYJwu2023     /// The ISR status register within some BAR.
10626d84a31SYJwu2023     isr_status: NonNull<Volatile<u8>>,
10726d84a31SYJwu2023     /// The VirtIO device-specific configuration within some BAR.
10826d84a31SYJwu2023     config_space: Option<NonNull<[u32]>>,
109*e2841179SLoGin     irq: IrqNumber,
110*e2841179SLoGin     dev_id: Arc<DeviceId>,
1110dd8ff43SYJwu2023 }
1120dd8ff43SYJwu2023 
11326d84a31SYJwu2023 impl PciTransport {
11426d84a31SYJwu2023     /// Construct a new PCI VirtIO device driver for the given device function on the given PCI
11526d84a31SYJwu2023     /// root controller.
11626d84a31SYJwu2023     ///
117*e2841179SLoGin     /// ## 参数
11878bf93f0SYJwu2023     ///
119*e2841179SLoGin     /// - `device` - The PCI device structure for the VirtIO device.
120*e2841179SLoGin     /// - `irq_handler` - An optional handler for the device's interrupt. If `None`, a default
121*e2841179SLoGin     ///     handler `DefaultVirtioIrqHandler` will be used.
12278bf93f0SYJwu2023     pub fn new<H: Hal>(
12378bf93f0SYJwu2023         device: &mut PciDeviceStructureGeneralDevice,
124*e2841179SLoGin         dev_id: Arc<DeviceId>,
12578bf93f0SYJwu2023     ) -> Result<Self, VirtioPciError> {
126*e2841179SLoGin         let irq = VIRTIO_RECV_VECTOR;
12778bf93f0SYJwu2023         let header = &device.common_header;
12878bf93f0SYJwu2023         let bus_device_function = header.bus_device_function;
12978bf93f0SYJwu2023         if header.vendor_id != VIRTIO_VENDOR_ID {
13078bf93f0SYJwu2023             return Err(VirtioPciError::InvalidVendorId(header.vendor_id));
13126d84a31SYJwu2023         }
13278bf93f0SYJwu2023         let device_type = device_type(header.device_id);
13326d84a31SYJwu2023         // Find the PCI capabilities we need.
13413776c11Slogin         let mut common_cfg: Option<VirtioCapabilityInfo> = None;
13513776c11Slogin         let mut notify_cfg: Option<VirtioCapabilityInfo> = None;
13626d84a31SYJwu2023         let mut notify_off_multiplier = 0;
13726d84a31SYJwu2023         let mut isr_cfg = None;
13826d84a31SYJwu2023         let mut device_cfg = None;
139cc36cf4aSYJwu2023         device.bar_ioremap().unwrap()?;
14078bf93f0SYJwu2023         device.enable_master();
1410dd8ff43SYJwu2023         let standard_device = device.as_standard_device_mut().unwrap();
1420dd8ff43SYJwu2023         // 目前缺少对PCI设备中断号的统一管理,所以这里需要指定一个中断号。不能与其他中断重复
1430dd8ff43SYJwu2023         let irq_vector = standard_device.irq_vector_mut().unwrap();
144*e2841179SLoGin         irq_vector.push(irq);
1450dd8ff43SYJwu2023         standard_device
1460dd8ff43SYJwu2023             .irq_init(IRQ::PCI_IRQ_MSIX)
1470dd8ff43SYJwu2023             .expect("IRQ init failed");
1480dd8ff43SYJwu2023         // 中断相关信息
149ce5850adSLoGin         let msg = PciIrqMsg {
150afc95d5cSYJwu2023             irq_common_message: IrqCommonMsg::init_from(
151afc95d5cSYJwu2023                 0,
152*e2841179SLoGin                 "Virtio_IRQ".to_string(),
153*e2841179SLoGin                 &DefaultVirtioIrqHandler,
154*e2841179SLoGin                 dev_id.clone(),
155afc95d5cSYJwu2023             ),
1560dd8ff43SYJwu2023             irq_specific_message: IrqSpecificMsg::msi_default(),
1570dd8ff43SYJwu2023         };
1580dd8ff43SYJwu2023         standard_device.irq_install(msg)?;
1590dd8ff43SYJwu2023         standard_device.irq_enable(true)?;
16026d84a31SYJwu2023         //device_capability为迭代器,遍历其相当于遍历所有的cap空间
16178bf93f0SYJwu2023         for capability in device.capabilities().unwrap() {
16226d84a31SYJwu2023             if capability.id != PCI_CAP_ID_VNDR {
16326d84a31SYJwu2023                 continue;
16426d84a31SYJwu2023             }
16526d84a31SYJwu2023             let cap_len = capability.private_header as u8;
16626d84a31SYJwu2023             let cfg_type = (capability.private_header >> 8) as u8;
16726d84a31SYJwu2023             if cap_len < 16 {
16826d84a31SYJwu2023                 continue;
16926d84a31SYJwu2023             }
17026d84a31SYJwu2023             let struct_info = VirtioCapabilityInfo {
17178bf93f0SYJwu2023                 bar: PciArch::read_config(&bus_device_function, capability.offset + CAP_BAR_OFFSET)
17278bf93f0SYJwu2023                     as u8,
17378bf93f0SYJwu2023                 offset: PciArch::read_config(
17478bf93f0SYJwu2023                     &bus_device_function,
17526d84a31SYJwu2023                     capability.offset + CAP_BAR_OFFSET_OFFSET,
17678bf93f0SYJwu2023                 ),
17778bf93f0SYJwu2023                 length: PciArch::read_config(
17878bf93f0SYJwu2023                     &bus_device_function,
17926d84a31SYJwu2023                     capability.offset + CAP_LENGTH_OFFSET,
18078bf93f0SYJwu2023                 ),
18126d84a31SYJwu2023             };
18226d84a31SYJwu2023 
18326d84a31SYJwu2023             match cfg_type {
18426d84a31SYJwu2023                 VIRTIO_PCI_CAP_COMMON_CFG if common_cfg.is_none() => {
18526d84a31SYJwu2023                     common_cfg = Some(struct_info);
18626d84a31SYJwu2023                 }
18726d84a31SYJwu2023                 VIRTIO_PCI_CAP_NOTIFY_CFG if cap_len >= 20 && notify_cfg.is_none() => {
18826d84a31SYJwu2023                     notify_cfg = Some(struct_info);
18978bf93f0SYJwu2023                     notify_off_multiplier = PciArch::read_config(
19078bf93f0SYJwu2023                         &bus_device_function,
19126d84a31SYJwu2023                         capability.offset + CAP_NOTIFY_OFF_MULTIPLIER_OFFSET,
19226d84a31SYJwu2023                     );
19326d84a31SYJwu2023                 }
19426d84a31SYJwu2023                 VIRTIO_PCI_CAP_ISR_CFG if isr_cfg.is_none() => {
19526d84a31SYJwu2023                     isr_cfg = Some(struct_info);
19626d84a31SYJwu2023                 }
19726d84a31SYJwu2023                 VIRTIO_PCI_CAP_DEVICE_CFG if device_cfg.is_none() => {
19826d84a31SYJwu2023                     device_cfg = Some(struct_info);
19926d84a31SYJwu2023                 }
20026d84a31SYJwu2023                 _ => {}
20126d84a31SYJwu2023             }
20226d84a31SYJwu2023         }
20326d84a31SYJwu2023 
20426d84a31SYJwu2023         let common_cfg = get_bar_region::<_>(
20578bf93f0SYJwu2023             &device.standard_device_bar,
20626d84a31SYJwu2023             &common_cfg.ok_or(VirtioPciError::MissingCommonConfig)?,
20726d84a31SYJwu2023         )?;
20826d84a31SYJwu2023 
20926d84a31SYJwu2023         let notify_cfg = notify_cfg.ok_or(VirtioPciError::MissingNotifyConfig)?;
21026d84a31SYJwu2023         if notify_off_multiplier % 2 != 0 {
21126d84a31SYJwu2023             return Err(VirtioPciError::InvalidNotifyOffMultiplier(
21226d84a31SYJwu2023                 notify_off_multiplier,
21326d84a31SYJwu2023             ));
21426d84a31SYJwu2023         }
21573c607aaSYJwu2023         //kdebug!("notify.offset={},notify.length={}",notify_cfg.offset,notify_cfg.length);
21678bf93f0SYJwu2023         let notify_region = get_bar_region_slice::<_>(&device.standard_device_bar, &notify_cfg)?;
21726d84a31SYJwu2023         let isr_status = get_bar_region::<_>(
21878bf93f0SYJwu2023             &device.standard_device_bar,
21926d84a31SYJwu2023             &isr_cfg.ok_or(VirtioPciError::MissingIsrConfig)?,
22026d84a31SYJwu2023         )?;
22126d84a31SYJwu2023         let config_space = if let Some(device_cfg) = device_cfg {
22278bf93f0SYJwu2023             Some(get_bar_region_slice::<_>(
22378bf93f0SYJwu2023                 &device.standard_device_bar,
22478bf93f0SYJwu2023                 &device_cfg,
22578bf93f0SYJwu2023             )?)
22626d84a31SYJwu2023         } else {
22726d84a31SYJwu2023             None
22826d84a31SYJwu2023         };
22926d84a31SYJwu2023         Ok(Self {
23026d84a31SYJwu2023             device_type,
2311496ba7bSLoGin             _bus_device_function: bus_device_function,
23226d84a31SYJwu2023             common_cfg,
23326d84a31SYJwu2023             notify_region,
23426d84a31SYJwu2023             notify_off_multiplier,
23526d84a31SYJwu2023             isr_status,
23626d84a31SYJwu2023             config_space,
237*e2841179SLoGin             irq,
238*e2841179SLoGin             dev_id,
23926d84a31SYJwu2023         })
24026d84a31SYJwu2023     }
24126d84a31SYJwu2023 }
24226d84a31SYJwu2023 
24326d84a31SYJwu2023 impl Transport for PciTransport {
24426d84a31SYJwu2023     fn device_type(&self) -> DeviceType {
24526d84a31SYJwu2023         self.device_type
24626d84a31SYJwu2023     }
24726d84a31SYJwu2023 
24826d84a31SYJwu2023     fn read_device_features(&mut self) -> u64 {
24926d84a31SYJwu2023         // Safe because the common config pointer is valid and we checked in get_bar_region that it
25026d84a31SYJwu2023         // was aligned.
25126d84a31SYJwu2023         unsafe {
25226d84a31SYJwu2023             volwrite!(self.common_cfg, device_feature_select, 0);
25326d84a31SYJwu2023             let mut device_features_bits = volread!(self.common_cfg, device_feature) as u64;
25426d84a31SYJwu2023             volwrite!(self.common_cfg, device_feature_select, 1);
25526d84a31SYJwu2023             device_features_bits |= (volread!(self.common_cfg, device_feature) as u64) << 32;
25626d84a31SYJwu2023             device_features_bits
25726d84a31SYJwu2023         }
25826d84a31SYJwu2023     }
25926d84a31SYJwu2023 
26026d84a31SYJwu2023     fn write_driver_features(&mut self, driver_features: u64) {
26126d84a31SYJwu2023         // Safe because the common config pointer is valid and we checked in get_bar_region that it
26226d84a31SYJwu2023         // was aligned.
26326d84a31SYJwu2023         unsafe {
26426d84a31SYJwu2023             volwrite!(self.common_cfg, driver_feature_select, 0);
26526d84a31SYJwu2023             volwrite!(self.common_cfg, driver_feature, driver_features as u32);
26626d84a31SYJwu2023             volwrite!(self.common_cfg, driver_feature_select, 1);
26726d84a31SYJwu2023             volwrite!(
26826d84a31SYJwu2023                 self.common_cfg,
26926d84a31SYJwu2023                 driver_feature,
27026d84a31SYJwu2023                 (driver_features >> 32) as u32
27126d84a31SYJwu2023             );
27226d84a31SYJwu2023         }
27326d84a31SYJwu2023     }
27426d84a31SYJwu2023 
27526d84a31SYJwu2023     fn max_queue_size(&self) -> u32 {
27626d84a31SYJwu2023         // Safe because the common config pointer is valid and we checked in get_bar_region that it
27726d84a31SYJwu2023         // was aligned.
27826d84a31SYJwu2023         unsafe { volread!(self.common_cfg, queue_size) }.into()
27926d84a31SYJwu2023     }
28026d84a31SYJwu2023 
28126d84a31SYJwu2023     fn notify(&mut self, queue: u16) {
28226d84a31SYJwu2023         // Safe because the common config and notify region pointers are valid and we checked in
28326d84a31SYJwu2023         // get_bar_region that they were aligned.
28426d84a31SYJwu2023         unsafe {
28526d84a31SYJwu2023             volwrite!(self.common_cfg, queue_select, queue);
28626d84a31SYJwu2023             // TODO: Consider caching this somewhere (per queue).
28726d84a31SYJwu2023             let queue_notify_off = volread!(self.common_cfg, queue_notify_off);
28826d84a31SYJwu2023 
28926d84a31SYJwu2023             let offset_bytes = usize::from(queue_notify_off) * self.notify_off_multiplier as usize;
29026d84a31SYJwu2023             let index = offset_bytes / size_of::<u16>();
29126d84a31SYJwu2023             addr_of_mut!((*self.notify_region.as_ptr())[index]).vwrite(queue);
29226d84a31SYJwu2023         }
29326d84a31SYJwu2023     }
29426d84a31SYJwu2023 
29526d84a31SYJwu2023     fn set_status(&mut self, status: DeviceStatus) {
29626d84a31SYJwu2023         // Safe because the common config pointer is valid and we checked in get_bar_region that it
29726d84a31SYJwu2023         // was aligned.
29826d84a31SYJwu2023         unsafe {
29926d84a31SYJwu2023             volwrite!(self.common_cfg, device_status, status.bits() as u8);
30026d84a31SYJwu2023         }
30126d84a31SYJwu2023     }
30226d84a31SYJwu2023 
30326d84a31SYJwu2023     fn set_guest_page_size(&mut self, _guest_page_size: u32) {
30426d84a31SYJwu2023         // No-op, the PCI transport doesn't care.
30526d84a31SYJwu2023     }
30673c607aaSYJwu2023     fn requires_legacy_layout(&self) -> bool {
30773c607aaSYJwu2023         false
30873c607aaSYJwu2023     }
30926d84a31SYJwu2023     fn queue_set(
31026d84a31SYJwu2023         &mut self,
31126d84a31SYJwu2023         queue: u16,
31226d84a31SYJwu2023         size: u32,
31326d84a31SYJwu2023         descriptors: PhysAddr,
31426d84a31SYJwu2023         driver_area: PhysAddr,
31526d84a31SYJwu2023         device_area: PhysAddr,
31626d84a31SYJwu2023     ) {
31726d84a31SYJwu2023         // Safe because the common config pointer is valid and we checked in get_bar_region that it
31826d84a31SYJwu2023         // was aligned.
31926d84a31SYJwu2023         unsafe {
32026d84a31SYJwu2023             volwrite!(self.common_cfg, queue_select, queue);
32126d84a31SYJwu2023             volwrite!(self.common_cfg, queue_size, size as u16);
32226d84a31SYJwu2023             volwrite!(self.common_cfg, queue_desc, descriptors as u64);
32326d84a31SYJwu2023             volwrite!(self.common_cfg, queue_driver, driver_area as u64);
32426d84a31SYJwu2023             volwrite!(self.common_cfg, queue_device, device_area as u64);
325afc95d5cSYJwu2023             // 这里设置队列中断对应的中断项
3260dd8ff43SYJwu2023             if queue == QUEUE_RECEIVE {
3270dd8ff43SYJwu2023                 volwrite!(self.common_cfg, queue_msix_vector, VIRTIO_RECV_VECTOR_INDEX);
3280dd8ff43SYJwu2023                 let vector = volread!(self.common_cfg, queue_msix_vector);
3290dd8ff43SYJwu2023                 if vector != VIRTIO_RECV_VECTOR_INDEX {
3300dd8ff43SYJwu2023                     panic!("Vector set failed");
3310dd8ff43SYJwu2023                 }
3320dd8ff43SYJwu2023             }
33326d84a31SYJwu2023             volwrite!(self.common_cfg, queue_enable, 1);
33426d84a31SYJwu2023         }
33526d84a31SYJwu2023     }
33626d84a31SYJwu2023 
33726d84a31SYJwu2023     fn queue_unset(&mut self, queue: u16) {
33826d84a31SYJwu2023         // Safe because the common config pointer is valid and we checked in get_bar_region that it
33926d84a31SYJwu2023         // was aligned.
34026d84a31SYJwu2023         unsafe {
34126d84a31SYJwu2023             volwrite!(self.common_cfg, queue_select, queue);
34226d84a31SYJwu2023             volwrite!(self.common_cfg, queue_size, 0);
34326d84a31SYJwu2023             volwrite!(self.common_cfg, queue_desc, 0);
34426d84a31SYJwu2023             volwrite!(self.common_cfg, queue_driver, 0);
34526d84a31SYJwu2023             volwrite!(self.common_cfg, queue_device, 0);
34626d84a31SYJwu2023         }
34726d84a31SYJwu2023     }
34826d84a31SYJwu2023 
34926d84a31SYJwu2023     fn queue_used(&mut self, queue: u16) -> bool {
35026d84a31SYJwu2023         // Safe because the common config pointer is valid and we checked in get_bar_region that it
35126d84a31SYJwu2023         // was aligned.
35226d84a31SYJwu2023         unsafe {
35326d84a31SYJwu2023             volwrite!(self.common_cfg, queue_select, queue);
35426d84a31SYJwu2023             volread!(self.common_cfg, queue_enable) == 1
35526d84a31SYJwu2023         }
35626d84a31SYJwu2023     }
35726d84a31SYJwu2023 
35826d84a31SYJwu2023     fn ack_interrupt(&mut self) -> bool {
35926d84a31SYJwu2023         // Safe because the common config pointer is valid and we checked in get_bar_region that it
36026d84a31SYJwu2023         // was aligned.
36126d84a31SYJwu2023         // Reading the ISR status resets it to 0 and causes the device to de-assert the interrupt.
36226d84a31SYJwu2023         let isr_status = unsafe { self.isr_status.as_ptr().vread() };
36326d84a31SYJwu2023         // TODO: Distinguish between queue interrupt and device configuration interrupt.
36426d84a31SYJwu2023         isr_status & 0x3 != 0
36526d84a31SYJwu2023     }
36626d84a31SYJwu2023 
36726d84a31SYJwu2023     fn config_space<T>(&self) -> Result<NonNull<T>, Error> {
36826d84a31SYJwu2023         if let Some(config_space) = self.config_space {
36926d84a31SYJwu2023             if size_of::<T>() > config_space.len() * size_of::<u32>() {
37026d84a31SYJwu2023                 Err(Error::ConfigSpaceTooSmall)
37126d84a31SYJwu2023             } else if align_of::<T>() > 4 {
37226d84a31SYJwu2023                 // Panic as this should only happen if the driver is written incorrectly.
37326d84a31SYJwu2023                 panic!(
37426d84a31SYJwu2023                     "Driver expected config space alignment of {} bytes, but VirtIO only guarantees 4 byte alignment.",
37526d84a31SYJwu2023                     align_of::<T>()
37626d84a31SYJwu2023                 );
37726d84a31SYJwu2023             } else {
37826d84a31SYJwu2023                 // TODO: Use NonNull::as_non_null_ptr once it is stable.
37926d84a31SYJwu2023                 let config_space_ptr = NonNull::new(config_space.as_ptr() as *mut u32).unwrap();
38026d84a31SYJwu2023                 Ok(config_space_ptr.cast())
38126d84a31SYJwu2023             }
38226d84a31SYJwu2023         } else {
38326d84a31SYJwu2023             Err(Error::ConfigSpaceMissing)
38426d84a31SYJwu2023         }
38526d84a31SYJwu2023     }
38626d84a31SYJwu2023 }
38726d84a31SYJwu2023 
38873c607aaSYJwu2023 impl Drop for PciTransport {
38973c607aaSYJwu2023     fn drop(&mut self) {
39073c607aaSYJwu2023         // Reset the device when the transport is dropped.
391*e2841179SLoGin         self.set_status(DeviceStatus::empty());
392*e2841179SLoGin 
393*e2841179SLoGin         // todo: 调用pci的中断释放函数,并且在virtio_irq_manager里面删除对应的设备的中断
39473c607aaSYJwu2023     }
39573c607aaSYJwu2023 }
39673c607aaSYJwu2023 
39726d84a31SYJwu2023 #[repr(C)]
39826d84a31SYJwu2023 struct CommonCfg {
39926d84a31SYJwu2023     device_feature_select: Volatile<u32>,
40026d84a31SYJwu2023     device_feature: ReadOnly<u32>,
40126d84a31SYJwu2023     driver_feature_select: Volatile<u32>,
40226d84a31SYJwu2023     driver_feature: Volatile<u32>,
40326d84a31SYJwu2023     msix_config: Volatile<u16>,
40426d84a31SYJwu2023     num_queues: ReadOnly<u16>,
40526d84a31SYJwu2023     device_status: Volatile<u8>,
40626d84a31SYJwu2023     config_generation: ReadOnly<u8>,
40726d84a31SYJwu2023     queue_select: Volatile<u16>,
40826d84a31SYJwu2023     queue_size: Volatile<u16>,
40926d84a31SYJwu2023     queue_msix_vector: Volatile<u16>,
41026d84a31SYJwu2023     queue_enable: Volatile<u16>,
41126d84a31SYJwu2023     queue_notify_off: Volatile<u16>,
41226d84a31SYJwu2023     queue_desc: Volatile<u64>,
41326d84a31SYJwu2023     queue_driver: Volatile<u64>,
41426d84a31SYJwu2023     queue_device: Volatile<u64>,
41526d84a31SYJwu2023 }
41626d84a31SYJwu2023 
41726d84a31SYJwu2023 /// Information about a VirtIO structure within some BAR, as provided by a `virtio_pci_cap`.
41826d84a31SYJwu2023 /// cfg空间在哪个bar的多少偏移处,长度多少
41926d84a31SYJwu2023 #[derive(Clone, Debug, Eq, PartialEq)]
42026d84a31SYJwu2023 struct VirtioCapabilityInfo {
42126d84a31SYJwu2023     /// The bar in which the structure can be found.
42226d84a31SYJwu2023     bar: u8,
42326d84a31SYJwu2023     /// The offset within the bar.
42426d84a31SYJwu2023     offset: u32,
42526d84a31SYJwu2023     /// The length in bytes of the structure within the bar.
42626d84a31SYJwu2023     length: u32,
42726d84a31SYJwu2023 }
42826d84a31SYJwu2023 
42926d84a31SYJwu2023 /// An error encountered initialising a VirtIO PCI transport.
43026d84a31SYJwu2023 /// VirtIO PCI transport 初始化时的错误
43126d84a31SYJwu2023 #[derive(Clone, Debug, Eq, PartialEq)]
43226d84a31SYJwu2023 pub enum VirtioPciError {
43326d84a31SYJwu2023     /// PCI device vender ID was not the VirtIO vendor ID.
43426d84a31SYJwu2023     InvalidVendorId(u16),
43526d84a31SYJwu2023     /// No valid `VIRTIO_PCI_CAP_COMMON_CFG` capability was found.
43626d84a31SYJwu2023     MissingCommonConfig,
43726d84a31SYJwu2023     /// No valid `VIRTIO_PCI_CAP_NOTIFY_CFG` capability was found.
43826d84a31SYJwu2023     MissingNotifyConfig,
43926d84a31SYJwu2023     /// `VIRTIO_PCI_CAP_NOTIFY_CFG` capability has a `notify_off_multiplier` that is not a multiple
44026d84a31SYJwu2023     /// of 2.
44126d84a31SYJwu2023     InvalidNotifyOffMultiplier(u32),
44226d84a31SYJwu2023     /// No valid `VIRTIO_PCI_CAP_ISR_CFG` capability was found.
44326d84a31SYJwu2023     MissingIsrConfig,
44426d84a31SYJwu2023     /// An IO BAR was provided rather than a memory BAR.
44526d84a31SYJwu2023     UnexpectedBarType,
44626d84a31SYJwu2023     /// A BAR which we need was not allocated an address.
44726d84a31SYJwu2023     BarNotAllocated(u8),
44826d84a31SYJwu2023     /// The offset for some capability was greater than the length of the BAR.
44926d84a31SYJwu2023     BarOffsetOutOfRange,
45026d84a31SYJwu2023     /// The virtual address was not aligned as expected.
45126d84a31SYJwu2023     Misaligned {
45226d84a31SYJwu2023         /// The virtual address in question.
45326d84a31SYJwu2023         vaddr: VirtAddr,
45426d84a31SYJwu2023         /// The expected alignment in bytes.
45526d84a31SYJwu2023         alignment: usize,
45626d84a31SYJwu2023     },
45726d84a31SYJwu2023     ///获取虚拟地址失败
45826d84a31SYJwu2023     BarGetVaddrFailed,
45926d84a31SYJwu2023     /// A generic PCI error,
46026d84a31SYJwu2023     Pci(PciError),
46126d84a31SYJwu2023 }
46226d84a31SYJwu2023 
46326d84a31SYJwu2023 impl Display for VirtioPciError {
46426d84a31SYJwu2023     fn fmt(&self, f: &mut Formatter) -> fmt::Result {
46526d84a31SYJwu2023         match self {
46626d84a31SYJwu2023             Self::InvalidVendorId(vendor_id) => write!(
46726d84a31SYJwu2023                 f,
46826d84a31SYJwu2023                 "PCI device vender ID {:#06x} was not the VirtIO vendor ID {:#06x}.",
46926d84a31SYJwu2023                 vendor_id, VIRTIO_VENDOR_ID
47026d84a31SYJwu2023             ),
47126d84a31SYJwu2023             Self::MissingCommonConfig => write!(
47226d84a31SYJwu2023                 f,
47326d84a31SYJwu2023                 "No valid `VIRTIO_PCI_CAP_COMMON_CFG` capability was found."
47426d84a31SYJwu2023             ),
47526d84a31SYJwu2023             Self::MissingNotifyConfig => write!(
47626d84a31SYJwu2023                 f,
47726d84a31SYJwu2023                 "No valid `VIRTIO_PCI_CAP_NOTIFY_CFG` capability was found."
47826d84a31SYJwu2023             ),
47926d84a31SYJwu2023             Self::InvalidNotifyOffMultiplier(notify_off_multiplier) => {
48026d84a31SYJwu2023                 write!(
48126d84a31SYJwu2023                     f,
48226d84a31SYJwu2023                     "`VIRTIO_PCI_CAP_NOTIFY_CFG` capability has a `notify_off_multiplier` that is not a multiple of 2: {}",
48326d84a31SYJwu2023                     notify_off_multiplier
48426d84a31SYJwu2023                 )
48526d84a31SYJwu2023             }
48626d84a31SYJwu2023             Self::MissingIsrConfig => {
48726d84a31SYJwu2023                 write!(f, "No valid `VIRTIO_PCI_CAP_ISR_CFG` capability was found.")
48826d84a31SYJwu2023             }
48926d84a31SYJwu2023             Self::UnexpectedBarType => write!(f, "Unexpected BAR (expected memory BAR)."),
49026d84a31SYJwu2023             Self::BarNotAllocated(bar_index) => write!(f, "Bar {} not allocated.", bar_index),
49126d84a31SYJwu2023             Self::BarOffsetOutOfRange => write!(f, "Capability offset greater than BAR length."),
49226d84a31SYJwu2023             Self::Misaligned { vaddr, alignment } => write!(
49326d84a31SYJwu2023                 f,
4942dd9f0c7SLoGin                 "Virtual address {:?} was not aligned to a {} byte boundary as expected.",
49526d84a31SYJwu2023                 vaddr, alignment
49626d84a31SYJwu2023             ),
49726d84a31SYJwu2023             Self::BarGetVaddrFailed => write!(f, "Get bar virtaddress failed"),
49826d84a31SYJwu2023             Self::Pci(pci_error) => pci_error.fmt(f),
49926d84a31SYJwu2023         }
50026d84a31SYJwu2023     }
50126d84a31SYJwu2023 }
50213776c11Slogin 
50326d84a31SYJwu2023 /// PCI error到VirtioPciError的转换,层层上报
50426d84a31SYJwu2023 impl From<PciError> for VirtioPciError {
50526d84a31SYJwu2023     fn from(error: PciError) -> Self {
50626d84a31SYJwu2023         Self::Pci(error)
50726d84a31SYJwu2023     }
50826d84a31SYJwu2023 }
50926d84a31SYJwu2023 
51026d84a31SYJwu2023 /// @brief 获取虚拟地址并将其转化为对应类型的指针
51126d84a31SYJwu2023 /// @param device_bar 存储bar信息的结构体 struct_info 存储cfg空间的位置信息
51226d84a31SYJwu2023 /// @return Result<NonNull<T>, VirtioPciError> 成功则返回对应类型的指针,失败则返回Error
51326d84a31SYJwu2023 fn get_bar_region<T>(
51478bf93f0SYJwu2023     device_bar: &PciStandardDeviceBar,
51526d84a31SYJwu2023     struct_info: &VirtioCapabilityInfo,
51626d84a31SYJwu2023 ) -> Result<NonNull<T>, VirtioPciError> {
51726d84a31SYJwu2023     let bar_info = device_bar.get_bar(struct_info.bar)?;
51826d84a31SYJwu2023     let (bar_address, bar_size) = bar_info
51926d84a31SYJwu2023         .memory_address_size()
52026d84a31SYJwu2023         .ok_or(VirtioPciError::UnexpectedBarType)?;
52126d84a31SYJwu2023     if bar_address == 0 {
52226d84a31SYJwu2023         return Err(VirtioPciError::BarNotAllocated(struct_info.bar));
52326d84a31SYJwu2023     }
52426d84a31SYJwu2023     if struct_info.offset + struct_info.length > bar_size
52526d84a31SYJwu2023         || size_of::<T>() > struct_info.length as usize
52626d84a31SYJwu2023     {
52726d84a31SYJwu2023         return Err(VirtioPciError::BarOffsetOutOfRange);
52826d84a31SYJwu2023     }
52973c607aaSYJwu2023     //kdebug!("Chossed bar ={},used={}",struct_info.bar,struct_info.offset + struct_info.length);
53026d84a31SYJwu2023     let vaddr = (bar_info
53126d84a31SYJwu2023         .virtual_address()
5322dd9f0c7SLoGin         .ok_or(VirtioPciError::BarGetVaddrFailed)?)
53326d84a31SYJwu2023         + struct_info.offset as usize;
5342dd9f0c7SLoGin     if vaddr.data() % align_of::<T>() != 0 {
53526d84a31SYJwu2023         return Err(VirtioPciError::Misaligned {
53626d84a31SYJwu2023             vaddr,
53726d84a31SYJwu2023             alignment: align_of::<T>(),
53826d84a31SYJwu2023         });
53926d84a31SYJwu2023     }
5402dd9f0c7SLoGin     let vaddr = NonNull::new(vaddr.data() as *mut u8).unwrap();
54173c607aaSYJwu2023     Ok(vaddr.cast())
54226d84a31SYJwu2023 }
54326d84a31SYJwu2023 
544cc36cf4aSYJwu2023 /// @brief 获取虚拟地址并将其转化为对应类型的切片的指针
54573c607aaSYJwu2023 /// @param device_bar 存储bar信息的结构体 struct_info 存储cfg空间的位置信息切片的指针
54626d84a31SYJwu2023 /// @return Result<NonNull<[T]>, VirtioPciError> 成功则返回对应类型的指针切片,失败则返回Error
54726d84a31SYJwu2023 fn get_bar_region_slice<T>(
54878bf93f0SYJwu2023     device_bar: &PciStandardDeviceBar,
54926d84a31SYJwu2023     struct_info: &VirtioCapabilityInfo,
55026d84a31SYJwu2023 ) -> Result<NonNull<[T]>, VirtioPciError> {
55126d84a31SYJwu2023     let ptr = get_bar_region::<T>(device_bar, struct_info)?;
55273c607aaSYJwu2023     // let raw_slice =
55373c607aaSYJwu2023     //     ptr::slice_from_raw_parts_mut(ptr.as_ptr(), struct_info.length as usize / size_of::<T>());
55473c607aaSYJwu2023     Ok(nonnull_slice_from_raw_parts(
55573c607aaSYJwu2023         ptr,
55673c607aaSYJwu2023         struct_info.length as usize / size_of::<T>(),
55773c607aaSYJwu2023     ))
55873c607aaSYJwu2023 }
55913776c11Slogin 
56073c607aaSYJwu2023 fn nonnull_slice_from_raw_parts<T>(data: NonNull<T>, len: usize) -> NonNull<[T]> {
56173c607aaSYJwu2023     NonNull::new(ptr::slice_from_raw_parts_mut(data.as_ptr(), len)).unwrap()
56226d84a31SYJwu2023 }
563*e2841179SLoGin 
564*e2841179SLoGin /// `DefaultVirtioIrqHandler` 是一个默认的virtio设备中断处理程序。
565*e2841179SLoGin ///
566*e2841179SLoGin /// 当虚拟设备产生中断时,该处理程序会被调用。
567*e2841179SLoGin ///
568*e2841179SLoGin /// 它首先检查设备ID是否存在,然后尝试查找与设备ID关联的设备。
569*e2841179SLoGin /// 如果找到设备,它会调用设备的 `handle_irq` 方法来处理中断。
570*e2841179SLoGin /// 如果没有找到设备,它会记录一条警告并返回 `IrqReturn::NotHandled`,表示中断未被处理。
571*e2841179SLoGin #[derive(Debug)]
572*e2841179SLoGin struct DefaultVirtioIrqHandler;
573*e2841179SLoGin 
574*e2841179SLoGin impl IrqHandler for DefaultVirtioIrqHandler {
575*e2841179SLoGin     fn handle(
576*e2841179SLoGin         &self,
577*e2841179SLoGin         irq: IrqNumber,
578*e2841179SLoGin         _static_data: Option<&dyn IrqHandlerData>,
579*e2841179SLoGin         dev_id: Option<Arc<dyn IrqHandlerData>>,
580*e2841179SLoGin     ) -> Result<IrqReturn, SystemError> {
581*e2841179SLoGin         let dev_id = dev_id.ok_or(SystemError::EINVAL)?;
582*e2841179SLoGin         let dev_id = dev_id
583*e2841179SLoGin             .arc_any()
584*e2841179SLoGin             .downcast::<DeviceId>()
585*e2841179SLoGin             .map_err(|_| SystemError::EINVAL)?;
586*e2841179SLoGin 
587*e2841179SLoGin         if let Some(dev) = virtio_irq_manager().lookup_device(&dev_id) {
588*e2841179SLoGin             return dev.handle_irq(irq);
589*e2841179SLoGin         } else {
590*e2841179SLoGin             // 未绑定具体设备,因此无法处理中断
591*e2841179SLoGin 
592*e2841179SLoGin             return Ok(IrqReturn::NotHandled);
593*e2841179SLoGin         }
594*e2841179SLoGin     }
595*e2841179SLoGin }
596