1370472f7SLoGin use core::fmt::Formatter; 2370472f7SLoGin 3370472f7SLoGin use alloc::sync::Arc; 4370472f7SLoGin use hashbrown::HashMap; 5370472f7SLoGin 6370472f7SLoGin use crate::{ 7370472f7SLoGin libs::spinlock::{SpinLock, SpinLockGuard}, 8370472f7SLoGin mm::{ 9370472f7SLoGin mmio_buddy::{mmio_pool, MMIOSpaceGuard}, 10370472f7SLoGin page::PAGE_2M_SIZE, 11370472f7SLoGin PhysAddr, 12370472f7SLoGin }, 13370472f7SLoGin }; 14370472f7SLoGin 15370472f7SLoGin use super::pci::{ 16370472f7SLoGin BusDeviceFunction, ExternalCapabilityIterator, PciCam, PciError, SegmentGroupNumber, 17370472f7SLoGin }; 18370472f7SLoGin 19370472f7SLoGin lazy_static! { 20370472f7SLoGin static ref PCI_ROOT_MANAGER: PciRootManager = PciRootManager::new(); 21370472f7SLoGin } 22370472f7SLoGin 23370472f7SLoGin #[inline(always)] 24370472f7SLoGin pub fn pci_root_manager() -> &'static PciRootManager { 25370472f7SLoGin &PCI_ROOT_MANAGER 26370472f7SLoGin } 27370472f7SLoGin 28370472f7SLoGin /// 代表一个PCI segement greoup. 29370472f7SLoGin #[derive(Clone, Debug)] 30370472f7SLoGin pub struct PciRoot { 31370472f7SLoGin pub physical_address_base: PhysAddr, //物理地址,acpi获取 32370472f7SLoGin pub mmio_guard: Option<Arc<MMIOSpaceGuard>>, //映射后的虚拟地址,为方便访问数据这里转化成指针 33370472f7SLoGin pub segment_group_number: SegmentGroupNumber, //segement greoup的id 34370472f7SLoGin pub bus_begin: u8, //该分组中的最小bus 35370472f7SLoGin pub bus_end: u8, //该分组中的最大bus 36370472f7SLoGin /// 配置空间访问机制 37370472f7SLoGin pub cam: PciCam, 38370472f7SLoGin } 39370472f7SLoGin 40370472f7SLoGin ///线程间共享需要,该结构体只需要在初始化时写入数据,无需读写锁保证线程安全 41370472f7SLoGin unsafe impl Send for PciRoot {} 42370472f7SLoGin unsafe impl Sync for PciRoot {} 43370472f7SLoGin ///实现PciRoot的Display trait,自定义输出 44370472f7SLoGin impl core::fmt::Display for PciRoot { 45370472f7SLoGin fn fmt(&self, f: &mut Formatter<'_>) -> core::fmt::Result { 46370472f7SLoGin write!( 47370472f7SLoGin f, 48370472f7SLoGin "PCI Root with segement:{}, bus begin at {}, bus end at {}, physical address at {:?},mapped at {:?}", 49370472f7SLoGin self.segment_group_number, self.bus_begin, self.bus_end, self.physical_address_base, self.mmio_guard 50370472f7SLoGin ) 51370472f7SLoGin } 52370472f7SLoGin } 53370472f7SLoGin 54370472f7SLoGin impl PciRoot { 55370472f7SLoGin /// 此函数用于初始化一个PciRoot结构体实例, 56370472f7SLoGin /// 该结构体基于ECAM根的物理地址,将其映射到虚拟地址 57370472f7SLoGin /// 58370472f7SLoGin /// ## 参数 59370472f7SLoGin /// 60370472f7SLoGin /// - segment_group_number: ECAM根的段组号。 61370472f7SLoGin /// - cam: PCI配置空间访问机制 62370472f7SLoGin /// 63370472f7SLoGin /// ## 返回值 64370472f7SLoGin /// 65370472f7SLoGin /// - Ok(Self): 初始化成功,返回一个新的结构体实例。 66370472f7SLoGin /// - Err(PciError): 初始化过程中发生错误,返回错误信息。 67370472f7SLoGin /// 68370472f7SLoGin /// ## 副作用 69370472f7SLoGin /// 70370472f7SLoGin /// - 成功执行后,结构体的内部状态将被初始化为包含映射后的虚拟地址。 71370472f7SLoGin pub fn new( 72370472f7SLoGin segment_group_number: SegmentGroupNumber, 73370472f7SLoGin cam: PciCam, 74370472f7SLoGin phys_base: PhysAddr, 75370472f7SLoGin bus_begin: u8, 76370472f7SLoGin bus_end: u8, 77370472f7SLoGin ) -> Result<Arc<Self>, PciError> { 78370472f7SLoGin assert_eq!(cam, PciCam::Ecam); 79370472f7SLoGin let mut pci_root = Self { 80370472f7SLoGin physical_address_base: phys_base, 81370472f7SLoGin mmio_guard: None, 82370472f7SLoGin segment_group_number, 83370472f7SLoGin bus_begin, 84370472f7SLoGin bus_end, 85370472f7SLoGin cam, 86370472f7SLoGin }; 87370472f7SLoGin pci_root.map()?; 88370472f7SLoGin 89370472f7SLoGin Ok(Arc::new(pci_root)) 90370472f7SLoGin } 91370472f7SLoGin /// @brief 完成物理地址到虚拟地址的映射,并将虚拟地址加入mmio_base变量 92370472f7SLoGin /// @return 返回错误或Ok(0) 93370472f7SLoGin fn map(&mut self) -> Result<u8, PciError> { 94*2eab6dd7S曾俊 //debug!("bus_begin={},bus_end={}", self.bus_begin,self.bus_end); 95370472f7SLoGin let bus_number = (self.bus_end - self.bus_begin) as u32 + 1; 96370472f7SLoGin let bus_number_double = (bus_number - 1) / 2 + 1; //一个bus占据1MB空间,计算全部bus占据空间相对于2MB空间的个数 97370472f7SLoGin 98370472f7SLoGin let size = (bus_number_double as usize) * PAGE_2M_SIZE; 99370472f7SLoGin unsafe { 100370472f7SLoGin let space_guard = mmio_pool() 101370472f7SLoGin .create_mmio(size) 102370472f7SLoGin .map_err(|_| PciError::CreateMmioError)?; 103370472f7SLoGin let space_guard = Arc::new(space_guard); 104370472f7SLoGin self.mmio_guard = Some(space_guard.clone()); 105370472f7SLoGin 106370472f7SLoGin assert!(space_guard 107370472f7SLoGin .map_phys(self.physical_address_base, size) 108370472f7SLoGin .is_ok()); 109370472f7SLoGin } 110370472f7SLoGin return Ok(0); 111370472f7SLoGin } 112370472f7SLoGin 113370472f7SLoGin /// # cam_offset - 获得要操作的寄存器相对于mmio_offset的偏移量 114370472f7SLoGin /// 115370472f7SLoGin /// 此函数用于计算一个PCI设备中特定寄存器相对于该设备的MMIO基地址的偏移量。 116370472f7SLoGin /// 117370472f7SLoGin /// ## 参数 118370472f7SLoGin /// 119370472f7SLoGin /// - `bus_device_function`: BusDeviceFunction,用于标识在同一组中的PCI设备。 120370472f7SLoGin /// - `register_offset`: u16,寄存器在设备中的偏移量。 121370472f7SLoGin /// 122370472f7SLoGin /// ## 返回值 123370472f7SLoGin /// 124370472f7SLoGin /// - `u32`: 成功时,返回要操作的寄存器相对于mmio_offset的偏移量。 125370472f7SLoGin /// 126370472f7SLoGin /// ## Panic 127370472f7SLoGin /// 128370472f7SLoGin /// - 此函数在参数有效性方面进行了断言,如果传入的`bus_device_function`无效,将panic。 129370472f7SLoGin /// - 此函数计算出的地址需要是字对齐的(即地址与0x3对齐)。如果不是,将panic。 130370472f7SLoGin fn cam_offset(&self, bus_device_function: BusDeviceFunction, register_offset: u16) -> u32 { 131370472f7SLoGin assert!(bus_device_function.valid()); 132370472f7SLoGin let bdf = ((bus_device_function.bus - self.bus_begin) as u32) << 8 133370472f7SLoGin | (bus_device_function.device as u32) << 3 134370472f7SLoGin | bus_device_function.function as u32; 135370472f7SLoGin let address = 136370472f7SLoGin bdf << match self.cam { 137370472f7SLoGin PciCam::MmioCam => 8, 138370472f7SLoGin PciCam::Ecam => 12, 139370472f7SLoGin } | register_offset as u32; 140370472f7SLoGin // Ensure that address is word-aligned. 141370472f7SLoGin assert!(address & 0x3 == 0); 142370472f7SLoGin address 143370472f7SLoGin } 144370472f7SLoGin /// # read_config - 通过bus_device_function和offset读取相应位置寄存器的值(32位) 145370472f7SLoGin /// 146370472f7SLoGin /// 此函数用于通过指定的bus_device_function和register_offset读取PCI设备中相应位置的寄存器值。 147370472f7SLoGin /// 148370472f7SLoGin /// ## 参数 149370472f7SLoGin /// 150370472f7SLoGin /// - `bus_device_function`: 在同一个group中pci设备的唯一标识符 151370472f7SLoGin /// - `register_offset`: 寄存器在设备中的offset 152370472f7SLoGin /// 153370472f7SLoGin /// ## 返回值 154370472f7SLoGin /// 155370472f7SLoGin /// - `u32`: 寄存器读值结果 156370472f7SLoGin pub fn read_config(&self, bus_device_function: BusDeviceFunction, register_offset: u16) -> u32 { 157370472f7SLoGin let address = self.cam_offset(bus_device_function, register_offset); 158370472f7SLoGin unsafe { 159370472f7SLoGin // Right shift to convert from byte offset to word offset. 160370472f7SLoGin ((self.mmio_guard.as_ref().unwrap().vaddr().data() as *mut u32) 161370472f7SLoGin .add((address >> 2) as usize)) 162370472f7SLoGin .read_volatile() 163370472f7SLoGin } 164370472f7SLoGin } 165370472f7SLoGin 166370472f7SLoGin /// # write_config - 通过bus_device_function和offset写入相应位置寄存器值(32位) 167370472f7SLoGin /// 168370472f7SLoGin /// 此函数用于通过指定的bus_device_function和register_offset,向PCI设备写入一个32位的寄存器值。 169370472f7SLoGin /// 170370472f7SLoGin /// ## 参数 171370472f7SLoGin /// 172370472f7SLoGin /// - `bus_device_function`: 在同一个group中pci设备的唯一标识符 173370472f7SLoGin /// - `register_offset`: 寄存器在设备中的offset 174370472f7SLoGin /// - `data`: 要写入的数据 175370472f7SLoGin pub fn write_config( 176370472f7SLoGin &self, 177370472f7SLoGin bus_device_function: BusDeviceFunction, 178370472f7SLoGin register_offset: u16, 179370472f7SLoGin data: u32, 180370472f7SLoGin ) { 181370472f7SLoGin let address = self.cam_offset(bus_device_function, register_offset); 182370472f7SLoGin // Safe because both the `mmio_base` and the address offset are properly aligned, and the 183370472f7SLoGin // resulting pointer is within the MMIO range of the CAM. 184370472f7SLoGin unsafe { 185370472f7SLoGin // Right shift to convert from byte offset to word offset. 186370472f7SLoGin ((self.mmio_guard.as_ref().unwrap().vaddr().data() as *mut u32) 187370472f7SLoGin .add((address >> 2) as usize)) 188370472f7SLoGin .write_volatile(data) 189370472f7SLoGin } 190370472f7SLoGin } 191370472f7SLoGin /// 返回迭代器,遍历pcie设备的external_capabilities 192370472f7SLoGin #[allow(dead_code)] 193370472f7SLoGin pub fn external_capabilities( 194370472f7SLoGin &self, 195370472f7SLoGin bus_device_function: BusDeviceFunction, 196370472f7SLoGin ) -> ExternalCapabilityIterator { 197370472f7SLoGin ExternalCapabilityIterator { 198370472f7SLoGin root: self, 199370472f7SLoGin bus_device_function, 200370472f7SLoGin next_capability_offset: Some(0x100), 201370472f7SLoGin } 202370472f7SLoGin } 203370472f7SLoGin } 204370472f7SLoGin 205370472f7SLoGin #[inline(always)] 206370472f7SLoGin pub fn pci_root_0() -> Arc<PciRoot> { 207370472f7SLoGin pci_root_manager().get_pci_root(0).unwrap() 208370472f7SLoGin } 209370472f7SLoGin 210370472f7SLoGin pub struct PciRootManager { 211370472f7SLoGin inner: SpinLock<InnerPciRootManager>, 212370472f7SLoGin } 213370472f7SLoGin 214370472f7SLoGin struct InnerPciRootManager { 215370472f7SLoGin pci_root: HashMap<SegmentGroupNumber, Arc<PciRoot>>, 216370472f7SLoGin } 217370472f7SLoGin 218370472f7SLoGin impl PciRootManager { 219370472f7SLoGin pub fn new() -> Self { 220370472f7SLoGin Self { 221370472f7SLoGin inner: SpinLock::new(InnerPciRootManager { 222370472f7SLoGin pci_root: HashMap::new(), 223370472f7SLoGin }), 224370472f7SLoGin } 225370472f7SLoGin } 226370472f7SLoGin 227370472f7SLoGin /// # 添加PciRoot - 向PciRootManager中添加一个PciRoot 228370472f7SLoGin /// 229370472f7SLoGin /// 向PciRootManager中添加一个新的PciRoot,通过其segment_group_number进行标识。 230370472f7SLoGin /// 231370472f7SLoGin /// ## 参数 232370472f7SLoGin /// 233370472f7SLoGin /// - `pci_root`: Arc<PciRoot>,要添加的PciRoot的Arc指针 234370472f7SLoGin pub fn add_pci_root(&self, pci_root: Arc<PciRoot>) { 235370472f7SLoGin let mut inner = self.inner.lock(); 236370472f7SLoGin inner 237370472f7SLoGin .pci_root 238370472f7SLoGin .insert(pci_root.segment_group_number, pci_root); 239370472f7SLoGin } 240370472f7SLoGin 241370472f7SLoGin /// # 检查是否存在PciRoot - 检查PciRootManager中是否存在指定segment_group_number的PciRoot 242370472f7SLoGin /// 243370472f7SLoGin /// 检查PciRootManager中是否存在segment_group_number对应的PciRoot。 244370472f7SLoGin /// 245370472f7SLoGin /// ## 参数 246370472f7SLoGin /// 247370472f7SLoGin /// - `segement_group_number`: SegmentGroupNumber,要检查的segment_group_number。 248370472f7SLoGin /// 249370472f7SLoGin /// ## 返回值 250370472f7SLoGin /// 251370472f7SLoGin /// - `true`: 如果存在对应的PciRoot。 252370472f7SLoGin /// - `false`: 如果不存在对应的PciRoot。 253370472f7SLoGin pub fn has_root(&self, segement_group_number: SegmentGroupNumber) -> bool { 254370472f7SLoGin self.inner 255370472f7SLoGin .lock() 256370472f7SLoGin .pci_root 257370472f7SLoGin .contains_key(&segement_group_number) 258370472f7SLoGin } 259370472f7SLoGin 260370472f7SLoGin /// # 获取PciRoot - 从PciRootManager中获取指定segment_group_number的PciRoot 261370472f7SLoGin /// 262370472f7SLoGin /// 从PciRootManager中获取segment_group_number对应的PciRoot。 263370472f7SLoGin /// 264370472f7SLoGin /// ## 参数 265370472f7SLoGin /// 266370472f7SLoGin /// - `segement_group_number`: SegmentGroupNumber,要获取的PciRoot的segment_group_number。 267370472f7SLoGin /// 268370472f7SLoGin /// ## 返回值 269370472f7SLoGin /// 270370472f7SLoGin /// - `Some(Arc<PciRoot>)`: 如果找到对应的PciRoot,返回其引用。 271370472f7SLoGin /// - `None`: 如果没有找到对应的PciRoot。 272370472f7SLoGin pub fn get_pci_root(&self, segement_group_number: SegmentGroupNumber) -> Option<Arc<PciRoot>> { 273370472f7SLoGin self.inner 274370472f7SLoGin .lock() 275370472f7SLoGin .pci_root 276370472f7SLoGin .get(&segement_group_number) 277370472f7SLoGin .cloned() 278370472f7SLoGin } 279370472f7SLoGin 280370472f7SLoGin /// # PciRoot迭代器 - 创建一个新的PciRoot迭代器 281370472f7SLoGin /// 282370472f7SLoGin /// 创建一个新的迭代器,用于遍历PciRootManager中的所有PciRoot。 283370472f7SLoGin #[allow(dead_code)] 284370472f7SLoGin pub fn iter(&self) -> PciRootIterator<'_> { 285370472f7SLoGin PciRootIterator { 286370472f7SLoGin inner: self.inner.lock(), 287370472f7SLoGin index: 0, 288370472f7SLoGin } 289370472f7SLoGin } 290370472f7SLoGin } 291370472f7SLoGin 292370472f7SLoGin pub struct PciRootIterator<'a> { 293370472f7SLoGin inner: SpinLockGuard<'a, InnerPciRootManager>, 294370472f7SLoGin index: usize, 295370472f7SLoGin } 296370472f7SLoGin 297370472f7SLoGin impl<'a> Iterator for PciRootIterator<'a> { 298370472f7SLoGin type Item = Arc<PciRoot>; 299370472f7SLoGin 300370472f7SLoGin fn next(&mut self) -> Option<Self::Item> { 301370472f7SLoGin self.inner.pci_root.values().nth(self.index).cloned() 302370472f7SLoGin } 303370472f7SLoGin } 304