1*78bf93f0SYJwu2023 use crate::arch::TraitPciArch; 2*78bf93f0SYJwu2023 use crate::driver::acpi::acpi::mcfg_find_segment; 3*78bf93f0SYJwu2023 use crate::driver::pci::pci::{ 4*78bf93f0SYJwu2023 BusDeviceFunction, PciError, PciRoot, SegmentGroupNumber, PORT_PCI_CONFIG_ADDRESS, 5*78bf93f0SYJwu2023 PORT_PCI_CONFIG_DATA, 6*78bf93f0SYJwu2023 }; 7*78bf93f0SYJwu2023 use crate::include::bindings::bindings::{ 8*78bf93f0SYJwu2023 acpi_get_MCFG, acpi_iter_SDT, acpi_system_description_table_header_t, io_in32, io_out32, 9*78bf93f0SYJwu2023 }; 10*78bf93f0SYJwu2023 11*78bf93f0SYJwu2023 use core::ffi::c_void; 12*78bf93f0SYJwu2023 use core::ptr::NonNull; 13*78bf93f0SYJwu2023 pub struct X86_64PciArch {} 14*78bf93f0SYJwu2023 impl TraitPciArch for X86_64PciArch { 15*78bf93f0SYJwu2023 fn read_config(bus_device_function: &BusDeviceFunction, offset: u8) -> u32 { 16*78bf93f0SYJwu2023 // 构造pci配置空间地址 17*78bf93f0SYJwu2023 let address = ((bus_device_function.bus as u32) << 16) 18*78bf93f0SYJwu2023 | ((bus_device_function.device as u32) << 11) 19*78bf93f0SYJwu2023 | ((bus_device_function.function as u32 & 7) << 8) 20*78bf93f0SYJwu2023 | (offset & 0xfc) as u32 21*78bf93f0SYJwu2023 | (0x80000000); 22*78bf93f0SYJwu2023 let ret = unsafe { 23*78bf93f0SYJwu2023 io_out32(PORT_PCI_CONFIG_ADDRESS, address); 24*78bf93f0SYJwu2023 let temp = io_in32(PORT_PCI_CONFIG_DATA); 25*78bf93f0SYJwu2023 temp 26*78bf93f0SYJwu2023 }; 27*78bf93f0SYJwu2023 return ret; 28*78bf93f0SYJwu2023 } 29*78bf93f0SYJwu2023 30*78bf93f0SYJwu2023 fn write_config(bus_device_function: &BusDeviceFunction, offset: u8, data: u32) { 31*78bf93f0SYJwu2023 let address = ((bus_device_function.bus as u32) << 16) 32*78bf93f0SYJwu2023 | ((bus_device_function.device as u32) << 11) 33*78bf93f0SYJwu2023 | ((bus_device_function.function as u32 & 7) << 8) 34*78bf93f0SYJwu2023 | (offset & 0xfc) as u32 35*78bf93f0SYJwu2023 | (0x80000000); 36*78bf93f0SYJwu2023 unsafe { 37*78bf93f0SYJwu2023 io_out32(PORT_PCI_CONFIG_ADDRESS, address); 38*78bf93f0SYJwu2023 // 写入数据 39*78bf93f0SYJwu2023 io_out32(PORT_PCI_CONFIG_DATA, data); 40*78bf93f0SYJwu2023 } 41*78bf93f0SYJwu2023 } 42*78bf93f0SYJwu2023 43*78bf93f0SYJwu2023 fn address_pci_to_address_memory(address: usize) -> Result<usize, PciError> { 44*78bf93f0SYJwu2023 Ok(address) 45*78bf93f0SYJwu2023 } 46*78bf93f0SYJwu2023 47*78bf93f0SYJwu2023 fn ecam_root(segement: SegmentGroupNumber) -> Result<PciRoot, PciError> { 48*78bf93f0SYJwu2023 let mut data: usize = 0; 49*78bf93f0SYJwu2023 let data_point = &mut data; 50*78bf93f0SYJwu2023 unsafe { 51*78bf93f0SYJwu2023 acpi_iter_SDT(Some(acpi_get_MCFG), data_point as *mut usize as *mut c_void); 52*78bf93f0SYJwu2023 }; 53*78bf93f0SYJwu2023 //kdebug!("{}",data); 54*78bf93f0SYJwu2023 //loop{} 55*78bf93f0SYJwu2023 let head = NonNull::new(data as *mut acpi_system_description_table_header_t).unwrap(); 56*78bf93f0SYJwu2023 let outcome = unsafe { mcfg_find_segment(head).as_ref() }; 57*78bf93f0SYJwu2023 for segmentgroupconfiguration in outcome { 58*78bf93f0SYJwu2023 if segmentgroupconfiguration.segement_group_number == segement { 59*78bf93f0SYJwu2023 return Ok(PciRoot { 60*78bf93f0SYJwu2023 physical_address_base: segmentgroupconfiguration.base_address, 61*78bf93f0SYJwu2023 mmio_base: None, 62*78bf93f0SYJwu2023 segement_group_number: segement, 63*78bf93f0SYJwu2023 bus_begin: segmentgroupconfiguration.bus_begin, 64*78bf93f0SYJwu2023 bus_end: segmentgroupconfiguration.bus_end, 65*78bf93f0SYJwu2023 }); 66*78bf93f0SYJwu2023 } 67*78bf93f0SYJwu2023 } 68*78bf93f0SYJwu2023 return Err(PciError::SegmentNotFound); 69*78bf93f0SYJwu2023 } 70*78bf93f0SYJwu2023 } 71