xref: /DragonOS/kernel/src/arch/x86_64/kvm/vmx/mod.rs (revision 40314b30ab2a7e1fd06a05a00f693e644e446035)
1*40314b30SXiaoye Zheng pub mod ept;
2*40314b30SXiaoye Zheng pub mod kvm_emulation;
3*40314b30SXiaoye Zheng pub mod mmu;
4*40314b30SXiaoye Zheng pub mod seg;
5*40314b30SXiaoye Zheng pub mod vcpu;
6*40314b30SXiaoye Zheng pub mod vmcs;
7*40314b30SXiaoye Zheng pub mod vmexit;
8*40314b30SXiaoye Zheng pub mod vmx_asm_wrapper;
9*40314b30SXiaoye Zheng 
10*40314b30SXiaoye Zheng #[allow(dead_code)]
11*40314b30SXiaoye Zheng pub enum VcpuRegIndex {
12*40314b30SXiaoye Zheng     Rax = 0,
13*40314b30SXiaoye Zheng     Rbx = 1,
14*40314b30SXiaoye Zheng     Rcx = 2,
15*40314b30SXiaoye Zheng     Rdx = 3,
16*40314b30SXiaoye Zheng     Rsi = 4,
17*40314b30SXiaoye Zheng     Rdi = 5,
18*40314b30SXiaoye Zheng     Rsp = 6,
19*40314b30SXiaoye Zheng     Rbp = 7,
20*40314b30SXiaoye Zheng     R8 = 8,
21*40314b30SXiaoye Zheng     R9 = 9,
22*40314b30SXiaoye Zheng     R10 = 10,
23*40314b30SXiaoye Zheng     R11 = 11,
24*40314b30SXiaoye Zheng     R12 = 12,
25*40314b30SXiaoye Zheng     R13 = 13,
26*40314b30SXiaoye Zheng     R14 = 14,
27*40314b30SXiaoye Zheng     R15 = 15,
28*40314b30SXiaoye Zheng }
29*40314b30SXiaoye Zheng 
30*40314b30SXiaoye Zheng bitflags! {
31*40314b30SXiaoye Zheng     #[allow(non_camel_case_types)]
32*40314b30SXiaoye Zheng     pub struct X86_CR0: u32{
33*40314b30SXiaoye Zheng         const CR0_PE = 1 << 0; /* Protection Enable */
34*40314b30SXiaoye Zheng         const CR0_MP = 1 << 1; /* Monitor Coprocessor */
35*40314b30SXiaoye Zheng         const CR0_EM = 1 << 2; /* Emulation */
36*40314b30SXiaoye Zheng         const CR0_TS = 1 << 3; /* Task Switched */
37*40314b30SXiaoye Zheng         const CR0_ET = 1 << 4; /* Extension Type */
38*40314b30SXiaoye Zheng         const CR0_NE = 1 << 5; /* Numeric Error */
39*40314b30SXiaoye Zheng         const CR0_WP = 1 << 16; /* Write Protect */
40*40314b30SXiaoye Zheng         const CR0_AM = 1 << 18; /* Alignment Mask */
41*40314b30SXiaoye Zheng         const CR0_NW = 1 << 29; /* Not Write-through */
42*40314b30SXiaoye Zheng         const CR0_CD = 1 << 30; /* Cache Disable */
43*40314b30SXiaoye Zheng         const CR0_PG = 1 << 31; /* Paging */
44*40314b30SXiaoye Zheng     }
45*40314b30SXiaoye Zheng }
46