1 use bitfield_struct::bitfield; 2 3 #[allow(dead_code)] 4 #[derive(Debug)] 5 pub enum X86MsiData { 6 Normal(X86MsiDataNormal), 7 Dmar(X86MsiDataDmar), 8 } 9 10 #[bitfield(u32)] 11 pub struct X86MsiDataNormal { 12 #[bits(8)] 13 pub vector: u8, 14 #[bits(3)] 15 pub delivery_mode: u8, 16 #[bits(1)] 17 pub dest_mode_logical: bool, 18 #[bits(2)] 19 reserved: u8, 20 #[bits(1)] 21 pub active_low: bool, 22 #[bits(1)] 23 pub is_level_triggered: bool, 24 #[bits(16)] 25 reserved2: u16, 26 } 27 28 #[derive(Debug)] 29 pub struct X86MsiDataDmar { 30 pub dmar_subhandle: u32, 31 } 32 33 impl X86MsiDataDmar { 34 #[allow(dead_code)] 35 pub const fn new(dmar_subhandle: u32) -> Self { 36 X86MsiDataDmar { dmar_subhandle } 37 } 38 } 39 40 pub const X86_MSI_BASE_ADDRESS_LOW: u32 = 0xfee00000 >> 20; 41 42 #[allow(dead_code)] 43 #[derive(Debug)] 44 pub enum X86MsiAddrLo { 45 Normal(X86MsiAddrLoNormal), 46 Dmar(X86MsiAddrLoDmar), 47 } 48 49 #[bitfield(u32)] 50 pub struct X86MsiAddrLoNormal { 51 #[bits(2)] 52 reserved_0: u32, 53 #[bits(1)] 54 pub dest_mode_logical: bool, 55 #[bits(1)] 56 pub redirecti_hint: bool, 57 #[bits(1)] 58 reserved_1: bool, 59 #[bits(7)] 60 pub virt_destid_8_14: u32, 61 #[bits(8)] 62 pub destid_0_7: u32, 63 #[bits(12)] 64 pub base_address: u32, 65 } 66 67 #[bitfield(u32)] 68 pub struct X86MsiAddrLoDmar { 69 #[bits(2)] 70 reserved_0: u32, 71 #[bits(1)] 72 pub index_15: bool, 73 #[bits(1)] 74 pub subhandle_valid: bool, 75 #[bits(1)] 76 pub format: bool, 77 #[bits(15)] 78 pub index_0_14: u32, 79 #[bits(12)] 80 pub base_address: u32, 81 } 82 83 #[bitfield(u32)] 84 pub struct X86MsiAddrHi { 85 #[bits(8)] 86 reserved: u32, 87 #[bits(24)] 88 pub destid_8_31: u32, 89 } 90