1 use core::{ 2 hint::spin_loop, 3 sync::atomic::{compiler_fence, Ordering}, 4 }; 5 6 use log::debug; 7 use system_error::SystemError; 8 use x86::dtables::DescriptorTablePointer; 9 10 use crate::{ 11 arch::{interrupt::trap::arch_trap_init, process::table::TSSManager}, 12 driver::clocksource::acpi_pm::init_acpi_pm_clocksource, 13 init::init::start_kernel, 14 mm::{MemoryManagementArch, PhysAddr}, 15 }; 16 17 use self::boot::early_boot_init; 18 19 use super::{ 20 driver::{ 21 hpet::{hpet_init, hpet_instance}, 22 tsc::TSCManager, 23 }, 24 MMArch, 25 }; 26 27 mod boot; 28 mod multiboot2; 29 mod pvh; 30 31 #[derive(Debug)] 32 pub struct ArchBootParams {} 33 34 impl ArchBootParams { 35 pub const DEFAULT: Self = ArchBootParams {}; 36 } 37 38 extern "C" { 39 static mut GDT_Table: [usize; 0usize]; 40 static mut IDT_Table: [usize; 0usize]; 41 fn head_stack_start(); 42 43 } 44 45 #[no_mangle] 46 #[allow(static_mut_refs)] 47 unsafe extern "C" fn kernel_main( 48 mb2_info: u64, 49 mb2_magic: u64, 50 bsp_gdt_size: u64, 51 bsp_idt_size: u64, 52 boot_entry_type: u64, 53 ) -> ! { 54 let mut gdtp = DescriptorTablePointer::<usize>::default(); 55 let gdt_vaddr = 56 MMArch::phys_2_virt(PhysAddr::new(&GDT_Table as *const usize as usize)).unwrap(); 57 let idt_vaddr = 58 MMArch::phys_2_virt(PhysAddr::new(&IDT_Table as *const usize as usize)).unwrap(); 59 gdtp.base = gdt_vaddr.data() as *const usize; 60 gdtp.limit = bsp_gdt_size as u16 - 1; 61 62 let idtp = DescriptorTablePointer::<usize> { 63 base: idt_vaddr.data() as *const usize, 64 limit: bsp_idt_size as u16 - 1, 65 }; 66 67 x86::dtables::lgdt(&gdtp); 68 x86::dtables::lidt(&idtp); 69 70 compiler_fence(Ordering::SeqCst); 71 if early_boot_init(boot_entry_type, mb2_magic, mb2_info).is_err() { 72 loop { 73 spin_loop(); 74 } 75 } 76 compiler_fence(Ordering::SeqCst); 77 78 start_kernel(); 79 } 80 81 /// 在内存管理初始化之前的架构相关的早期初始化 82 #[inline(never)] 83 #[allow(static_mut_refs)] 84 pub fn early_setup_arch() -> Result<(), SystemError> { 85 let stack_start = unsafe { *(head_stack_start as *const u64) } as usize; 86 debug!("head_stack_start={:#x}\n", stack_start); 87 unsafe { 88 let gdt_vaddr = 89 MMArch::phys_2_virt(PhysAddr::new(&GDT_Table as *const usize as usize)).unwrap(); 90 let idt_vaddr = 91 MMArch::phys_2_virt(PhysAddr::new(&IDT_Table as *const usize as usize)).unwrap(); 92 93 debug!("GDT_Table={:?}, IDT_Table={:?}\n", gdt_vaddr, idt_vaddr); 94 } 95 96 set_current_core_tss(stack_start, 0); 97 unsafe { TSSManager::load_tr() }; 98 arch_trap_init().expect("arch_trap_init failed"); 99 100 return Ok(()); 101 } 102 103 /// 架构相关的初始化 104 #[inline(never)] 105 pub fn setup_arch() -> Result<(), SystemError> { 106 return Ok(()); 107 } 108 109 /// 架构相关的初始化（在IDLE的最后一个阶段） 110 #[inline(never)] 111 pub fn setup_arch_post() -> Result<(), SystemError> { 112 let ret = hpet_init(); 113 if ret.is_ok() { 114 hpet_instance().hpet_enable().expect("hpet enable failed"); 115 } else { 116 init_acpi_pm_clocksource().expect("acpi_pm_timer inits failed"); 117 } 118 TSCManager::init().expect("tsc init failed"); 119 120 return Ok(()); 121 } 122 123 fn set_current_core_tss(stack_start: usize, ist0: usize) { 124 let current_tss = unsafe { TSSManager::current_tss() }; 125 debug!( 126 "set_current_core_tss: stack_start={:#x}, ist0={:#x}\n", 127 stack_start, ist0 128 ); 129 current_tss.set_rsp(x86::Ring::Ring0, stack_start as u64); 130 current_tss.set_ist(0, ist0 as u64); 131 } 132