1 use core::{ 2 hint::spin_loop, 3 sync::atomic::{compiler_fence, Ordering}, 4 }; 5 6 use log::debug; 7 use system_error::SystemError; 8 use x86::dtables::DescriptorTablePointer; 9 10 use crate::{ 11 arch::{interrupt::trap::arch_trap_init, process::table::TSSManager}, 12 driver::clocksource::acpi_pm::init_acpi_pm_clocksource, 13 init::init::start_kernel, 14 mm::{MemoryManagementArch, PhysAddr}, 15 }; 16 17 use self::boot::early_boot_init; 18 19 use super::{ 20 driver::{ 21 hpet::{hpet_init, hpet_instance}, 22 tsc::TSCManager, 23 }, 24 MMArch, 25 }; 26 27 mod boot; 28 mod multiboot2; 29 30 #[derive(Debug)] 31 pub struct ArchBootParams {} 32 33 impl ArchBootParams { 34 pub const DEFAULT: Self = ArchBootParams {}; 35 } 36 37 extern "C" { 38 static mut GDT_Table: [usize; 0usize]; 39 static mut IDT_Table: [usize; 0usize]; 40 fn head_stack_start(); 41 42 } 43 44 #[no_mangle] 45 #[allow(static_mut_refs)] 46 unsafe extern "C" fn kernel_main( 47 mb2_info: u64, 48 mb2_magic: u64, 49 bsp_gdt_size: u64, 50 bsp_idt_size: u64, 51 boot_entry_type: u64, 52 ) -> ! { 53 let mut gdtp = DescriptorTablePointer::<usize>::default(); 54 let gdt_vaddr = 55 MMArch::phys_2_virt(PhysAddr::new(&GDT_Table as *const usize as usize)).unwrap(); 56 let idt_vaddr = 57 MMArch::phys_2_virt(PhysAddr::new(&IDT_Table as *const usize as usize)).unwrap(); 58 gdtp.base = gdt_vaddr.data() as *const usize; 59 gdtp.limit = bsp_gdt_size as u16 - 1; 60 61 let idtp = DescriptorTablePointer::<usize> { 62 base: idt_vaddr.data() as *const usize, 63 limit: bsp_idt_size as u16 - 1, 64 }; 65 66 x86::dtables::lgdt(&gdtp); 67 x86::dtables::lidt(&idtp); 68 69 compiler_fence(Ordering::SeqCst); 70 if early_boot_init(boot_entry_type, mb2_magic, mb2_info).is_err() { 71 loop { 72 spin_loop(); 73 } 74 } 75 compiler_fence(Ordering::SeqCst); 76 77 start_kernel(); 78 } 79 80 /// 在内存管理初始化之前的架构相关的早期初始化 81 #[inline(never)] 82 #[allow(static_mut_refs)] 83 pub fn early_setup_arch() -> Result<(), SystemError> { 84 let stack_start = unsafe { *(head_stack_start as *const u64) } as usize; 85 debug!("head_stack_start={:#x}\n", stack_start); 86 unsafe { 87 let gdt_vaddr = 88 MMArch::phys_2_virt(PhysAddr::new(&GDT_Table as *const usize as usize)).unwrap(); 89 let idt_vaddr = 90 MMArch::phys_2_virt(PhysAddr::new(&IDT_Table as *const usize as usize)).unwrap(); 91 92 debug!("GDT_Table={:?}, IDT_Table={:?}\n", gdt_vaddr, idt_vaddr); 93 } 94 95 set_current_core_tss(stack_start, 0); 96 unsafe { TSSManager::load_tr() }; 97 arch_trap_init().expect("arch_trap_init failed"); 98 99 return Ok(()); 100 } 101 102 /// 架构相关的初始化 103 #[inline(never)] 104 pub fn setup_arch() -> Result<(), SystemError> { 105 return Ok(()); 106 } 107 108 /// 架构相关的初始化（在IDLE的最后一个阶段） 109 #[inline(never)] 110 pub fn setup_arch_post() -> Result<(), SystemError> { 111 let ret = hpet_init(); 112 if ret.is_ok() { 113 hpet_instance().hpet_enable().expect("hpet enable failed"); 114 } else { 115 init_acpi_pm_clocksource().expect("acpi_pm_timer inits failed"); 116 } 117 TSCManager::init().expect("tsc init failed"); 118 119 return Ok(()); 120 } 121 122 fn set_current_core_tss(stack_start: usize, ist0: usize) { 123 let current_tss = unsafe { TSSManager::current_tss() }; 124 debug!( 125 "set_current_core_tss: stack_start={:#x}, ist0={:#x}\n", 126 stack_start, ist0 127 ); 128 current_tss.set_rsp(x86::Ring::Ring0, stack_start as u64); 129 current_tss.set_ist(0, ist0 as u64); 130 } 131